mdh.sePublications
Change search
Refine search result
1234 51 - 100 of 194
CiteExportLink to result list
Permanent link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Rows per page
  • 5
  • 10
  • 20
  • 50
  • 100
  • 250
Sort
  • Standard (Relevance)
  • Author A-Ö
  • Author Ö-A
  • Title A-Ö
  • Title Ö-A
  • Publication type A-Ö
  • Publication type Ö-A
  • Issued (Oldest first)
  • Issued (Newest first)
  • Created (Oldest first)
  • Created (Newest first)
  • Last updated (Oldest first)
  • Last updated (Newest first)
  • Disputation date (earliest first)
  • Disputation date (latest first)
  • Standard (Relevance)
  • Author A-Ö
  • Author Ö-A
  • Title A-Ö
  • Title Ö-A
  • Publication type A-Ö
  • Publication type Ö-A
  • Issued (Oldest first)
  • Issued (Newest first)
  • Created (Oldest first)
  • Created (Newest first)
  • Last updated (Oldest first)
  • Last updated (Newest first)
  • Disputation date (earliest first)
  • Disputation date (latest first)
Select
The maximal number of hits you can export is 250. When you want to export more records please use the Create feeds function.
  • 51.
    Becker, Matthias
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sandström, K.
    ABB Corporate Research, Västerås, Sweden .
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Limiting temperature gradients on many-cores by adaptive reallocation of real-time workloads2014In: 19th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2014, 2014, p. Article number 7005241-Conference paper (Refereed)
    Abstract [en]

    The advent of many-core processors came with the increase in computational power needed for future applications. However new challenges arrived at the same time, especially for the real-time community. Each core on such a processor is a heat source and uneven usage can lead to hot spots on the processor, affecting its lifetime and reliability. For real-time systems, it is therefore of paramount importance to keep the temperature differences between the individual cores below critical values, in order to prevent premature failure of the system. We argue that this problem can not be solved by traditional approaches, since the growing number of cores makes them intractable. We rather argue to split the problem in the spacial domain and control the temperature on core level. The cores control their temperature by rearranging the load in a predictable manner during runtime. To achieve this, a feedback controller is implemented on each core. We conclude our work with a simulation based evaluation of the proposed approach comparing its performance against a previously presented algorithm. 

  • 52.
    Becker, Matthias
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sandström, Kristian
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A Many-Core based Execution Framework for IEC 61131-32015In: IECON 2015 - 41st Annual Conference of the IEEE Industrial Electronics Society, 2015, p. 4525-4530, article id 7392805Conference paper (Refereed)
    Abstract [en]

    Programmable logic controllers are widely used for the control of automationsystems. The standard IEC 61131-3 defines the execution model as well as theprogramming languages for such systems. Nowadays, actuators and sensorsconnect to the programmable logic controller via automation buses. While suchbuses, as well as the sensors and actuators, become more and more powerful, ashift away from the current distributed operation of automation systems, closeto the field level, becomes possible. Instead, execution of complex controlfunctions can be relocated to more powerful hardware, and technologies. Thispaper presents an execution framework for IEC 61131-3, based on a many-coreprocessors. The presented execution model exploits the characteristics of theIEC 61131-3 applications as well as the characteristics of the many-core processor,yielding a predictable execution. We present the platform architectureand an algorithm to allocate a number of IEC 61131-3 conform applications.Experimental as well as simulation based evaluation is provided.

  • 53.
    Becker, Matthias
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sandström, Kristian
    ABB Corporate Research, Västerås, Sweden.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dynamic Power Management for Thermal Control of Many-Core Real-Time Systems2014In: Sigbed Review, ISSN 1551-3688, Vol. 11, no 3, p. 26-29Article in journal (Refereed)
    Abstract [en]

    Many-Core systems, processors incorporating numerous cores interconnected by a Network on Chip (NoC), provide the computing power needed by future applications. High power density caused by the steadily shrinking transistor size, which is still following Moore's law, leads to a number of problems such as overheating cores, affecting processor reliability and lifetime. Embedded real-time systems are exposed to a changing ambient temperature and thus need to adapt their configuration in order to keep the individual core temperature below critical values. %Targeting embedded real-time systems, systems need to adapt to changing environments. In our approach a hysteresis controller is implemented on each core, triggering a redistribution of the cores and the transition into idle state allowing the core to cool down. We propose two approaches, one global and one local approach, to redistribute the tasks and relive overheating cores during runtime. We evaluate the two proposed approaches by comparing them against each other based on simulations.

  • 54.
    Becker, Matthias
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sandström, Kristian
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Increased Reliability of Many-Core Platforms through Thermal Feedback Control2014In: Performance, Power and Predictability of Many-Core Embedded Systems 3PMCES'14, Dresden, Germany, 2014Conference paper (Refereed)
    Abstract [en]

    In this paper we present a low overhead thermal management approach to increase reliability of many-core embedded real-time systems. Each core is controlled by a feedback controller. We adapt the utilization of the core in order to decrease the dynamic power consumption and thus the corresponding heat development. Sophisticated control mechanisms allow us to migrate the load in advance, before reaching critical temperature values and thus we can migrate in a safe way with a guarantee to meet all deadlines.

  • 55.
    Becker, Matthias
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sandström, Kristian
    ABB Corporate Research.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mapping Real-Time Tasks onto Many-Core Systems considering Message Flows2014In: Proceedings of the Work-in-Progress Session of the 20th IEEE Real-Time and Embedded Technology and Applications Symposium, Berlin, Germany, 2014, p. 17-18Conference paper (Refereed)
    Abstract [en]

    In this work we focus on the task mapping problem for many-core real-time systems. The growing number of cores connected by a Network-on-Chip (NoC) calls for sophisticated mapping techniques to meet the growing demands of real-time applications. Hardware should be used in an efficient way such that unnecessary resource usage is avoided. Because of the NP-hardness of the problem, heuristic and meta-heuristic techniques are used to find good solutions. We further consider periodic communication between tasks and we focus on a static mapping solution.

  • 56.
    Begum, Shahina
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Larsson, Thomas B
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sandström, Kristian
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Towards a Compositional Service Architecture for Real-Time Cloud Robotics2016In: ACM SIGBED Review, E-ISSN 1551-3688, p. 63-64Article in journal (Refereed)
    Abstract [en]

    In this paper we present our ongoing work towards a compositional service architecture that integrates cloud technology for computational capacity targeting real-time robotics applications. In particular we take a look at the challenges inherent within the data center where the services are executing. We outline characteristics of the services used in the real-time cloud robotics application, along with the service management and corresponding task model used to execute services. We identify several key central challenges that must be addressed towards integrating cloud technology in real-time robotics.

  • 57.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Hierarchical Real Time Scheduling and Synchronization2008Licentiate thesis, comprehensive summary (Other scientific)
    Abstract [en]

     

    The Hierarchical Scheduling Framework (HSF) has been introduced to enable compositional schedulability analysis and execution of embedded software systems with real-time constraints. In this thesis, we consider a system consisting of a number of semi-independent components called subsystems, and these subsystems are allowed to share logical resources. The HSF provides CPU-time to the subsystems and it guarantees that the individual subsystems respect their allocated CPU budgets. However, if subsystems are allowed to share logical resources, extra complexity with respect to analysis and run-time mechanisms is introduced. In this thesis we address three issues related to hierarchical scheduling of semi-independent subsystems. In the first part, we investigate the feasibility of implementing the hierarchical scheduling framework in a commercial operating system, and we present the detailed figures of various key properties with respect to the overhead of the implementation.

    In the second part, we studied the problem of supporting shared resources in a hierarchical scheduling framework and we propose two different solutions to support resource sharing. The first proposed solution is called SIRAP, a synchronization protocol for resource sharing in hierarchically scheduled open real-time systems, and the second solution is an enhanced overrun mechanism.

    In the third part, we present a resource efficient approach to minimize system load (i.e., the collective CPU requirements to guarantee the schedulability of hierarchically scheduled subsystems). Our work is motivated from a tradeoff between reducing resource locking times and reducing system load. We formulate an optimization problem that determines the resource locking times of each individual subsystem with the goal of minimizing the system load subject to system schedulability. We present linear complexity algorithms to find an optimal solution to the problem, and we prove their correctness

     

     

     

     

     

     

     

  • 58.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Synchronization Protocols for a Compositional Real-Time Scheduling Framework2010Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    In this thesis we propose techniques to simplify the integration of subsystems while minimizing the overall amount of CPU resources needed to guarantee the schedulability of real-time tasks. In addition, we provide solutions to the problem of allowing for the use of logical resources requiring mutual exclusion.

    The contribution of the thesis is presented in three parts. In the first part, we propose a synchronization protocol, called SIRAP, to facilitate sharing of logical resources in a hierarchical scheduling framework. In addition, we extend an existing synchronization protocol, called HSRP, such that each subsystem can be developed independently. The performance of the proposed protocols is evaluated by extensive simulations. In the second part, we present an efficient schedulability analysis that exploits the lower scheduling overhead introduced by each of the proposed protocols. Finally, in the third part, we propose new methods and algorithms that find the optimal system parameters (e.g., optimal resource ceiling), that minimize the amount of CPU resources required to ensure schedulability, when using the proposed synchronization protocols in a hierarchical scheduling framework.

    The motivation of this work comes from an emerging industrial trend in embedded software systems development to integrate multiple applications (subsystems) on a small number of processors. The purpose of this integration is to reduce the hardware related costs as well as the communication complexity between processors. In this setting a large number of industrial applications face the problem of preserving their real-time properties after their integration onto a single processor. In addition, temporal isolation between the applications during runtime may be required to prevent failure propagation between different applications.

    Specifically, we propose a hierarchical scheduling framework that allows for a simplified integration of subsystems. The framework preserves the essential temporal characteristics of the subsystems, both when running in isolation as well as when they are integrated with other subsystems. In this thesis, we assume a model where a system consists of a number of subsystems. The subsystems can interact with each other using shared logical resources. The framework ensures that the individual subsystem respects its allocated share of the processor. The difficulty lies in allowing two or more subsystems to share logical resources, which introduces an additional complexity in the schedulability analysis and also increases the system load.

  • 59.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ciccozzi, Federico
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Bruhn, Fredrik
    Bruhnspace AB, Uppsala, Sweden .
    Software architecture for next generation hyperparallel cyber-physical hardware platforms: challenges and opportunities2015In: ECSAW '15 Proceedings of the 2015 European Conference on Software Architecture Workshops, 2015, Vol. Article No. 19Conference paper (Refereed)
    Abstract [en]

    We present what is destined to become the de-facto standard for hardware platforms for next generation cyber-physical systems. Heterogeneous System Architecture (HSA) is an initiative to harmonize the industry around a common architecture which is easier to program and is an open standard defining the key interfaces for parallel computation. Since HSA is supported by virtually all major players in the silicon market we can conjecture that HSA, with its capabilities and quirks, will highly influence both the hardware and software for next generation cyber-physical systems. In this paper we describe HSA and discuss how its nature will influence architectures of system software and application software. Specifically, we believe that the system software needs to both leverage the hyperparallel nature of HSA while providing predictable and efficient resource allocation to different parallel activities. The application software, on the other hand, should be isolated from the complexity of the hardware architecture but yet be able to efficiently use the full potential of the hyperparallel nature of HSA.

  • 60.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Fisher, Nathan
    Mälardalen University, School of Innovation, Design and Engineering.
    Subsystem-Interface Generation in the Presence of Shared Resources2009In: Proceedings of the 2nd Workshop on Compositional Theory and Technology for Real-Time Embedded Systems (CRTS'09) in conjunction with the 30th IEEE International Real-Time Systems Symposium (RTSS'09), Washington DC, USA, 2009Conference paper (Refereed)
    Abstract [en]

    The Hierarchical Scheduling Framework (HSF) has been introduced as a design-time framework enabling compositional schedulability analysis of embedded software systems with real-time properties. However, supporting resource sharing in HSF is a major challenge, since it increases the amount of the CPU resources required to guarantee the schedulability of the hard real time tasks and decreases the composability at the system level. In this paper, we discuss and identify the key parameters of a compositional framework called the bounded-delay resource open environment (BROE) server to support global resource sharing, that have a great effect on how the framework will utilize CPU resources. Furthermore, we provide an algorithm, that has a pseudo-polynomial complexity, to evaluate the ”optimal” setting for the BROE server. In addition, we provide a polynomial-time approximation algorithm for generating near-optimal setting for the BROE server. The performance of the BROE server, as well as the efficiency of the approximated algorithm, is evaluated by the means of simulation analysis.

  • 61.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Inam, Rafia
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Multi-core Composability in the Face of Memory Bus Contention2012Conference paper (Refereed)
    Abstract [en]

    In this paper we describe the problem of achieving composability of independently developed real-time subsystems to be executed on a multicore platform.We evaluate existing work for achieving real-time performance on multicores and illustrate their lack with respect to composability. To better address composability we present a multi-resource server-based scheduling technique to provide predictable performance when composing multiple subsystems on a multicore platform. To achieve composability also on multicore platforms, we propose to add memory-bandwidth as an additional server resource. Tasks within our multi-resource servers are guaranteed both CPU- and memory-bandwidth; thus the performance of a server will become independent of resource usage by tasks in other servers. We are currently implementing multi-resource servers for the Enea’s OSE operating system for a P4080 8-core processor to be tested with software for a 3G-basestation.

  • 62.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Iqbal, Z.
    University of Porto.
    Silva, P.
    University of Porto.
    Marau, R.
    University of Porto.
    Almeida, L.
    University of Porto.
    Portugal, P.
    University of Porto.
    Engineering and analyzing multi-switch networks with single point of control2011In: 1st International Workshop on Worst-Case Traversal Time, WCTT 2011, Held in Conjunction with the 32nd IEEE Real-Time Systems Symposium, RTSS 2011; Vienna; 29 November 2011 through29 November 2011, 2011, p. 11-18Conference paper (Refereed)
    Abstract [en]

    Recent trends in distributed embedded systems have shown an increase in the amount and heterogeneity of the information that needs to be exchanged, together with a growing importance of supporting dynamic reconfiguration and adaptive behaviors. In this paper we focus on Ethernet technology and we address the case of middle-size networking infrastructure with a few switches. We use the FTT-SE protocol to support dynamic heterogeneous real-time transactions with temporal isolation and we propose the needed scheduling adaptations to support multi-hop network configurations. The paper also includes a companion worst-case response-time analysis that allows verifying the timeliness of the system. Copyright 2011 ACM.

  • 63.
    Behnam, Moris
    et al.
    Mälardalen University, Department of Computer Science and Electronics.
    Isovic, Damir
    Mälardalen University, Department of Computer Science and Electronics.
    Real-Time Control and Scheduling Co-Design for Efficient Jitter Handling2007In: Proceedings - 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2007, p. 516-521Conference paper (Refereed)
    Abstract [en]

    Real-time control algorithms are designed based on the

    characteristics of the controlled plants and they require good

    performance without delays. However, digital control implementation

    typically introduces delays and jitters due to insufficient CPU

    processing power and the limitations of the real-time scheduling

    method used. This can degrade the system performance or even make it

    unstable.

    In this paper we propose an integrated approach for control design

    and real-time scheduling, suitable for both discrete-time and

    continuous-time controllers. It guarantees system performance by

    accepting a certain minimum value of jitter for control tasks and

    feasibly schedules them together with other tasks in the system.

    Results from comparison with other approaches from real-time and

    control theory domains underline the effectiveness of our method.

  • 64.
    Behnam, Moris
    et al.
    Mälardalen University, Department of Computer Science and Electronics.
    Isovic, Damir
    Mälardalen University, Department of Computer Science and Electronics.
    Real-Time Control Design for Flexible Scheduling using Jitter Margin2007Report (Other academic)
    Abstract [en]

    Real-time control algorithms are designed based on the characteristics of the controlled plants and they require good performance without delays. However, digital control implementation typically introduces delays and jitters due to insufficient CPU processing power and the limitations of the real-time scheduling method used. This can degrade the system performance or even make it unstable. In this paper we propose an integrated approach for control design and real-time scheduling, suitable for both discrete-time and continuous-time controllers. It guarantees system performance by accepting a certain minimum value of jitter for control tasks and feasibly schedules them together with other tasks in the system. Results from comparison with other approaches from real-time and control theory domains underline the effectiveness of our method.

  • 65.
    Behnam, Moris
    et al.
    University of Porto.
    Marau, Ricardo
    University of Porto.
    Pedreiras, Paulo
    University of Aveiro,.
    Analysis and Optimization of the MTU in Real-Time Communications over Switched Ethernet2011In: IEEE Symposium on Emerging Technologies and Factory Automation, ETFA, 2011, p. Art.nr. 6059021-Conference paper (Refereed)
    Abstract [en]

    The Flexible Time-Triggered communication over Switched Ethernet protocol (FTT-SE) was proposed to overcome the limitation of guaranteeing the real-time communication requirements of conventional switches, and at the same time to support reconfiguration of dynamic adaptive systems. The protocol fragments large messages into a sequence of packets that are individually scheduled. The maximum transmission unit (MTU), that restricts the packets size, has a significant effect on the schedulability of the packets. In this paper, we investigate the problem of selecting the optimal MTU size that maximizes the schedulability of real-time messages. We propose two algorithms to find optimal/sub-optimal values of MTU; the first one finds an optimal solution but exhibits high computational complexity, while the second one is sub-optimal but exhibits a lower computational complexity. Finally, we evaluate our proposed algorithms by means of simulation studies and compare their results with the results of assigning MTU to the maximum packet size that the protocol can allow.

  • 66.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nemati, Farhang
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Grahn, Håkan
    Blekinge Institute of Technology.
    Towards an Efficient Approach for Resource Sharing in Real-Time Multiprocessor Systems2011In: SIES 2011 - 6th IEEE International Symposium on Industrial Embedded Systems, Conference Proceedings, IEEE , 2011, p. 99-102Conference paper (Refereed)
    Abstract [en]

    Supporting resource sharing in multiprocessor architectures is one of the problems which may limit the benefits that can be archived using this type of architecture. Many approaches and algorithms have been proposed to support resource sharing, however, most of them impose either high blocking times on tasks or require a large memory size. In this paper we investigate the possibility of combining the lock-based approaches and wait-free approaches (using multiple buffers) in order to decrease both the blocking time that may affect the schedulability of tasks and the required memory. To achieve this, we propose a solution based on evaluating the maximum allowed blocking time on each task according to the schedulability analysis, and then find the minimum memory requirement for each resource such that it limits the blocking times on tasks to be less than the maximum allowed blocking times.

  • 67.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Bril, Reinder
    Eindhoven University of Technology, The Netherlands.
    Bounding the number of self-blocking occurrences of SIRAP2010In: Proceedings - Real-Time Systems Symposium, 2010, p. 61-72Conference paper (Refereed)
    Abstract [en]

    This paper presents a new schedulability analysis for hierarchically scheduled real-time systems executing on a single processor using SIRAP; a synchronization protocol for inter subsystem task synchronization. We show that it is possible to bound the number of self-blocking occurrences that should be taken into consideration in the schedulability analysis of subsystems. Correspondingly, we present two novel schedulability analysis approaches with proof of correctness for SIRAP. An evaluation suggests that this new schedulability analysis can decrease the analytical subsystem utilization significantly

  • 68.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Bril, Reinder
    Eindhoven University of Technology, The Netherlands.
    Refining SIRAP with a Dedicated Resource Ceiling for Self-Blocking2009In: 9th ACM & IEEE International Conference on Embedded Software, 2009, p. 157-166Conference paper (Refereed)
  • 69.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Bril, Reinder
    Eindhoven University of Technology, The Netherlands.
    Schedulability analysis of synchronization protocols based on overrun without payback for hierarchical scheduling frameworks revisited2010Report (Other academic)
    Abstract [en]

    In this paper, we show that both global as well as local schedulability analysis of synchronization protocols based on the stack resource protocol (SRP) and overrun without payback for hierarchical scheduling frameworks based on fixed-priority pre-emptive scheduling (FPPS) are pessimistic.We present improved global and local schedulability analysis,illustrate the improvements by means of examples, and show that the improved global analysis is both uniform and sustainable.We evaluate the improved global and local schedulabilityanalysis based on an extensive simulation study and comparethe results with the existing analysis.

  • 70.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Fisher, Nathan
    Department of Computer Science, Wayne State University.
    On Optimal Real-time Subsystem-Interface Generation in the Presence of Shared Resources2010In: Proceedings of the 15th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2010, Bilbao, Spain, 2010Conference paper (Refereed)
    Abstract [en]

    The Hierarchical Scheduling Framework (HSF) has been introduced as a design-time framework enabling compositional schedulability analysis of embedded software systems with real-time properties. However, supporting resource sharing in HSF is a major challenge, since it increases the amount of CPU resources required to guarantee schedulability of the hard real time tasks, and it decreases the composability at the system level. In this paper, we focus on a compositional framework called the bounded-delay resource open environment (BROE) server, and we identify key parameters of this framework that have a great effect on how the framework will utilize CPU resources. In addition, we show how to select optimal values for these parameters in order to reduce the required CPU resource

  • 71.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    J. Bril, Reinder
    Mälardalen University, School of Innovation, Design and Engineering.
    A new approach for global synchronization in hierarchical scheduled real-time systems2009In: Work-in-Progress (WiP) session of the 21st Euromicro Conference on Real-Time Systems (ECRTS'09), 2009Conference paper (Refereed)
  • 72.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    J. Bril, Reinder
    Technische Universiteit Eindhoven.
    Improved SIRAP analysis for synchronization in hierarchical scheduled real-time systems2009In: Proceedings of 14th IEEE International Conference on Emerging Techonologies and Factory (ETFA'09), 2009Conference paper (Refereed)
    Abstract [en]

    We present our ongoing work on synchronization in hierarchical scheduled real-time systems, where tasks are scheduled using fixed-priority pre-emptive scheduling. In this paper, we show that the original local schedulability analysis of the synchronization protocol SIRAP is very pessimistic when tasks of a subsystem access many global shared resources. The analysis therefore suggests that a subsystem requires more CPU resources than necessary. A new way to perform the schedulability analysis is presented which can make the SIRAP protocol more efficient in terms of calculated CPU resource needs.

  • 73.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    J. Bril, Reinder
    Technische Universiteit Eindhoven.
    Tighter Schedulability Analysis of Synchronization Protocols Based on Overrun Without Payback for Hierarchical Scheduling Frameworks2011In: 16th IEEE International Conference on Engineering of Complex Computer Systems (ICECCS'11), Los Alamitos: IEEE Computer Society, 2011, p. 35-44Conference paper (Refereed)
  • 74.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Shin, Insik
    Mälardalen University, School of Innovation, Design and Engineering.
    A Hierarchical Approach for Reconfigurable and Adaptive Embedded Systems2008In: APRES'08 Adaptive and Reconfigurable Embedded Systems: First International Workshop on Adaptive and Reconfigurable Embedded Systems, 2008, p. 51-54Conference paper (Refereed)
    Abstract [en]

    Adaptive and reconfigurable embedded systems have been gaining an increasing interest in the past year from both academics and industry. This paper presents our work on hierarchical scheduling frameworks (HSF) intended as a backbone architecture facilitating the implementation of operating system support for adaptability and reconfigurability.

  • 75.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Shin, Insik
    Åsberg, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Bril, Reinder
    Technische Universiteit Eindhoven.
    Towards Hierarchical Scheduling in VxWorks2008In: OSPERT 2008, Proceedings of the Fourth International Workshop on Operating Systems Platforms for Embedded Real-Time Applications, 2008, p. 63-72Conference paper (Refereed)
    Abstract [en]

    Over the years, we have worked on hierarchical schedulingframeworks from a theoretical point of view. In thispaper we present our initial results of the implementationof our hierarchical scheduling framework in a commercialoperating system VxWorks. The purpose of the implementationis twofold: (1) we would like to demonstrate feasibilityof its implementation in a commercial operating system,without having to modify the kernel source code, and (2) wewould like to present detailed figures of various key propertieswith respect to the overhead of the implementation.During the implementation of the hierarchical scheduler,we have also developed a number of simple task schedulers.We present details of the implementation of Rate-Monotonic(RM) and Earliest Deadline First (EDF) schedulers. Finally,we present the design of our hierarchical schedulingframework, and we discuss our current status in the project.

  • 76.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Overrun Methods for Semi-Independent Real-Time Hierarchical Scheduling2009Report (Other academic)
    Abstract [en]

    The Hierarchical Scheduling Framework (HSF) has been introduced as a design-time framework to enable compositional schedulability analysis of embedded software systems with real-time properties. In this paper a software system consists of a number of semi-independent components called subsystems. Subsystems are developed independently and later integrated to form a system. To support this design process, in the paper, the proposed methods allow non-intrusive configuration and tuning of subsystem timing-behaviour via subsystem interfaces for selecting scheduling parameters. This paper considers three methods to handle overruns due to resource sharing between subsystems in the HSF. For each one of these three overrun methods corresponding scheduling algorithms The work in this paper is supported by the Swedish Foundation for Strategic Research (SSF), via the research programme PROGRESS. and associated schedulability analysis are presented together with analysis that shows under what circumstances one or the other is preferred. The analysis is generalized to allow for both Fixed Priority Scheduling (FPS) and Earliest Deadline First (EDF) scheduling. Also, a further contribution of the paper is the technique of calculating resource-holding times within the framework under different scheduling algorithms. The resource holding times being an important parameter in the global schedulability analysis.

  • 77.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Shin, Insik
    Department of Computer Science, KAIST University , Korea.
    Overrun Methods and Resource Holding Times for Hierarchical Scheduling of Semi-Independent Real-Time Systems2010In: IEEE Transactions on Industrial Informatics, ISSN 1551-3203, Vol. 6, no 1, p. 93-104Article in journal (Refereed)
    Abstract [en]

    The Hierarchical Scheduling Framework (HSF) has been introduced as a design-time framework toenable compositional schedulability analysis of embedded software systems with real-time properties. Inthis paper a software system consists of a number of semi-independent components called subsystems.Subsystems are developed independently and later integrated to form a system. To support this designprocess, in the paper, the proposed methods allow non-intrusive configuration and tuning of subsystemtiming-behaviour via subsystem interfaces for selecting scheduling parameters.This paper considers three methods to handle overruns due to resource sharing between subsystemsin the HSF. For each one of these three overrun methods corresponding scheduling algorithms and associatedschedulability analysis are presented together with analysis that shows under what circumstances one or the other is preferred. The analysis is generalized to allow for both Fixed Priority Scheduling (FPS)and Earliest Deadline First (EDF) scheduling. Also, a further contribution of the paper is the techniqueof calculating resource-holding times within the framework under different scheduling algorithms; theresource holding times being an important parameter in the global schedulability analysis.

  • 78.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Åsberg, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Bril, Reinder
    Eindhoven University of Technology, The Netherlands.
    Overrun and Skipping in Hierarchically Scheduled Real-Time Systems2009In: 15th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2009, p. 519-526Conference paper (Refereed)
  • 79.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Åsberg, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Shin, Insik
    Mälardalen University, School of Innovation, Design and Engineering.
    Synchronization protocols for hierarchical real-time scheduling frameworks2008In: Proceedings of the 1st Workshop on Compositional Theory and Technology for Real-Time Embedded Systems (CRTS'08) in conjunction with the 29th IEEE International Real-Time Systems Symposium (RTSS'08), Barcelona, Spain, 2008Conference paper (Refereed)
  • 80.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Shin, Insik
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Scheduling of Semi-Independent Real-Time Components: Overrun Methods and Resource Holding Times2008In: Proceedings of the 13th IEEE International Conference on Emerging echnologies and Factory Automation (ETFA’08), 2008, p. 575-582Conference paper (Refereed)
    Abstract [en]

    The Hierarchical Scheduling Framework (HSF) has been introduced as a design-time framework enabling compositional schedulability analysis of embedded software systems with real-time properties. In this paper a system consists of a number of semi-independent components called subsystems. Subsystems are developed independently and later integrated to form a system. To support this design process, our proposed methods allow nonintrusive configuration and tuning of subsystem timing behaviour via subsystem interfaces for selecting scheduling parameters. This paper considers two methods to handle overruns due to resource sharing between subsystems in the HSF. We present the scheduling algorithms for overruns and their associated schedulability analysis, together with analysis that shows under what circumstances one or the other overrun method is preferred. Furthermore, we show how to calculate resource-holding times within our framework.

  • 81.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Shin, Insik
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    SIRAP: A Synchronization Protocol for Hierarchical Resource Sharing in Real-Time Open Systems2007In: EMSOFT'07: Proceedings of the Seventh ACM and IEEE International Conference on Embedded Software, 2007, p. 279-288Conference paper (Refereed)
    Abstract [en]

    This paper presents a protocol for resource sharing in a hierarchical real-time scheduling framework. Targeting real-time open systems, the protocol and the scheduling framework significantly reduce the efforts and errors associated with integrating multiple semi-independent subsystems on a single processor. Thus, our proposed techniques facilitate modern software development processes, where subsystems are developed by independent teams (or subcontractors) and at a later stage integrated into a single product. Using our solution, a subsystem need not know, and is not dependent on, the timing behaviour of other subsystems; even though they share mutually exclusive resources. In this paper we also prove the correctness of our approach and evaluate its efficiency.

  • 82.
    Behnam, Moris
    et al.
    Mälardalen University, Department of Computer Science and Electronics.
    Shin, Insik
    Mälardalen University, Department of Computer Science and Electronics.
    Nolte, Thomas
    Mälardalen University, Department of Computer Science and Electronics.
    Sjödin, Mikael
    Mälardalen University, Department of Computer Science and Electronics.
    Independent Abstraction and Dynamic Slack Reclaiming in Hierarchical Real-Time Open Systems2007In: Proceedings of the Work-In-Progress (WIP) session of the 19th Euromicro Conference on Real-Time Systems (ECRTS'07), Pisa, Italy, 2007, p. 1-4Conference paper (Refereed)
    Abstract [en]

    Independent subsystem abstraction allows subsystems to be developed and validated separately and supports an easier subsystem integration. In particular, this approach is desirable in open systems, since it does not require knowledge of temporal behaviour of other subsystems. However, independent

    abstraction, assuming the worst-case CPU supply pattern, requires extra CPU allocations. We present our work in progress on dynamic slack reclamation, which keeps track of such extra CPU allocations at run time. We are also investigating how to utilize those extra resources for supporting soft real-time tasks.

  • 83.
    Behnam, Moris
    et al.
    Mälardalen University, Department of Computer Science and Electronics.
    Shin, Insik
    Mälardalen University, Department of Computer Science and Electronics.
    Nolte, Thomas
    Mälardalen University, Department of Computer Science and Electronics.
    Sjödin, Mikael
    Mälardalen University, Department of Computer Science and Electronics.
    Real-Time Subsystem Integration in the Presence of Shared Resources2006In: Proceedings of the Work-In-Progress (WIP) session of the 27th IEEE Real-Time Systems Symposium (RTSS'06), Rio de Janeiro, Brazil: 27th IEEE International Real-Time Systems Symposium (RTSS 2006) Rio deJaneiro, Brazil, 5-8 December 2006, 2006Conference paper (Refereed)
    Abstract [en]

    We present our ongoing work to support the difficult, time consuming, and error-prone process of subsystem integration in the real-time domain. Our work will result in methods where independently developed subsystems, including both hard real-time and soft real-time functions, can be easily integrated without resulting unpredictable timing behaviour. The methods will also facilitate subsystem reuse, since a subsystem can easily be integrated in a new environment. Related research and methods are presented, together with our ongoing work in the area.

  • 84.
    Behnam, Moris
    et al.
    Mälardalen University, Department of Computer Science and Electronics.
    Shin, Insik
    Mälardalen University, Department of Computer Science and Electronics.
    Nolte, Thomas
    Mälardalen University, Department of Computer Science and Electronics.
    Sjödin, Mikael
    Mälardalen University, Department of Computer Science and Electronics.
    SIRAP: A Global Resource Sharing Protocol Facilitating Integration of Semi-independent Real-Time Systems2007Report (Other academic)
    Abstract [en]

    This paper presents a protocol for resource sharing in a hierarchical real-time scheduling framework. Together, the protocol and the scheduling framework significantly reduce the efforts and errors associated with integrating multiple semi-independent subsystems on a single processor. Thus, our proposed techniques facilitate modern software development processes, where subsystems are developed by independent teams (or subcontractors) and at a later stage integrated into a single product. Using our solution, a subsystem need not know, and is not dependent on, the timing behaviour of other subsystems; even though they share mutually exclusive resources. In this paper we also prove the correctness of our approach and evaluate its efficiency.

  • 85.
    Behnam, Moris
    et al.
    Mälardalen University, Department of Computer Science and Electronics.
    Shin, Insik
    Mälardalen University, Department of Computer Science and Electronics.
    Nolte, Tomas
    Mälardalen University, Department of Computer Science and Engineering.
    Nolin, Mikael
    Mälardalen University, Department of Computer Science and Electronics.
    An overrun method to support composition of semi-independent real-time components2008In: Proceedings - International Computer Software and Applications Conference, 2008, p. 1347-1352Conference paper (Refereed)
    Abstract [en]

    Engineers of embedded software systems rely on efficient design techniques and tools along with efficient run-time support. In the design of complex embedded real-time systems, the Hierarchical Scheduling Framework (HSF) has been introduced as a design-time framework enabling compositional schedulability analysis of embedded software systems with real-time properties. Moreover, the HSF provides a run-time framework guaranteeing that these non-functional requirements are met. In this paper a system consists of a number of semi-independent components called subsystems, and these subsystems are allowed to share logical resources. The HSF makes sure that the individual subsystems respect their allocated CPU budgets. However, as semi-independent sub-systems share logical resources, extra complexity is introduced. Specifically, the contribution of this paper is a novel method to allow for budget overruns; a common scenario when a subsystem utilizes shared logical resources. This proposed method is not only more resource efficient than existing methods, but it is also more appropriate for supporting composability of independently developed real-time subsystems.

  • 86.
    Bril, Reinder J.
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Technische Universiteit Eindhoven (TU/e), Netherlands.
    Altmeyer, Sebastian
    University of Amsterdam (UvA), The Netherlands.
    van den Heuvel, Martijn
    Technische Universiteit Eindhoven (TU/e), Netherlands.
    Davis, Rob
    University of York, UK.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Integrating Cache-Related Pre-emption Delays into Analysis of Fixed Priority Scheduling with Pre-emption Thresholds2015In: Proceedings - Real-Time Systems Symposium, 2015, Vol. January, p. 161-172Conference paper (Refereed)
    Abstract [en]

    Cache-related pre-emption delays (CRPD) have been integrated into the schedulability analysis of sporadic tasks with constrained deadlines for fixed-priority pre-emptive scheduling (FPPS). This paper generalizes that work by integrating CRPD into the schedulability analysis of tasks with arbitrary deadlines for fixed-priority pre-emption threshold scheduling (FPTS). The analysis is complemented by an optimal threshold assignment algorithm that minimizes CRPD. The paper includes a comparative evaluation of the schedulability ratios of FPPS and FPTS, for constrained-deadline tasks, taking CRPD into account.

  • 87.
    Bril, Reinder
    et al.
    Eindhoven University of Technology, The Netherlands.
    Keskin, Ugur
    Eindhoven University of Technology, The Netherlands.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Schedulability analysis of synchronization protocols based on overrun without payback for hierarchical scheduling frameworks revisited2009Conference paper (Refereed)
  • 88.
    Danielsson, Jakob
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ashjaei, Seyed Mohammad Hossein
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sörensen, Thomas
    Westermo Teleindustri AB, Västerås, Sweden.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Performance Evaluation of Network Convergence Time Measurement Techniques2017In: International Conference on Emerging Technologies And Factory Automation ETFA'17, 2017, p. 1-7Conference paper (Refereed)
    Abstract [en]

    In this paper we evaluate solutions that provide measurements for the network convergence time in switched Ethernet networks when links failures happen. We evaluate three solutions to measure the network convergence time in a faulty situation. Compared to the commercially available solutions, our proposals are cost-effective, portable, and open source. Thus, they are easy to deploy on many testbeds. We show the performance of the solutions by measuring different metrics including jitter, network convergence time and packet loss during the network recovery time. Our measurements indicate that it is possible to accurately measure the network convergence time using a packet sender which does not suffer interference from the overlying operating system. Furthermore, we noticed that the packet sniffer TShark did not suffer from kernel interrupts from overlying operating systems.

  • 89.
    Danielsson, Jakob
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Jägemar, M.
    Ericsson AB, Stockholm, Sweden.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Investigating execution-characteristics of feature-detection algorithms2017In: IEEE Conference on Emerging Technologies and Factory Automation, ISSN 1946-0740, E-ISSN 1946-0759, Vol. Part F134116, p. 1-4Article in journal (Refereed)
    Abstract [en]

    We discuss how to obtain information of execution characteristics, such as parallelizability and memory utilization, with the final aim to improve the performance and predictability of feature and corner detection algorithms for use in e.g. robotics and autonomous machines. Our aim is to obtain a better understanding of how computer vision algorithms use hardware resources and how to improve the time predictability and execution time of such algorithms when executing on multi-core CPUs. We evaluate a fork-join model applicable to feature detection algorithms and present a method for measuring how well the algorithm performance correlates with hardware resource usage. We have applied our method to the Featured from Accelerated Segment Test (FAST) algorithm. Our characterization of FAST reveals that it is an algorithm with excellent parallelism opportunities, resulting in an almost linear speed-up per core. Our measurements also reveal that the performance of FAST correlates very little with the number number of misses in the L1 data cache, L1 instruction cache, data translation lookaside buffer and L2 cache. Thus, the FAST algorithm will not have a negative effect on the execution time when the input data fits in the L2 cache. 

  • 90.
    Danielsson, Jakob
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Marcus, Jägemar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Ericsson AB, Stockholm, Sweden.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Seceleanu, Tiberiu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Measurement-based evaluation of data-parallelism for OpenCV feature-detection algorithms2018In: Staying Smarter in a Smartening World COMPSAC'18, 2018, p. 701-710Conference paper (Refereed)
    Abstract [en]

    We investigate the effects on the execution time, shared cache usage and speed-up gains when using data-partitioned parallelism for the feature detection algorithms available in the OpenCV library. We use a data set of three different images which are scaled to six different sizes to exercise the different cache memories of our test architectures. Our measurements reveal that the algorithms using the default settings of OpenCV behave very differently when using data-partitioned parallelism. Our investigation shows that the executions of the algorithms SURF, Dense and MSER correlate to L3-cache usage and they are therefore not suitable for data-partitioned parallelism on multi-core CPUs. Other algorithms: BRISK, FAST, ORB, HARRIS, GFTT, SimpleBlob and SIFT, do not correlate to L3-cache in the same extent, and they are therefore more suitable for data-partitioned parallelism. Furthermore, the SIFT algorithm provides the most stable speed-up, resulting in an execution between 3 and 3.5 times faster than the original execution time for all image sizes. We also have evaluated the hardware resource usage by measuring the algorithm execution time simultaneously with the L3-cache usage. We have used our measurements to conclude which algorithms are suitable for parallelization on hardware with shared resources.

  • 91.
    Danielsson, Jakob
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Marcus, Jägemar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Seceleanu, Tiberiu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Run-time Cache-Partition Controller for Multi-core Systems2019Conference paper (Refereed)
  • 92.
    Danielsson, Jakob
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Seceleanu, Tiberiu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. ABB AB, Västerås, Sweden.
    Marcus, Jägemar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Ericsson AB, Stockholm, Sweden.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Testing Performance-Isolation in Multi-Core Systems2019Conference paper (Refereed)
    Abstract [en]

    In this paper we present a methodology to be used for quantifying the level of performance isolation for a multi-core system. We have devised a test that can be applied to breaches of isolation in different computing resources that may be shared between different cores. We use this test to determine the level of isolation gained by using the Jailhouse hypervisor compared to a regular Linux system in terms of CPU isolation, cache isolation and memory bus isolation. Our measurements show that the Jailhouse hypervisor provides performance isolation of local computing resources such as CPU. We have also evaluated if any isolation could be gained for shared computing resources such as the system wide cache and the memory bus controller. Our tests show no measurable difference in partitioning between a regular Linux system and a Jailhouse partitioned system for shared resources. Using the Jailhouse hypervisor provides only a small noticeable overhead when executing multiple shared-resource intensive tasks on multiple cores, which implies that running Jailhouse in a memory saturated system will not be harmful. However, contention still exist in the memory bus and in the system-wide cache.

  • 93.
    Inam, Rafia
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Compositional Analysis for the Multi-Resource Server2015In: 20th IEEE International Conference on Emerging Technologies and Factory Automation ETFA'15, Luxembourg, Luxemburg: IEEE , 2015, p. Article number 7301431-Conference paper (Refereed)
    Abstract [en]

    The Multi-Resource Server (MRS) technique has been proposed to enable predictable execution of memory intensive real-time applications on COTS multi-core platforms. It uses resource reservation approaches in the context of CPUbandwidth and memory-bus bandwidth reservations to bound the interference between the applications running on the same core as well as between the applications running on different cores. In this paper we present a complete composable local and global schedulability analysis for the Multi-Resource Server technique. Based on the proposed analysis,we further provide an experimental study that investigates the behaviour of the MRS and identifies the factors that contribute mostly on the overall system performance.

  • 94.
    Inam, Rafia
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Compositional analysis for the multi-resource server - a technical report.2014Report (Refereed)
    Abstract [en]

    The Multi-Resource Server (MRS) technique has been proposed toenable predictable execution of memory intensive real-time applicationson COTS multi-core platforms. It uses resource reservationapproaches in the context of CPU-bandwidth and memory-busbandwidth reservations to bound the interferences between the applicationsrunning on the same core as well as between the applicationsrunning on different cores. In this paper we present a completecompositional schedulability analysis for the Multi-ResourceServer technique. Based on the proposed analysis, we further providean experimental study that investigates the behaviour of theMRS and identify the factors that contribute mostly on the overallsystem performance.

  • 95.
    Inam, Rafia
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Support for Legacy Real-Time Applications in an HSF-Enabled FreeRTOS - a technical report2014Report (Refereed)
    Abstract [en]

    This paper presents a runtime support to consolidate legacy together with other real-time applications, running a single instance of a real-time operating system (RTOS), and sharing system resources. In this context, we resort to the hierarchical scheduling framework (HSF) to provide tem- poral partitions for dierent applications, supporting their independent development and real-time analysis, thus resulting on a predictable inte- gration. In particular, the paper focuses on a constructive element, the legacy server that allows executing code that is unaware of the temporal partition within which it is deployed. Furthermore, we discuss the chal- lenges that need to be addressed to execute a legacy application in an HSF without modications to the original code. We focus on the chal- lenge of enabling sharing system resources, both hardware and software, as typically found in most industrial software systems. We propose a novel solution based on wrappers for the required RTOS system calls. We implement our ideas in a concrete implementation on FreeRTOS OS, taking advantage of a prior HSF implementation. The validation is performed by a proof-of-concept case study that shows a successful integration of a legacy application that uses shared resources in a system that executes other applications. 

  • 96.
    Inam, Rafia
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Worst Case Delay Analysis of a DRAM Memory Request for COTS Multicore Architectures2014Conference paper (Refereed)
    Abstract [en]

    Dynamic RAM (DRAM) is a source of memory contention and interference problems on commercial of the shelf (COTS) multicore architectures. Due to its variable access time, it can greatly influence the task's WCET and can lead to unpredictability. In this paper, we provide a worst case delay analysis for a DRAM memory request to safely bound memory contention on multicore architectures. We derive a worst-case service time for a single memory request and then combine it with the per-request memory interference that can be generated by the tasks executing on same or different cores in order to generate the delay bound.

  • 97.
    Inam, Rafia
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mahmud, Nesredin
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    The Multi-Resource Server for Predictable Execution on Multi-core Platforms2014In: Real-Time Technology and Applications - Proceedings, 2014, Vol. October, p. 1-11Conference paper (Refereed)
    Abstract [en]

    In this paper we present an implementation and demonstration of the Multi-Resource Server (MRS) which enables predictable execution of real-time applications on multi-core platforms. The MRS provides temporal isolation both between tasks running on the same core, as well as, between tasks running on different cores. The latter could, without MRS, interfere with each other due to contention on a shared memory bus. We demonstrate that MRS can be used to ”encapsulate” legacy systems and to give them enough resources to fulfill their purpose. In our case study a legacy media-player is integrated with several resource-hungry tasks running at a different core. We show that without MRS the media-player starts to drop frames due to the interference from other tasks; while introduction of MRS alleviates this problem. Another part of our demonstration shows how traditional periodic real-time tasks can be kept schedulable even when tasks with high memory-demand are added to the system.

  • 98.
    Inam, Rafia
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Mäki-Turja, Jukka
    Mälardalen University, School of Innovation, Design and Engineering.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Hard Real-time Support for Hierarchical Scheduling in FreeRTOS2011In: Proceedings of 7th annual workshop on Operating Systems Platforms for Embedded Real-Time Applications July 5th, 2011 in Porto, Portugal: in conjunction with the23rd Euromicro Conference on Real-Time SystemsPortugal, July 6-8, 201 / [ed] Thomas Gleixner, Gabriel Permer, 2011, p. 51-60Conference paper (Refereed)
    Abstract [en]

    This paper presents extensions to the previous implementationof two-level Hierarchical Scheduling Framework(HSF) for FreeRTOS. The results presented here allow the useof HSF for FreeRTOS in hard-real time applications, with thepossibility to include legacy applications and components notexplicitly developed for hard real-time or the HSF.

    Specifically, we present the implementations of (i) global andlocal resource sharing using the Hierarchical Stack ResourcePolicy and Stack Resource Policy respectively, (ii) kernel supportfor the periodic task model, and (iii) mapping of original FreeRTOSAPI to the extended FreeRTOS HSF API. We also presentevaluations of overheads and behavior for different alternativeimplementations of HSRP with overrun from experiments on theAVR 32-bit board EVK1100. In addition, real-time schedulinganalysis with models of the overheads of our implementation ispresented.

  • 99.
    Inam, Rafia
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Slatman, Joris
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Towards Implementing Multi-resource Server on Multi-core Linux Platform2013In: Proceedings of 18th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA2013), 2013, p. Article number 6648167-Conference paper (Refereed)
    Abstract [en]

    In this paper we present our ongoing work on implementing the multi-resource server technology in the Linux operating system running on multi-core architectures. The multiresource server is used to control the access to both CPU and memory bandwidth resources such that the execution of real-time tasks become predictable. We are targeting Legacy applications to be migrated from single to multi-core architectures. We investigate the available techniques and mechanisms that can support our multi-resource servers and we discuss the potential problems that needed to be tackled considering the requirements of legacy applications.

  • 100.
    Iqbal, Zahid
    et al.
    University of Porto, Portugal.
    Almeida, Luis
    University of Porto, Portugal.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Designing Network Servers within a Hierarchical Scheduling Framework2015In: Proceedings of the ACM Symposium on Applied Computing, 2015, p. 653-658Conference paper (Refereed)
1234 51 - 100 of 194
CiteExportLink to result list
Permanent link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf