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  • 101.
    Hallmans, Daniel
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Larsson, Stig
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    A Method for Handling Evolvability in a Complex Embedded System2013Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Handling of obsolete software and/or hardware components together with management of function updates in a complex embedded system with an expected life time of more than 30 years can be a very difficult to almost impossible task. This types of challenges can be found in a large number of companies in, for example, the power transmission industry, power plants, aviation etc. In this paper we present the basic steps in a proposed method for handling evolvability in such embedded systems with long expected life cycles. The key elements of the proposed method are the definition of function dependencies, release planning, and test requirements.

  • 102.
    Hallmans, Daniel
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Larsson, Stig
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Industrial Requirements on Evolution of an Embedded System Architecture2013Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Management of obsolete software- and hardware-components along with the addition of new components and functionalities in existing embedded systems can be a very difficult or almost impossible task. If there at the same time is a requirement put on the system that it should be in operation for more than 30 years, then the evolution of the embedded system architecture over such a long duration of time will be an even more challenging problem to solve. A large number of different industries, for example the process and power transmission industries, are faced with this type of challenges on a daily basis. The contribution of our research presented in this paper is a set of questions and answers on how it is possible to replace and update an old control system, with examples inherent in process and power transmission applications. We also look at different methods that can be used during the development of new systems such that they will provide a natural support for evolvability, targeting future control system applications.

  • 103.
    Hallmans, Daniel
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system. ABB AB, Ludvika, Sweden.
    Sandström, K.
    ABB Corporate Research, Västerås.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Larsson, S.
    SICS, Västerås, Sweden.
    Consistent sensor values on a real-time ethernet network2016Inngår i: IEEE International Workshop on Factory Communication Systems - Proceedings, WFCS, 2016, artikkel-id Article number 7496499Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Industrial control systems often exhibit a need for short latencies and/or consistent data gathering. In a system with limited resources it is a challenge to achieve the combination of short latencies and consistent data. In this paper we propose three different architectural solutions to this challenge, each having different trade-offs: one that gives a consistent set of data and also a short latency but with a higher resource usage, a second alternative that reduces resource needs but at the cost of an increased latency, and a third and final solution that reduces resource needs to a minimum but in doing so also increasing the latency. The results presented in this paper suggest that it is possible to get low latency and robustness at the cost of performance. 

  • 104.
    Hallmans, Daniel
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system. ABB AB, Ludvika, Sweden.
    Sandström, K.
    ABB AB, Västerås, Sweden.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Larsson, Stig
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system. SICS, Västerås, Sweden.
    A method and industrial case: Replacement of an FPGA component in a legacy control system2015Inngår i: Proceeding - 2015 IEEE International Conference on Industrial Informatics, INDIN 2015, 2015, s. 208-214Konferansepaper (Fagfellevurdert)
    Abstract [en]

    A significant part of industrial systems have requirements on long life times. Such requirements on the complete system impose requirements on its corresponding embedded systems to be operational for an equally long time. As a consequence it is of paramount importance to be able to replace obsolete components of the embedded systems during the life time of the system, and to be able to update part of the design due to new requirements. In this paper we present a method to manage component replacement in such systems, and we present an industrial case study highlighting the work needed to replace an FPGA chip with another, including all corresponding legacy FPGA design challenges that comes with such a replacement. We have found one larger problem inherent in the ability to use the included components in a way that is not possible with the new circuits replacing the old ones. This problem significantly increased the work needed when performing the conversion and migration from the old design to the new, since parts of the design had to be redesigned from a functional perspective.

  • 105.
    Hallmans, Daniel
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system. ABB AB Ludvika, Sweden .
    Sandström, Kristian
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system. ABB Corporate Research Västerås, Sweden.
    Lindgren, Markus
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system. ABB Corporate Research Västerås, Sweden.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    GPGPU for Industrial Control Systems2013Inngår i: 18th IEEE International Conference on Emerging Technologies & Factory Automation ETFA'13, 2013, s. Article number 6648166-Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In this work in progress paper we present parts of our ongoing work on using the Graphical Processing Unit (GPU) in the context of Embedded Systems. As a first step we are investigating the possibility to move functions from a Digital Signal Processor (DSP) to a GPU. If it is possible to make such a migration then it would simplify the hardware designs for some embedded systems by removing external hardware and also remove a potential life cycle issue with obsolete components. We are currently designing a test system to be able to compare performance between a legacy control system used today in industry, based on a CPU/DSP combination, to a new design with a CPU/GPU combination. In this setting the pre-filtering of sampled data, previously done in the DSP, is moved to the GPU.

  • 106.
    Hallmans, Daniel
    et al.
    ABB AB, Ludvika.
    Åsberg, Mikael
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Towards using the Graphics Processing Unit (GPU) for Embedded Systems2012Inngår i: IEEE Symposium on Emerging Technologies and Factory Automation, ETFA 2012, 2012, s. Article number: 6489715-Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The Graphics Processing Unit (GPU) is becoming a very powerful platform to accelerate graphics and dataparallel compute-intensive applications. It gives a high performance and at the same time it has a low power consumption. This combination is of high performance and low power consumption is useful when it comes to building an embedded system. In this paper we are looking at the possibility to use a combination of CPU and GPU to provide performance metrics that are required in an embedded system. In particular we look at requirements inherent in the process and power industries where we believe that the GPU has the potential to be a useful and natural element in future embedded system architectures.

  • 107.
    Hansson, Hans
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Carlson, Jan
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Isovic, Damir
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Lundqvist, Kristina
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Ouimet, Martin
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Pettersson, Paul
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Punnekkat, Sasikumar
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Seceleanu, Cristina
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Real-Time Systems2010Bok (Annet vitenskapelig)
    Abstract [en]

    This is a textbook developed for use in the Master Programme Module E-M.6 "Real-Time Systems" as part of the Postgraduate Distance studies organized by Fraunhofer IESE and the Distance and International Studies Center at the Technical University of Kaiserslauten, Germany.

  • 108.
    Hansson, Hans
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolin, Mikael
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Real-time in embedded systems2017Inngår i: Systems, Controls, Embedded Systems, Energy, and Machines, CRC Press , 2017, s. 16-26-16-58Kapittel i bok, del av antologi (Annet vitenskapelig)
  • 109.
    Hansson, Hans
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Axelsson, Jakob
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Björkman, Mats
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Carlson, Jan
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Crnkovic, Ivica
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Lisper, Björn
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Lundqvist, Kristina
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Norström, Christer
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Pettersson, Paul
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Punnekkat, Sasikumar
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Sjödin, Mikael
    Mälardalens högskola, Akademin för innovation, design och teknik.
    The PROGRESS Centre for Predictable Embedded Software Systems - Half-time report (edited version)2010Rapport (Annet vitenskapelig)
    Abstract [en]

    Presentation of the achievements and activities within the PROGRESS national strategic research centre 2006-2008

  • 110.
    Hansson, Hans
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Sjödin, Mikael
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Beating the Automotive Code Complexity Challenge2008Konferansepaper (Fagfellevurdert)
  • 111.
    Hansson, Hans
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Sjödin, Mikael
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Sundmark, Daniel
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Real-Time in Networked Embedded Systems2009Inngår i: Networked Embedded Systems, CRC Press, Taylor & Francis Group , 2009Kapittel i bok, del av antologi (Annet vitenskapelig)
  • 112.
    Inam, Rafia
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Sjödin, Mikael
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Compositional Analysis for the Multi-Resource Server2015Inngår i: 20th IEEE International Conference on Emerging Technologies and Factory Automation ETFA'15, Luxembourg, Luxemburg: IEEE , 2015, s. Article number 7301431-Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The Multi-Resource Server (MRS) technique has been proposed to enable predictable execution of memory intensive real-time applications on COTS multi-core platforms. It uses resource reservation approaches in the context of CPUbandwidth and memory-bus bandwidth reservations to bound the interference between the applications running on the same core as well as between the applications running on different cores. In this paper we present a complete composable local and global schedulability analysis for the Multi-Resource Server technique. Based on the proposed analysis,we further provide an experimental study that investigates the behaviour of the MRS and identifies the factors that contribute mostly on the overall system performance.

  • 113.
    Inam, Rafia
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Sjödin, Mikael
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Compositional analysis for the multi-resource server - a technical report.2014Rapport (Fagfellevurdert)
    Abstract [en]

    The Multi-Resource Server (MRS) technique has been proposed toenable predictable execution of memory intensive real-time applicationson COTS multi-core platforms. It uses resource reservationapproaches in the context of CPU-bandwidth and memory-busbandwidth reservations to bound the interferences between the applicationsrunning on the same core as well as between the applicationsrunning on different cores. In this paper we present a completecompositional schedulability analysis for the Multi-ResourceServer technique. Based on the proposed analysis, we further providean experimental study that investigates the behaviour of theMRS and identify the factors that contribute mostly on the overallsystem performance.

  • 114.
    Inam, Rafia
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Mahmud, Nesredin
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Sjödin, Mikael
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    The Multi-Resource Server for Predictable Execution on Multi-core Platforms2014Inngår i: Real-Time Technology and Applications - Proceedings, 2014, Vol. October, s. 1-11Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In this paper we present an implementation and demonstration of the Multi-Resource Server (MRS) which enables predictable execution of real-time applications on multi-core platforms. The MRS provides temporal isolation both between tasks running on the same core, as well as, between tasks running on different cores. The latter could, without MRS, interfere with each other due to contention on a shared memory bus. We demonstrate that MRS can be used to ”encapsulate” legacy systems and to give them enough resources to fulfill their purpose. In our case study a legacy media-player is integrated with several resource-hungry tasks running at a different core. We show that without MRS the media-player starts to drop frames due to the interference from other tasks; while introduction of MRS alleviates this problem. Another part of our demonstration shows how traditional periodic real-time tasks can be kept schedulable even when tasks with high memory-demand are added to the system.

  • 115.
    Inam, Rafia
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Slatman, Joris
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Sjödin, Mikael
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Towards Implementing Multi-resource Server on Multi-core Linux Platform2013Inngår i: Proceedings of 18th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA2013), 2013, s. Article number 6648167-Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In this paper we present our ongoing work on implementing the multi-resource server technology in the Linux operating system running on multi-core architectures. The multiresource server is used to control the access to both CPU and memory bandwidth resources such that the execution of real-time tasks become predictable. We are targeting Legacy applications to be migrated from single to multi-core architectures. We investigate the available techniques and mechanisms that can support our multi-resource servers and we discuss the potential problems that needed to be tackled considering the requirements of legacy applications.

  • 116.
    Iqbal, Zahid
    et al.
    University of Porto.
    Almeida, Luis
    University of Porto.
    Marau, Ricardo
    University of Porto.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Implementing Hierarchical Scheduling on COTS Ethernet Switches Using a Master/Slave Approach2012Inngår i: 7th IEEE International Symposium on Industrial Embedded Systems (SIES'12), Conference proceedings, 2012, s. 76-84Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Hierarchical scheduling is instrumental to efficiently deploy component-based designs and achieve composability. It allows partitioning resources into multiple levels, hiding the complexity within each partition behind its respective interface. In this paper we focus on the network resource, particularly on Ethernet using ordinary COTS switches, and we show how hierarchical scheduling can be efficiently deployed using a master/slave approach that enforces the temporal properties of the partitions. We use the FTT-SE protocol for being open source and a bandwidth efficient master/slave alternative currently available for real-time communication over Ethernet. We present a response-time analysis for the traffic submitted within each partition and we validate it using experimental results obtained from a prototype implementation. In particular, the results highlight the strong partitioning capabilities of our approach, with full temporal isolation across partitions in different branches of the hierarchy.

  • 117.
    Johansson, Bjarne
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system. ABB Industrial Automation, Process Control Platform, Västerås, Sweden.
    Leander, Björn
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system. ABB Industrial Automation, Process Control Platform, Västerås, Sweden.
    Causevic, Aida
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Papadopoulos, Alessandro
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Classification of PROFINET I/O Configurations utilizing Neural Networks2019Inngår i: IEEE International Conference on Emerging Technologies and Factory Automation, ETFA, Institute of Electrical and Electronics Engineers Inc. , 2019, s. 1321-1324Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In process automation installations, the I/O system connect the field devices to the process controller over a fieldbus, a reliable, real-time capable communication link with signal values cyclical being exchanged with a 10-100 millisecond rate. If a deviation from intended behaviour occurs, analyzing the potentially vast data recordings from the field can be a time consuming and cumbersome task for an engineer. For the engineer to be able to get a full understanding of the problem, knowledge of the used I/O configuration is required. In the problem report, the configuration description is sometimes missing. In such cases it is difficult to use the recorded data for analysis of the problem.In this paper we present our ongoing work towards using neural network models as assistance in the interpretation of an industrial fieldbus communication recording. To show the potential of such an approach we present an example using an industrial setup where fieldbus data is collected and classified. In this context we present an evaluation of the suitability of different neural net configurations and sizes for the problem at hand.

  • 118.
    Johansson, Bjarne
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system. ABB, Västeras, Sweden.
    Papadopoulos, Alessandro
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Concurrency defect localization in embedded systems using static code analysis: An evaluation2019Inngår i: Proceedings - 2019 IEEE 30th International Symposium on Software Reliability Engineering Workshops, ISSREW 2019, Institute of Electrical and Electronics Engineers Inc. , 2019, s. 7-12Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Defects with low manifestation probability, such as concurrency defects, are difficult to find during testing. When such a defect manifests into an error, the low likelihood can make it time-consuming to reproduce the error and find the root cause. Static Code Analysis (SCA) tools have been used in the industry for decades, mostly for compliance checking towards guidelines such as MISRA. Today, these tools are capable of sophisticated data and execution flow analysis. Our work, presented in this paper, evaluates the feasibility of using SCA tools for concurrency defect detection and localization. Earlier research has categorized concurrency defects. We use this categorization and develop an object-oriented C++ based test suite containing defects from each category. Secondly, we use known and real defects in existing products' source code. With these two approaches, we perform the evaluation, using tools from some of the largest commercial actors in the field. Based on our results, we provide a discussion about how to use static code analysis tools for concurrency defect detection in complex embedded real-Time systems.

  • 119.
    Kaczynski, Giordano A.
    et al.
    University of Catania, Catania, Italy .
    Lo Bello, Lucia
    University of Catania, Catania, Italy .
    Nolte, Thomas
    Mälardalens högskola, Institutionen för datavetenskap och elektronik.
    Deriving Exact Stochastic Response Times of Periodic Tasks in Hybrid Priority-driven Soft Real-time Systems2007Inngår i: Proceedings of 12th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA'07), Patras, Greece, 2007, s. 101-110Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The aim of this paper is to allow for hybrid task sets in the context of stochastic real-time analysis. The paper goes beyond previous work by allowing for the presence of aperiodic tasks in the system. Instead of representing a task with a fixed activation period and a Worst-Case Execution Time (WCET), here a task is characterized by an Arrival Profile (AP) and an Execution Time Profile (ETP), both given by random variables with known distributions. Any number of aperiodic tasks, with arbitrary arrival and execution time profiles, can be dealt with. To cope with the unbounded interference introduced by aperiodic tasks in the system, sporadic and aperiodic tasks are encapsulated within servers. The paper presents the calculus for obtaining the exact ETP of servers, which allows us to derive exact response time distributions of periodic tasks. Also, an example is used to show the potential and validity of the proposed approach. 

  • 120.
    Kaczynski, Giordano A.
    et al.
    University of Catania.
    Lo Bello, Lucia
    University of Catania.
    Nolte, Thomas
    Mälardalens högskola, Institutionen för datavetenskap och elektronik.
    Towards stochastic response-time of hierarchically scheduled real-time tasks2006Inngår i: IEEE Symposium on Emerging Technologies and Factory Automation, ETFA, 2006, s. 453-456Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The growing need for providing real-time system designers with less pessimistic results than the ones given by traditional worst-case analysis motivates several recent works on stochastic analysis methods. This paper deals with the calculation of stochastic Response Time Profiles of tasks that are hierarchically scheduled using server-based techniques in a stochastic analysis framework. Depending on how tasks are scheduled within the server, differences in temporal performance are expected. In the paper, initial results on calculating the Response Time Profiles for these server-scheduled tasks are outlined.

  • 121.
    Keskin, U.
    et al.
    Technische Universiteit Eindhoven.
    Van Den Heuvel, M. M. H. P.
    Technische Universiteit Eindhoven.
    Bril, R. J.
    Technische Universiteit Eindhoven.
    Lukkien, J. J.
    Technische Universiteit Eindhoven.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    An engineering approach to synchronization based on overrun for compositional real-time systems2011Inngår i: SIES 2011 - 6th IEEE International Symposium on Industrial Embedded Systems, Conference Proceedings, 2011, s. 274-283Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Hierarchical scheduling frameworks (HSFs) provide means for composing complex real-time systems from well-defined independently developed and analyzed subsystems. To support shared logical resources requiring mutual exclusive access in two-level HSFs, overrun without payback has been proposed as a mechanism to prevent budget depletion during resource access arbitrated by the stack resource policy (SRP). In this paper, we revisit the global schedulability analysis of synchronization protocols based on SRP and overrun without payback for fixed-priority scheduled HSFs. We derive a new global schedulability analysis based on the observation that the overrun budget is merely meant to prevent budget depletion during global resource access. The deadline of a subsystem therefore only needs to hold for its normal budget rather than the sum of the normal and overrun budget. Our novel analysis is considerably simpler than an earlier, initially improved analysis, which improved both the original local and global schedulability analyses. We evaluate the new analysis based on an extensive simulation study and compare the results with the existing analysis. Our simplified analysis does not significantly affect schedulability compared to the initially improved analysis. It is therefore proposed as a preferable engineering approach to synchronization protocols for compositional real-time systems. We accordingly present the implementation of our improvement in an OSEK-compliant real-time operating system to sketch its applicability in today's industrial automotive standards. Both implementation and run-time overheads are discussed providing measured results1. © 2011 IEEE.

  • 122.
    Keskin, Ugur
    et al.
    Technische Universiteit Eindhoven.
    J. Bril, Reinder
    Technische Universiteit Eindhoven.
    Lukkien, Johan
    Technische Universiteit Eindhoven.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Improving the global schedulability analysis of overrun without payback2010Inngår i: Proceedings of the Work-In-Progress (WIP) session of the 22nd Euromicro Conference on Real-Time Systems (ECRTS'10) / [ed] Robert I. Davis, 2010Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Overrun without payback has been proposed asa mechanism for a stack resource policy (SRP) based synchronizationprotocol for hierarchical scheduling frameworks(HSFs). In this paper we reconsider the global schedulabilityanalysis of an HSF based on two-level fixed-priority preemptivescheduling (FPPS) using overrun without payback asa mechanism. Improved analysis is presented based on theobservation that there is no need to guarantee the overrunbudget before the end of the budget period, because thatadditional amount of resources is only meant to prevent depletionof a budget during global resource access. The resultingimprovement is illustrated by means of an example. Thepossibility to discard the remainder of an overrun budget upona replenishment is briefly considered as a further improvementand its potential is shown using the same example.

  • 123.
    Khalilzad, Nima
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Ashjaei, Mohammad
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Almeida, Luis
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system. IT/DEEC/University of Porto, Portugal.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Adaptive Multi-Resource End-to-End Reservations for Component-Based Distributed Real-Time Systems2015Inngår i: ESTIMedia 2015 - 13th IEEE Symposium on Embedded Systems for Real-Time Multimedia, 2015, s. Article number 7351772-Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Complexity in the real-time embedded softwaredomain has been growing rapidly. The component-based softwaredevelopment approach facilitates the development process of suchsoftware systems by dividing a complex system into a numberof simpler components. Resource reservation techniques havebeen widely used for providing resources to real-time softwarecomponents. In this paper we target real-time components operatingon a distributed resource infrastructure. Furthermore,we target a class of software components which demonstratedynamic resource consumption behavior. A prime example ofsuch components is a multimedia software component. In thepaper, we present a framework supporting multi-resource endto-end resource reservations. We reserve resource bandwidths onboth processor resources as well as on the network resources. Theproposed framework utilizes a Multiple Input Multiple Output(MIMO) controller which adjusts the sizes of reservations trackingthe dynamic resource demands of the software components. Finally, we present a case study using a multimedia component todemonstrate the performance and efficiency of our framework.

  • 124.
    Khalilzad, Nima
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Ashjaei, Mohammad
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Almeida, Luis
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system. University of Porto, Portugal.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Towards Adaptive Resource Reservations for Component-Based Distributed Real-Time Systems2015Inngår i: ACM SIGBED Review - Special Issue on the 7th Workshop on Adaptive and Reconfigurable Embedded Systems (APRES 2015), 2015, s. 24-27Konferansepaper (Fagfellevurdert)
    Abstract [en]

    —In this paper we present our ongoing work on developing a framework supporting adaptive resource reservations targeting component-based distributed real-time systems. The components may be spread over different resources in a distributed system. The proposed framework utilizes a reservationbased scheduling technique in which the sizes of reservations are adjusted during run-time to deal with dynamic resource demands of the software components. We present our modeling approach, we describe design options made and we present corresponding challenges.

  • 125.
    Khalilzad, Nima
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    An Adaptive Scheduling Framework for Component-Based Real-Time Systems2015Rapport (Annet vitenskapelig)
  • 126.
    Khalilzad, Nima
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    On Component-Based Software Development for Multiprocessor Real-Time Systems2015Inngår i: Proceedings - IEEE 21st International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2015, 2015, s. 132-140Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Component-based software development providesa modular approach to develop complex software systems. In the context of real-time systems, it is desirable to abstract the timing properties of software components using an interface foreach component. The timing properties of the whole system, composed of multiple components, is studied using the component interfaces. In this paper we focus on periodic interface models. In the case of components developed for single processor platforms, for examining the system schedulability, the interfaces can be regarded as periodic tasks. Thus, making it possible to use the conventional schedulability analyses for the system level schedulability test. In the case of components developed formultiprocessors, since interfaces may have utilization larger than 100 % of a single processor, it is not possible to directly use the component interfaces for the system schedulability test. There-fore, the interfaces have to be decomposed before performing thesystem level schedulability test. In this paper, we target the special case of partitioned EDF for scheduling the components integrated on a multiprocessor. Therefore, the system level schedulability test is equivalent to finding a feasible allocation of component interfaces on the multiprocessor. We propose two algorithms for allocating the multiprocessor periodic interfaces. In addition, we propose anorthogonal approach for developing component-based real-timesystems on multiprocessors in which components with utilizationmore than 100 % of a single processor are divided into smaller subcomponents before abstracting their interfaces. We show, through extensive evaluations, that our alternative approach significantly reduces the interface overhead.

  • 127.
    Khalilzad, Nima
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Faragardi, Hamid Reza
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Towards Energy-Aware Placement of Real-Time Virtual Machines in a Cloud Data Center2015Inngår i: Proceedings - 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security and 2015 IEEE 12th International Conference on Embedded Software and Systems, HPCC-CSS-ICESS 2015, 2015, s. 1657-1662Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Cloud computing is an evolving paradigm which is becoming an adoptable technology for a variety of applications. However, cloud infrastructures must be able to fulfill application requirements before adopting cloud solutions. Cloud infrastructure providers communicate the characteristics of their services to their customers through Service Level Agreements (SLA). In order for a real-time application to be able to use cloud technology, cloud infrastructure providers have to be able to provide timing guarantees in the SLAs. In this paper, we present our ongoing work regarding a cloud solution in which periodic tasks are provided as a service in the Software as a Service (SaS) model. Tasks belonging to a certain application are mapped in a Virtual Machine (VM). We also study the problem of VMplacement on a cloud infrastructure. We propose a placement mechanism which minimizes the energy consumption of the data center by consolidating VMs in a minimum number of servers while respecting the timing requirement of virtual machines.

  • 128.
    Khalilzad, Nima
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Kong, Fanxin
    McGill University, Canada.
    Liu, Xue
    McGill University, Canada.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    A Feedback Scheduling Framework for Component-Based Soft Real-Time Systems2015Inngår i: 21th IEEE Real-Time and Embedded Technology and Applications Symposium RTAS'15, 2015, s. 182-193Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Component-based software systems with real-time requirements are often scheduled using processor reservation techniques. Such techniques have mainly evolved around hard real-time systems in which worst-case resource demands are considered for the reservations. In soft real-time systems, reserv- ing the processors based on the worst-case demands results in unnecessary over-allocations. In this paper, targeting soft real-time systems running on multiprocessor platforms, we focus on components for which processor demand varies during run-time. We propose a feedback scheduling frameworkwhere processor reservations are used for scheduling components. The reservation bandwidths as well as the reservation periods are adapted using MIMO LQR controllers. We provide an allocation mechanism for distributing components over processors. The proposed framework is implemented in the TrueTime simulation tool for system identification. We use a case study to investigate the performance of our framework in the simulation tool. Finally, the framework is implemented in the Linux kernel for practical evaluations. The evaluation results suggest that the framework can efficiently adapt the reservation parameters during run-time by imposing negligible overhead.

  • 129.
    Khalilzad, Nima Moghaddami
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Towards adaptive hierarchical scheduling of overloaded real-time systems2011Inngår i: SIES 2011 - 6th IEEE International Symposium on Industrial Embedded Systems, Conference Proceedings, 2011, s. 39-42Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In a hierarchical scheduling framework, a resource can be shared among modules with different criticality levels. In our recently introduced adaptive hierarchical scheduling framework, modules receive a dynamic portion of the CPU during run-time. While providing temporal isolation is one of the main advantages of hierarchical scheduling, in an adaptive framework, for example when the CPU is overloaded, the higher priority modules can violate timing guarantees of the lower priority modules. However, the priorities of modules are assigned based on parameters other than the module criticality levels. For example the priority is often assigned according to periods and deadlines of tasks to increase the CPU utilization assuming static systems, i.e. modules parameters do not change during runtime. In an overload situation the high criticality modules should be superior to the low criticality modules in receiving resources. In this paper, extending our adaptive framework, we propose two techniques for controlling the CPU distribution among modules in an overload situation. We are taking another step towards having a complete adaptive hierarchical scheduling framework by incorporating an overload controller into our framework.

  • 130.
    Kienle, Holger
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Kraft, Johan
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    System-specific static code analyses: a case study in the complex embedded systems domain2012Inngår i: Software quality journal, ISSN 0963-9314, E-ISSN 1573-1367, Vol. 20, nr 2, s. 337-367Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    In this paper, we are exploring the approach to utilize system-specific static analyses of code with the goal to improve software quality forspecific software systems. Specialized analyses, tailored for a particular system, make it possible to take advantage of system/domainknowledge that is not available to more generic analyses. Furthermore, analyses can be selected and/or developed in order to best meet the challenges and specific issues of the system at hand. As a result, such analyses can be used as a complement to more generic code analysistools because they are likely to have a better impact on (business) concerns such as improving certain software quality attributes and reducing certain classes of failures. We present a case study of a large, industrial embedded system, giving examples of what kinds of analyses could be realized and demonstrate the feasibility of implementing such analyses. We synthesize lessons learned based on our case study and provide recommendations on how to realize system-specific analyses and how to get them adopted by industry.

  • 131.
    Kienle, Holger
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Kraft, Johan
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    System-specific Static Code Analyses for Complex Embedded Systems2010Konferansepaper (Fagfellevurdert)
  • 132.
    Kraft, Johan
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Kienle, Holger
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Crnkovic, Ivica
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Hansson, Hans
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Software Maintenance Research in the PROGRESS Project for Predictable Embedded Software Systems2011Inngår i: 15th European Conference on Software Maintenance and Reengineering (CSMR'11) / [ed] Mens, T; Kanellopoulos, Y; Winter, A, Los Alamitos: IEEE Computer Society, 2011, s. 335-338Konferansepaper (Fagfellevurdert)
    Abstract [en]

    PROGRESS is a project and strategic research centre at Malardalen University in Sweden that is funded for 2006-2010 by the Swedish Foundation for Strategic Research (SSF). PROGRESS research targets embedded software in the vehicular, automation, and telecom domains, focusing on the areas of component technology, verification and analysis for predictability, predictable execution, as well as reuse and maintenance of legacy embedded software. We first describe the funding, organization and research areas of PROGRESS, and then give several examples of PROGRESS research that addresses maintenance of legacy embedded software with the goal to improve program comprehension, quality assurance, and debugging. Specifically, we describe research in tracing and trace visualization, impact analysis of temporal behavior, slicing, and system-specific static analyses.

  • 133.
    Kraft, Johan
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Continuous Constant-Memory Monitoring of Embedded Software Timing2011Inngår i: 2nd International Workshop on Analysis Tools and Methodologies for Embedded and Real-time Systems (WATERS'11), satellite workshop of EUROMICRO Conference on Real-Time Systems (ECRTS'11), 2011Konferansepaper (Fagfellevurdert)
    Abstract [en]

    A method is presented for generating statistical models of timing data continuously over very long monitoring sessions. This method is intended for memory-efficient runtime modeling of timing properties in embedded software systems, such as execution times or inter-arrival times, but is a quite generic method that should be applicable for other purposes and domains as well. Specifically, we intend to use this method as a component in automatic generation of simulation models for probabilistic timing analysis of complex embedded software systems. Given a stream of data as input, this method gradually builds up a statistical model capturing the approximate distribution of the data. The method uses a modest and fixed amount of on-target RAM, decided by the desired accuracy of the model, and allows for long monitoring sessions covering billions of data points. The paper presents the motivation, algorithm, a prototype implementation and evaluation using real execution time data from an ARM7 microcontroller.

  • 134.
    Lager, Anders
    et al.
    ABB AB, Västerås, Sweden.
    Spampinato, Giacomo
    ABB AB, Västerås, Sweden.
    Papadopoulos, Alessandro
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Towards Reactive Robot Applications in Dynamic Environments2019Inngår i: The 24th IEEE Conference on Emerging Technologies and Factory Automation ETFA2019, 2019, s. 1603-1606Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Traditionally, industrial robots have been deployed in fairly static environments, to perform highly dedicated tasks. These robots perform with very high precision and throughput. However, nowadays there is an increasing demand for utilizing robots in more dynamic environments, also performing more flexible and less specialized operations — high mix/low volume. Both traditional industrial robots and force-limited robots are used in collaborative, dynamic environments. Such robot applications introduce new challenges when it comes to efficiency and robustness. In this paper, we propose an architecture for reactive multi-robot applications in the context of dynamic environments, and we analyze the main research challenges that must be tackled for its realization. A logistics use case, with robots picking customer orders from the shelves of a warehouse, is used as a running example to support the description of the key challenges.

  • 135.
    Lindgren, M.
    et al.
    ABB Corporate Research, Västerås, Sweden .
    Sandström, K.
    ABB Corporate Research, Västerås, Sweden .
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Hallmans, D.
    ABB AB, Ludvika, Sweden.
    Applicability of using internal GPGPUs in industrial control systems2014Inngår i: 19th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2014, 2014, s. Article number 7005096-Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Industrial control systems are continuously increasing in functionality, connectivity, and levels of integration, and as a consequence they require more computational power. At the same time, these systems have specific requirements related to cost, reliability, timeliness, and thermal power dissipation, which put restrictions on the hardware and software used. Today the high-end embedded CPUs not only provide multiple cores, but also integrated graphics processors (GPU) at close to no additional cost. The use of GPUs for general processing have several potential values in industrial control systems; 1) the added computational power and the high parallelism could pave way for new functionality and 2) the integrated GPU could potentially replace other hardware and thereby reduce the overall cost. In this paper we investigate the applicability of using integrated GPUs in industrial control systems. We do this by evaluating the performance of GPUs with respect to computational problem types and sizes typically found in industrial control systems. In the end we conclude that GPUs are no obvious match for industrial control systems and that several hurdles remain before a wide adoption can be motivated. 

  • 136. Liu, Meng
    et al.
    Becker, Matthias
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    A dependency-graph based priority assignment algorithm for real-time traffic over NoCs with shared virtual-channels2016Inngår i: IEEE International Workshop on Factory Communication Systems - Proceedings, WFCS, 2016, artikkel-id Article number 7496504Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The Network-on-Chip (NoC) is the on-chip interconnection medium of choice for modern massively parallel processors and System-on-Chip (SoC) in general. Fixed-priority based preemptive scheduling using virtual-channels is a solution to support real-time communications in on-chip networks. Targeting the priority assignment problem in the context of NoCs, heuristic based priority assignment algorithms are more practical, due to the exponentially increased search space as the number of flows goes up. In our previous work, we have proposed a graph-based heuristic priority assignment algorithm (called GHSA) for NoC communications, where we show that taking the dependencies between flows into account can significantly reduce the search space. However, GHSA only works for NoCs with distinct priorities. Routers in such type of platforms may have a large amount of buffer cost when the number of flows is high. The applicability can thus be limited in reality. One solution to reduce the buffer cost is to allow priority sharing of different flows. In this paper, we propose a dependency-graph based priority assignment algorithm (called eGHSA) targeting NoCs with shared virtual-channels. A number of experiments as well as a case study based on an automotive application are generated, which clearly show that eGHSA improves the efficiency compared to the existing solution in the literature. 

  • 137.
    Liu, Meng
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Becker, Matthias
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    A Tighter Recursive Calculus to Compute the Worst-Case Traversal Time of Real-Time Traffic over NoCs2017Inngår i: 2017 22ND ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2017, s. 275-282, artikkel-id 7858332Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Network-on-Chip (NoC) is a communication subsystem which has been widely utilized in many-core processors and system-on-chips in general. In this paper, we focus on a Round-Robin Arbitration (RRA) based wormhole-switched NoC which is a common architecture used in most of the existing implementations. In order to execute real-time applications on such a NoC based platform, a number of given real-time requirements need to be fulfilled. One of the most typical requirements is schedulability which refers to if real-time packets can be delivered within the given time durations. Timing analysis is a common tool to verify the schedulability of a real-time system. Unfortunately, the existing timing analyses of RRA-based NoCs either provide too pessimistic estimates which results in overly allocated resources, or require a large amount of processing which limits the applicability in reality. Therefore, in this paper, we present an improved timing analysis, aiming to provide more accurate estimates along with acceptable computation time. From the evaluation results, we can clearly observe the improvement achieved by the proposed timing analysis.

  • 138.
    Liu, Meng
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Becker, Matthias
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Buffer-Aware Analysis for Worst-Case Traversal Time of Real-Time Traffic over RRA-based NoCs2017Inngår i: Proceedings - 2017 25th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2017, 2017, s. 567-575, artikkel-id 7912705Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Network-on-Chip (NoC) is a communication sub-system which has been widely utilized in many-core processors and system-on-chips in general. In order to execute time-critical applications on a NoC-based platform, the timing behavior of the network needs to be predicted during system design. One of the most important timing requirements is regarding schedulability, which refers to determining if a real-time packet can be delivered within a specific time duration. To verify the fulfillment of such timing requirement, a proper timing analysis is mandatory. Our work focuses on a Round-Robin Arbitration (RRA) based wormhole-switched NoC, which is a common architecture used in many of the existing implementations. Recursive Calculus (RC) is one of the existing analysis approaches for RRA-based NoCs which has been utilized in many research works. However, RC does not take buffer-effects into account. As a result, while performing RC on most of the existing RRA-based NoC designs, it can produce unsafe estimates which is not acceptable for time-critical systems. In this paper, we identify the optimistic problem of RC, and we propose a Revised Recursive Calculus (RRC) which extends RC by considering buffer-effects as well as supporting packetization.

  • 139.
    Liu, Meng
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Becker, Matthias
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Improved Priority Assignment for Real-Time Communications in On-Chip Networks2015Inngår i: ACM International Conference Proceeding SeriesVolume 04-06, 2015, s. 171-180Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The Network-on-Chip is the on-chip interconnection medium of choice for modern massively parallel processors and System-on-Chip in general. Fixed-priority based preemptive scheduling using virtual-channels is a solution to support real-time communications in on-chip networks. However, the different characteristics of the Network-on-Chip compared to the single processor scheduling problem prevents the usage of known optimal algorithms (e.g. the Audsley's algorithm) to assign priorities to messages. A heuristic search algorithm based approach (called the HSA) focusing on the priority assignment for on-chip communications has been presented in the literature. The HSA is much faster than an exhaustive search based solution, with a price of missing certain schedulable cases (i.e. non-optimal). In this paper, we present two undirected-graph based priority assignment algorithms, the GESA and the GHSA. In contrast to the previous work, we can decrease the search space significantly by taking the interference dependencies of different messages on the network into account. A number of experiments are generated, in order to evaluate the proposed algorithms. The results show that the GESA can always achieve higher schedulability ratios than the HSA, but may require longer processing time. On the other hand, the GHSA has the same performance as the HSA regarding the schedulability, but can significantly improve the efficiency.

  • 140.
    Liu, Meng
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Becker, Matthias
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Using Non-Preemptive Regions and Path Modification to Improve Schedulability of Real-Time Traffic over Priority-Based NoCs2017Inngår i: Real-time systems, ISSN 0922-6443, E-ISSN 1573-1383, nr 6, s. 886-915Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    Network-on-Chip (NoC) is a preferred communication medium for massively parallel platforms. Fixed-priority based scheduling using virtual-channels is one of the promising solutions to support real-time traffic in on-chip networks. Most of the existing works regarding priority-based NoCs use a flit-level preemptive scheduling. Under such a mechanism, preemptions can only happen between the transmissions of successive flits but not during the transmission of a single flit. In this paper, we present a modified framework where the non-preemptive region of each NoC packet increases from a single flit. Using the proposed approach, the response times of certain traffic flows can be reduced, which can thus improve the schedulability of the whole network. As a result, the utilization of NoCs can be improved by admitting more real-time traffic. Schedulability tests regarding the proposed framework are presented along with the proof of the correctness. Additionally, we also propose a path modification approach on top of the non-preemptive region based method to further improve schedulability. A number of experiments have been performed to evaluate the proposed solutions, where we can observe significant improvement on schedulability compared to the original flit-level preemptive NoCs. 

  • 141.
    Liu, Meng
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Becker, Matthias
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Using Segmentation to Improve Schedulability of RRA-based NoCs with Mixed Traffic2017Inngår i: 2017 22ND ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2017, s. 744-750, artikkel-id 7858413Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Network-on-Chip (NoC) is the interconnect of choice for many- core processors and system-on-chips in general. Most of the exist- ing NoC designs focus on the performance with respect to average throughput, which makes them less applicable for real-time appli- cations especially when applications have hard timing requirements on the worst-case scenarios. In this paper, we focus on a Round- Robin Arbitration (RRA) based wormhole-switched NoC which is a common architecture used in most of the existing implementa- tions. We propose a novel segmentation algorithm targeting RRA- based NoCs in order to improve the schedulability of real-time traf- fic without modifying the hardware architecture. Additionally, we also address the problem of transmitting both real-time traffic and best-effort traffic in the same NoC. The proposed solutions aim to provide timing guarantees to real-time traffic and achieve low la- tency for best-effort traffic. According to the evaluation results, the proposed segmentation solution can significantly improve the schedulability of the whole network.

  • 142.
    Liu, Meng
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Kato, Shinpei
    Nagoya University, Nagoya, Japan.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    A Server-based Approach for Overrun Management in Multi-Core Real-Time Systems2014Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper presents a server-based framework for task overrun management in multi-core real-time systems. Unlike most existing scheduling methods which usually assume a single upper bound of the Worst-Case Execution Time (WCET) for each task, our approach targets scenarios with task overruns. The main idea of our framework is to employ Synchronized Deferrable Servers (SDS) to deal with globally scheduled task overruns, while a partitioned scheduling approach is applied on regular task executions. Moreover, we provide a deterministic Worst- Case Response Time (WCRT) analysis focusing on hard timing constraints, along with a probabilistic analysis of Deadline Miss Ratio (DMR) for soft real-time applications. In the evaluation phase, we have implemented two types of experiments evaluating different timing constraints. 

  • 143.
    Liu, Meng
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Kato, Shinpei
    Nagoya University, Nagoya, Japan.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    An Adaptive Server-Based Scheduling Framework with Capacity Reclaiming and Borrowing2014Inngår i: RTCSA 2014 - 20th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2014, s. Article number 6910548-Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In this paper, we present a new reservation based scheduling framework for soft real-time systems using EDF algorithm (called CARB-EDF). This framework has the features of Capacity Adaptation, Reclaiming and Borrowing. This framework can simplify the initial configuration of the system, where the system designer does not need to provide any estimations of task execution times. We also present a Chebyshev’s inequality based predictor to estimate task execution times. A number of simulation-based experiments have been implemented. According to the results compared with some related works, our scheduling framework can provide a better performance with acceptable extra scheduling overhead. 

    Fulltekst (pdf)
    fulltext
  • 144.
    Liu, Meng
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    A Stochastic Response Time Analysis for Communications in On-Chip Networks2015Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Priority-based wormhole-switching has been proposed as a solution to handle real-time traffic in on-chip networks. In order to support real-time traffic, the predictability of end-toend delays need to be guaranteed. Several deterministic schedulability analysis approaches for wormhole-switched networks have been proposed. These approaches calculate a single upper-bound of the response time of each Network-on-Chip (NoC) flow, which is suitable for hard real-time applications. However, for many soft real-time applications, the performance does not depend on the worst-case scenario, which means that the calculated single upper-bounds are not sufficient to represent the performance. Therefore, in this paper, we present a stochastic Response Time Analysis (RTA) which can calculate a distribution of the response times of a real-time NoC flow. The estimated distributions can be utilized for multiple purposes, such as calculating deadline miss ratios, and computing upper-bounds regarding different probabilities. A number of simulation-based experiments are generated in order to investigate the pessimism involved in the analysis. Moreover, the processing time of the analysis is also measured from the experiments in order to examine the scalability of the proposed approach.

  • 145.
    Liu, Meng
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    An EVT-based Worst-Case Response Time Analysis of Complex Real-Time Systems2013Inngår i: Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, SIES 2013, 2013, s. 249-258Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In recent years, the complexity of real-time embedded systems has increased dramatically. For those modern real-time systems, the limitations of original static Response Time Analysis (RTA) become more and more conspicuous. Most static analysis methods not only require much detailed system information, but also only target to some specific system model with non-realistic assumptions. As a result, those methods may produce overly pessimistic results, making them unsuitable to be applied on a complex industrial system. The best system model may be the system itself. Therefore, statistical RTA, which can produce probabilistic analysis results based on samples provided by real systems or simulators, may become more expedient. Statistical RTA usually requires more relaxed assumptions and less system information than static RTA. In this paper, we present an Extreme Value Theory (EVT) based method to compute Worst-Case Response Time (WCRT) targeting complex real-time systems. In the evaluation phase, we have applied this method to the calculation of worst-case transmission delays of messages over Controller Area Network (CAN), and some comparisons with static RTA are also provided. According to the experimental results, as the system complexity increases, our approach performs much more stable and less pessimistic.

  • 146.
    Liu, Meng
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Applying the Peak Over Thresholds Method on Worst-Case Response Time Analysis of Complex Real-Time Systems2013Inngår i: 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2013, 2013, s. 22-31Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The predictability of timing behavior is a very important performance issue of a real-time system. As the complexity of modern industrial systems increases, analyzing the timing behaviors of those systems becomes more and more challenging. Most of the existing analysis methods depend on static and detailed information of the systems under analysis. However, sometimes only partial information of a system can be available, or it may require too much effort on obtaining those details, making those analysis methods much less feasible. Moreover, those methods usually focus on some specific system models with unrealistic assumptions, consequently, applying those methods on a complex industrial real-time system may result in overly pessimistic results. Therefore, in this paper, we propose a statistical method to compute Worst-Case Response Times (WCRTs) of complex real-time systems regarding soft timing constraints, which can provide a higher general applicability with less required system information. Our approach employs a Peak Over Thresholds (POT) method, which is a branch of the Extreme Value Theory (EVT). For the evaluation, we have applied this approach on the analysis of message transmission latencies over Controller Area Networks (CAN).

  • 147.
    Liu, Meng
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Schedulability analysis of GMF-modeled messages over controller area networks with mixed-queues2014Inngår i: IEEE Int. Workshop Factory Commun. Syst. Proc. WFCS, 2014, s. Article number 6837606-Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The Controller Area Network (CAN) is widely utilized in many industrial real-time applications. As a real-time communication network, the predictability of timing behaviors is very important. Therefore, many works have been proposed regarding the schedulability analysis of CAN messages. Most of the existing analysis approaches are based on a traditional periodic message model. However, in some applications, the transmission of a message may follow a certain pattern instead of repeating the same transmission period by period. In these cases, applying the existing analysis methods may lead to quite pessimistic results. In order to tackle this problem, in this paper we apply the Generalized Multi-Frame (GMF) task model on CAN messages, where both priority-based and FIFO-based message queues are taken into account. We present a corresponding sufficient schedulability analysis. According to the experimental evaluations, our analysis can provide tighter results compared to the existing CAN message response time analysis in the context of GMF-modeled messages. 

  • 148.
    Liu, Meng
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Schedulability analysis of Multi-Frame messages over Controller Area Networks with mixed-queues2013Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The Controller Area Network (CAN) is one of the most widely utilized real-time communication networks, which has plenty of applications especially in automotive industry. Many works have been proposed regarding the CAN schedulability analysis which is very important for guaranteeing the safety and reliability of hard real-time systems. Most of the existing analysis methods assume a periodic message model, and some of them take sporadic messages into account. However, for some applications, message transmissions may follow a specific pattern instead of repeating the same transmission period by period, where applying the existing methods may include much pessimism. In this paper, we apply the Multi-Frame task model, which is first proposed by Mok and Chen in cite{MokChen}, on CAN messages. Moreover, we assume that the ECUs in the analyzed network can employ both FIFO and priority based queues. The schedulability analysis and the corresponding proofs are provided along with a case study.

  • 149.
    Liu, Meng
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Almeida, Luis
    University of Porto.
    Response time analysis for static priority based SpaceWire networks2012Inngår i: Proceeings of the 2nd International Workshop on Worst-Case Traversal Time (WCTT '12), 2012, s. 7-14Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The SpaceWire network standard is used in spacecraft communications and has been selected for future ESA satellites. In order to guarantee the safety and reliability of on-board systems, the designers have to make sure that all critical timing constraints are satisfied. The SpaceWire network is a wormhole based network which makes its timing analysis significantly complex. Some methods for computing upper-bounds of end-to-end delays of certain wormhole network models have been developed. However, those models require some explicit assumptions and dedicated real-time mechanisms which cannot be supported by the current SpaceWire networks. Moreover, some work has proposed analysis approaches for SpaceWire networks assuming the Round-Robin arbitration scheme only. In this paper, we focus on the priority based arbitration scheme instead and we propose a worst-case response time analysis to evaluate the end-to-end delays of traffic transmissions in SpaceWire networks. The corresponding proofs to our analysis are presented along with a case study. © 2012 ACM.

  • 150.
    Liu, Meng
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Mubeen, Saad
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Behnam, Moris
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nolte, Thomas
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Towards Stochastic Response Time Analysis for CAN Messages with Multiple Probabilistic Factors2015Inngår i: The 21st IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, WiP RTCSA-wip'15, Hong Kong, HongKong, 2015Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Controller Area Network (CAN) is a widely used real-time network in the vehicular domain. In this paper we identify and discuss two practical parameters, namely message copy time and mixed transmission pattern, that can vary randomly during the execution of the system. We propose to leverage on these parameters to extend the existing stochastic Response Time Analysis (RTA) for CAN.

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