mdh.sePublications
Change search
Refine search result
1234 101 - 150 of 194
CiteExportLink to result list
Permanent link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Rows per page
  • 5
  • 10
  • 20
  • 50
  • 100
  • 250
Sort
  • Standard (Relevance)
  • Author A-Ö
  • Author Ö-A
  • Title A-Ö
  • Title Ö-A
  • Publication type A-Ö
  • Publication type Ö-A
  • Issued (Oldest first)
  • Issued (Newest first)
  • Created (Oldest first)
  • Created (Newest first)
  • Last updated (Oldest first)
  • Last updated (Newest first)
  • Disputation date (earliest first)
  • Disputation date (latest first)
  • Standard (Relevance)
  • Author A-Ö
  • Author Ö-A
  • Title A-Ö
  • Title Ö-A
  • Publication type A-Ö
  • Publication type Ö-A
  • Issued (Oldest first)
  • Issued (Newest first)
  • Created (Oldest first)
  • Created (Newest first)
  • Last updated (Oldest first)
  • Last updated (Newest first)
  • Disputation date (earliest first)
  • Disputation date (latest first)
Select
The maximal number of hits you can export is 250. When you want to export more records please use the Create feeds function.
  • 101.
    Iqbal, Zahid
    et al.
    University of Porto, Portugal.
    Almeida, Luis
    University of Porto, Portugal.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering. IS (Embedded Systems).
    Implementing Virtual Channels in Ethernet using Hierarchical Sporadic Servers2013In: Proc International Workshop on Real-Time Networks, Paris, France, 2013Conference paper (Refereed)
    Abstract [en]

    Composability is an important property to build complex applications. One important technique to achieve composability, particularly in the time domain, is multi-level hierarchical server-based design. However, composability must not only be supported among components sharing computing resources but also in their interactions. In this paper we implement hierarchical server-based traffic scheduling within the Flexible Time-Triggered Switched Ethernet (FTT-SE) protocol. The novelty in this work is the use of hierarchical sporadic servers in such setting. We report an efficient usage of the network bandwidth, short reponse times and the temporal isolation across servers.

  • 102.
    Iqbal, Zahid
    et al.
    University of Porto.
    Almeida, Luis
    University of Porto.
    Marau, Ricardo
    University of Porto.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Implementing Hierarchical Scheduling on COTS Ethernet Switches Using a Master/Slave Approach2012In: 7th IEEE International Symposium on Industrial Embedded Systems (SIES'12), Conference proceedings, 2012, p. 76-84Conference paper (Refereed)
    Abstract [en]

    Hierarchical scheduling is instrumental to efficiently deploy component-based designs and achieve composability. It allows partitioning resources into multiple levels, hiding the complexity within each partition behind its respective interface. In this paper we focus on the network resource, particularly on Ethernet using ordinary COTS switches, and we show how hierarchical scheduling can be efficiently deployed using a master/slave approach that enforces the temporal properties of the partitions. We use the FTT-SE protocol for being open source and a bandwidth efficient master/slave alternative currently available for real-time communication over Ethernet. We present a response-time analysis for the traffic submitted within each partition and we validate it using experimental results obtained from a prototype implementation. In particular, the results highlight the strong partitioning capabilities of our approach, with full temporal isolation across partitions in different branches of the hierarchy.

  • 103.
    J. Bril, Reinder
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Tech Univ Eindhoven, Eindhoven, Netherlands.
    Altmeyer, Sebastian
    Univ Amsterdam, Amsterdam, Netherlands.
    van den Heuvel, Martijn M. H. P.
    Tech Univ Eindhoven, Eindhoven, Netherlands.
    Davis, Robert I.
    Univ York, York, N Yorkshire, England.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Fixed priority scheduling with pre-emption thresholds and cache-related pre-emption delays: integrated analysis and evaluation2017In: Real-time systems, ISSN 0922-6443, E-ISSN 1573-1383, Vol. 53, no 4, p. 403-466Article in journal (Refereed)
    Abstract [en]

    Commercial off-the-shelf programmable platforms for real-time systems typically contain a cache to bridge the gap between the processor speed and main memory speed. Because cache-related pre-emption delays (CRPD) can have a significant influence on the computation times of tasks, CRPD have been integrated in the response time analysis for fixed-priority pre-emptive scheduling (FPPS). This paper presents CRPD aware response-time analysis of sporadic tasks with arbitrary deadlines for fixed-priority pre-emption threshold scheduling (FPTS), generalizing earlier work. The analysis is complemented by an optimal (pre-emption) threshold assignment algorithm, assuming the priorities of tasks are given. We further improve upon these results by presenting an algorithm that searches for a layout of tasks in memory that makes a task set schedulable. The paper includes an extensive comparative evaluation of the schedulability ratios of FPPS and FPTS, taking CRPD into account. The practical relevance of our work stems from FPTS support in AUTOSAR, a standardized development model for the automotive industry. [(This paper forms an extended version of Bril et al. (in Proceedings of 35th IEEE real-time systems symposium (RTSS), 2014). The main extensions are described in Sect. 1.2.].

  • 104.
    Jan, M.
    et al.
    CEA LIST, France.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Message from the program chairs2018In: 26th International Conference on Real-Time Networks and Systems, RTNS 2018Article in journal (Refereed)
  • 105.
    Jägemar, Marcus
    et al.
    Ericsson AB, Stockholm, Sweden..
    Ermedahl, Andreas
    Ericsson AB, Stockholm, Sweden..
    Eldh, Sigrid
    Ericsson AB, Stockholm, Sweden..
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lisper, Björn
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Enforcing Quality of Service Through Hardware Resource Aware Process Scheduling2018In: 2018 IEEE 23RD INTERNATIONAL CONFERENCE ON EMERGING TECHNOLOGIES AND FACTORY AUTOMATION (ETFA), IEEE , 2018, p. 329-336Conference paper (Refereed)
    Abstract [en]

    Hardware manufacturers are forced to improve system performance continuously due to advanced and computationally demanding system functions. Unfortunately - more powerful hardware leads to increased costs. Instead, companies attempt to improve performance by consolidating multiple functions to share the same hardware to exploit existing performance instead. In legacy systems, each function had individual execution environment that guaranteed HW resource isolation and therefore the Quality of Service (QoS). Consolidation of multiple functions increases the risk of shared resource congestion. Current process schedulers focus on time quanta and do not consider shared resources. We present a novel process scheduler that complements current process schedulers by enforcing QoS though Shared Resource Aware (SRA) process scheduling. The SRA scheduler programs the Performance Monitoring Unit (PMU) to generate an overflow interrupt when reaching the assigned process resource quota. The scheduler has the possibility to swap out the process when receiving the interrupt allowing it to enforce the QoS for the scheduled process. We have implemented our scheduling policy as a new scheduling class in Linux. Our experiments show that it efficiently enforces QoS without seriously affect the shared resource usage of other processes executing on the same HW.

  • 106.
    Keskin, U.
    et al.
    Technische Universiteit Eindhoven.
    Van Den Heuvel, M. M. H. P.
    Technische Universiteit Eindhoven.
    Bril, R. J.
    Technische Universiteit Eindhoven.
    Lukkien, J. J.
    Technische Universiteit Eindhoven.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    An engineering approach to synchronization based on overrun for compositional real-time systems2011In: SIES 2011 - 6th IEEE International Symposium on Industrial Embedded Systems, Conference Proceedings, 2011, p. 274-283Conference paper (Refereed)
    Abstract [en]

    Hierarchical scheduling frameworks (HSFs) provide means for composing complex real-time systems from well-defined independently developed and analyzed subsystems. To support shared logical resources requiring mutual exclusive access in two-level HSFs, overrun without payback has been proposed as a mechanism to prevent budget depletion during resource access arbitrated by the stack resource policy (SRP). In this paper, we revisit the global schedulability analysis of synchronization protocols based on SRP and overrun without payback for fixed-priority scheduled HSFs. We derive a new global schedulability analysis based on the observation that the overrun budget is merely meant to prevent budget depletion during global resource access. The deadline of a subsystem therefore only needs to hold for its normal budget rather than the sum of the normal and overrun budget. Our novel analysis is considerably simpler than an earlier, initially improved analysis, which improved both the original local and global schedulability analyses. We evaluate the new analysis based on an extensive simulation study and compare the results with the existing analysis. Our simplified analysis does not significantly affect schedulability compared to the initially improved analysis. It is therefore proposed as a preferable engineering approach to synchronization protocols for compositional real-time systems. We accordingly present the implementation of our improvement in an OSEK-compliant real-time operating system to sketch its applicability in today's industrial automotive standards. Both implementation and run-time overheads are discussed providing measured results1. © 2011 IEEE.

  • 107.
    Keskin, Ugur
    et al.
    Technische Universiteit Eindhoven.
    J. Bril, Reinder
    Technische Universiteit Eindhoven.
    Lukkien, Johan
    Technische Universiteit Eindhoven.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Improving the global schedulability analysis of overrun without payback2010In: Proceedings of the Work-In-Progress (WIP) session of the 22nd Euromicro Conference on Real-Time Systems (ECRTS'10) / [ed] Robert I. Davis, 2010Conference paper (Refereed)
    Abstract [en]

    Overrun without payback has been proposed asa mechanism for a stack resource policy (SRP) based synchronizationprotocol for hierarchical scheduling frameworks(HSFs). In this paper we reconsider the global schedulabilityanalysis of an HSF based on two-level fixed-priority preemptivescheduling (FPPS) using overrun without payback asa mechanism. Improved analysis is presented based on theobservation that there is no need to guarantee the overrunbudget before the end of the budget period, because thatadditional amount of resources is only meant to prevent depletionof a budget during global resource access. The resultingimprovement is illustrated by means of an example. Thepossibility to discard the remainder of an overrun budget upona replenishment is briefly considered as a further improvementand its potential is shown using the same example.

  • 108.
    Khalilzad, Nima
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ashjaei, Mohammad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Almeida, Luis
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. IT/DEEC/University of Porto, Portugal.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Adaptive Multi-Resource End-to-End Reservations for Component-Based Distributed Real-Time Systems2015In: ESTIMedia 2015 - 13th IEEE Symposium on Embedded Systems for Real-Time Multimedia, 2015, p. Article number 7351772-Conference paper (Refereed)
    Abstract [en]

    Complexity in the real-time embedded softwaredomain has been growing rapidly. The component-based softwaredevelopment approach facilitates the development process of suchsoftware systems by dividing a complex system into a numberof simpler components. Resource reservation techniques havebeen widely used for providing resources to real-time softwarecomponents. In this paper we target real-time components operatingon a distributed resource infrastructure. Furthermore,we target a class of software components which demonstratedynamic resource consumption behavior. A prime example ofsuch components is a multimedia software component. In thepaper, we present a framework supporting multi-resource endto-end resource reservations. We reserve resource bandwidths onboth processor resources as well as on the network resources. Theproposed framework utilizes a Multiple Input Multiple Output(MIMO) controller which adjusts the sizes of reservations trackingthe dynamic resource demands of the software components. Finally, we present a case study using a multimedia component todemonstrate the performance and efficiency of our framework.

  • 109.
    Khalilzad, Nima
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ashjaei, Mohammad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Almeida, Luis
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. University of Porto, Portugal.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Towards Adaptive Resource Reservations for Component-Based Distributed Real-Time Systems2015In: ACM SIGBED Review - Special Issue on the 7th Workshop on Adaptive and Reconfigurable Embedded Systems (APRES 2015), 2015, p. 24-27Conference paper (Refereed)
    Abstract [en]

    —In this paper we present our ongoing work on developing a framework supporting adaptive resource reservations targeting component-based distributed real-time systems. The components may be spread over different resources in a distributed system. The proposed framework utilizes a reservationbased scheduling technique in which the sizes of reservations are adjusted during run-time to deal with dynamic resource demands of the software components. We present our modeling approach, we describe design options made and we present corresponding challenges.

  • 110.
    Khalilzad, Nima
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    An Adaptive Scheduling Framework for Component-Based Real-Time Systems2015Report (Other academic)
  • 111.
    Khalilzad, Nima
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    On Component-Based Software Development for Multiprocessor Real-Time Systems2015In: Proceedings - IEEE 21st International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2015, 2015, p. 132-140Conference paper (Refereed)
    Abstract [en]

    Component-based software development providesa modular approach to develop complex software systems. In the context of real-time systems, it is desirable to abstract the timing properties of software components using an interface foreach component. The timing properties of the whole system, composed of multiple components, is studied using the component interfaces. In this paper we focus on periodic interface models. In the case of components developed for single processor platforms, for examining the system schedulability, the interfaces can be regarded as periodic tasks. Thus, making it possible to use the conventional schedulability analyses for the system level schedulability test. In the case of components developed formultiprocessors, since interfaces may have utilization larger than 100 % of a single processor, it is not possible to directly use the component interfaces for the system schedulability test. There-fore, the interfaces have to be decomposed before performing thesystem level schedulability test. In this paper, we target the special case of partitioned EDF for scheduling the components integrated on a multiprocessor. Therefore, the system level schedulability test is equivalent to finding a feasible allocation of component interfaces on the multiprocessor. We propose two algorithms for allocating the multiprocessor periodic interfaces. In addition, we propose anorthogonal approach for developing component-based real-timesystems on multiprocessors in which components with utilizationmore than 100 % of a single processor are divided into smaller subcomponents before abstracting their interfaces. We show, through extensive evaluations, that our alternative approach significantly reduces the interface overhead.

  • 112.
    Khalilzad, Nima
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Kong, Fanxin
    McGill University, Canada.
    Liu, Xue
    McGill University, Canada.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A Feedback Scheduling Framework for Component-Based Soft Real-Time Systems2015In: 21th IEEE Real-Time and Embedded Technology and Applications Symposium RTAS'15, 2015, p. 182-193Conference paper (Refereed)
    Abstract [en]

    Component-based software systems with real-time requirements are often scheduled using processor reservation techniques. Such techniques have mainly evolved around hard real-time systems in which worst-case resource demands are considered for the reservations. In soft real-time systems, reserv- ing the processors based on the worst-case demands results in unnecessary over-allocations. In this paper, targeting soft real-time systems running on multiprocessor platforms, we focus on components for which processor demand varies during run-time. We propose a feedback scheduling frameworkwhere processor reservations are used for scheduling components. The reservation bandwidths as well as the reservation periods are adapted using MIMO LQR controllers. We provide an allocation mechanism for distributing components over processors. The proposed framework is implemented in the TrueTime simulation tool for system identification. We use a case study to investigate the performance of our framework in the simulation tool. Finally, the framework is implemented in the Linux kernel for practical evaluations. The evaluation results suggest that the framework can efficiently adapt the reservation parameters during run-time by imposing negligible overhead.

  • 113.
    Khalilzad, Nima Moghaddami
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Towards adaptive hierarchical scheduling of overloaded real-time systems2011In: SIES 2011 - 6th IEEE International Symposium on Industrial Embedded Systems, Conference Proceedings, 2011, p. 39-42Conference paper (Refereed)
    Abstract [en]

    In a hierarchical scheduling framework, a resource can be shared among modules with different criticality levels. In our recently introduced adaptive hierarchical scheduling framework, modules receive a dynamic portion of the CPU during run-time. While providing temporal isolation is one of the main advantages of hierarchical scheduling, in an adaptive framework, for example when the CPU is overloaded, the higher priority modules can violate timing guarantees of the lower priority modules. However, the priorities of modules are assigned based on parameters other than the module criticality levels. For example the priority is often assigned according to periods and deadlines of tasks to increase the CPU utilization assuming static systems, i.e. modules parameters do not change during runtime. In an overload situation the high criticality modules should be superior to the low criticality modules in receiving resources. In this paper, extending our adaptive framework, we propose two techniques for controlling the CPU distribution among modules in an overload situation. We are taking another step towards having a complete adaptive hierarchical scheduling framework by incorporating an overload controller into our framework.

  • 114. Liu, Meng
    et al.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A dependency-graph based priority assignment algorithm for real-time traffic over NoCs with shared virtual-channels2016In: IEEE International Workshop on Factory Communication Systems - Proceedings, WFCS, 2016, article id Article number 7496504Conference paper (Refereed)
    Abstract [en]

    The Network-on-Chip (NoC) is the on-chip interconnection medium of choice for modern massively parallel processors and System-on-Chip (SoC) in general. Fixed-priority based preemptive scheduling using virtual-channels is a solution to support real-time communications in on-chip networks. Targeting the priority assignment problem in the context of NoCs, heuristic based priority assignment algorithms are more practical, due to the exponentially increased search space as the number of flows goes up. In our previous work, we have proposed a graph-based heuristic priority assignment algorithm (called GHSA) for NoC communications, where we show that taking the dependencies between flows into account can significantly reduce the search space. However, GHSA only works for NoCs with distinct priorities. Routers in such type of platforms may have a large amount of buffer cost when the number of flows is high. The applicability can thus be limited in reality. One solution to reduce the buffer cost is to allow priority sharing of different flows. In this paper, we propose a dependency-graph based priority assignment algorithm (called eGHSA) targeting NoCs with shared virtual-channels. A number of experiments as well as a case study based on an automotive application are generated, which clearly show that eGHSA improves the efficiency compared to the existing solution in the literature. 

  • 115.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A Tighter Recursive Calculus to Compute the Worst-Case Traversal Time of Real-Time Traffic over NoCs2017In: 2017 22ND ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2017, p. 275-282, article id 7858332Conference paper (Refereed)
    Abstract [en]

    Network-on-Chip (NoC) is a communication subsystem which has been widely utilized in many-core processors and system-on-chips in general. In this paper, we focus on a Round-Robin Arbitration (RRA) based wormhole-switched NoC which is a common architecture used in most of the existing implementations. In order to execute real-time applications on such a NoC based platform, a number of given real-time requirements need to be fulfilled. One of the most typical requirements is schedulability which refers to if real-time packets can be delivered within the given time durations. Timing analysis is a common tool to verify the schedulability of a real-time system. Unfortunately, the existing timing analyses of RRA-based NoCs either provide too pessimistic estimates which results in overly allocated resources, or require a large amount of processing which limits the applicability in reality. Therefore, in this paper, we present an improved timing analysis, aiming to provide more accurate estimates along with acceptable computation time. From the evaluation results, we can clearly observe the improvement achieved by the proposed timing analysis.

  • 116.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Buffer-Aware Analysis for Worst-Case Traversal Time of Real-Time Traffic over RRA-based NoCs2017In: Proceedings - 2017 25th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2017, 2017, p. 567-575, article id 7912705Conference paper (Refereed)
    Abstract [en]

    Network-on-Chip (NoC) is a communication sub-system which has been widely utilized in many-core processors and system-on-chips in general. In order to execute time-critical applications on a NoC-based platform, the timing behavior of the network needs to be predicted during system design. One of the most important timing requirements is regarding schedulability, which refers to determining if a real-time packet can be delivered within a specific time duration. To verify the fulfillment of such timing requirement, a proper timing analysis is mandatory. Our work focuses on a Round-Robin Arbitration (RRA) based wormhole-switched NoC, which is a common architecture used in many of the existing implementations. Recursive Calculus (RC) is one of the existing analysis approaches for RRA-based NoCs which has been utilized in many research works. However, RC does not take buffer-effects into account. As a result, while performing RC on most of the existing RRA-based NoC designs, it can produce unsafe estimates which is not acceptable for time-critical systems. In this paper, we identify the optimistic problem of RC, and we propose a Revised Recursive Calculus (RRC) which extends RC by considering buffer-effects as well as supporting packetization.

  • 117.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Improved Priority Assignment for Real-Time Communications in On-Chip Networks2015In: ACM International Conference Proceeding SeriesVolume 04-06, 2015, p. 171-180Conference paper (Refereed)
    Abstract [en]

    The Network-on-Chip is the on-chip interconnection medium of choice for modern massively parallel processors and System-on-Chip in general. Fixed-priority based preemptive scheduling using virtual-channels is a solution to support real-time communications in on-chip networks. However, the different characteristics of the Network-on-Chip compared to the single processor scheduling problem prevents the usage of known optimal algorithms (e.g. the Audsley's algorithm) to assign priorities to messages. A heuristic search algorithm based approach (called the HSA) focusing on the priority assignment for on-chip communications has been presented in the literature. The HSA is much faster than an exhaustive search based solution, with a price of missing certain schedulable cases (i.e. non-optimal). In this paper, we present two undirected-graph based priority assignment algorithms, the GESA and the GHSA. In contrast to the previous work, we can decrease the search space significantly by taking the interference dependencies of different messages on the network into account. A number of experiments are generated, in order to evaluate the proposed algorithms. The results show that the GESA can always achieve higher schedulability ratios than the HSA, but may require longer processing time. On the other hand, the GHSA has the same performance as the HSA regarding the schedulability, but can significantly improve the efficiency.

  • 118.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Scheduling Real-Time Packets with Non-preemptive Regions on Priority-Based NoCs2016In: Proceedings - 2016 IEEE 22nd International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2016, 2016Conference paper (Refereed)
    Abstract [en]

    Network-on-Chip (NoC) is a preferred communi- cation medium for massively parallel platforms. Fixed-priority based scheduling using virtual-channels is one of the promising solutions to support real-time traffic in on-chip networks. Most of the existing NoC implementations which can support fixed- priority based scheduling use a flit-level preemptive scheduling. Under such a mechanism, preemptions can happen between the transmissions of successive flits. In this paper, we present a modified framework where the non-preemptive region of each NoC packet increases from a single flit. Using the proposed approach, the response times of certain packet flows can be reduced, which can thus improve the schedulability of the whole network. As a result, the utilization of NoCs can be improved by admitting more real-time traffic. Schedulability tests regarding the proposed framework are presented along with the proof of the correctness. Moreover, a number of experiments as well as a case study based on an automotive application have been generated, where we can clearly observe the improvement of our solution compared to the original flit-level preemptive NoC.

  • 119.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Tighter Time Analysis for Real-Time Traffic in On-Chip Networks with Shared Priorities2016In: 2016 10th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2016, 2016, article id 7579319Conference paper (Refereed)
    Abstract [en]

    The Network-on-Chip (NoC) is the preferred inter- connection medium for massively parallel platforms. Targeting real-time applications, fixed-priority based NoCs with virtual- channels have been proposed as a promising solution. In order to verify if specific time requirements can be satisfied, scheduability tests are typically used. Several analysis approaches have been proposed targeting priority-based NoCs. However, due to the approximation considered in the analyses, the results may involve a large amount of pessimism. The applicability of the analyses is thus limited in practice. In this paper, we identify a number of properties of NoCs with shared priorities. An improved time analysis is proposed where pessimism can be significantly reduced for many cases. In order to evaluate the proposed analysis, a number of experiments have been generated along with a case study based on an automotive application. The improvement can be clearly observed from the evaluation results.

  • 120.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Using Non-Preemptive Regions and Path Modification to Improve Schedulability of Real-Time Traffic over Priority-Based NoCs2017In: Real-time systems, ISSN 0922-6443, E-ISSN 1573-1383, no 6, p. 886-915Article in journal (Refereed)
    Abstract [en]

    Network-on-Chip (NoC) is a preferred communication medium for massively parallel platforms. Fixed-priority based scheduling using virtual-channels is one of the promising solutions to support real-time traffic in on-chip networks. Most of the existing works regarding priority-based NoCs use a flit-level preemptive scheduling. Under such a mechanism, preemptions can only happen between the transmissions of successive flits but not during the transmission of a single flit. In this paper, we present a modified framework where the non-preemptive region of each NoC packet increases from a single flit. Using the proposed approach, the response times of certain traffic flows can be reduced, which can thus improve the schedulability of the whole network. As a result, the utilization of NoCs can be improved by admitting more real-time traffic. Schedulability tests regarding the proposed framework are presented along with the proof of the correctness. Additionally, we also propose a path modification approach on top of the non-preemptive region based method to further improve schedulability. A number of experiments have been performed to evaluate the proposed solutions, where we can observe significant improvement on schedulability compared to the original flit-level preemptive NoCs. 

  • 121.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Using Segmentation to Improve Schedulability of Real-Time Traffic over RRA-based NoCs2016In: ACM SIGBED Review. Special Issue on 14th International Workshop on Real-Time Networks (RTN 2016) SIGBED Review, ISSN 1551-3688, Vol. 13, no 4, p. 20-24Article in journal (Refereed)
    Abstract [en]

    Network-on-Chip (NoC) is the interconnect of choice for many- core processors and system-on-chips in general. Most of the existing NoC designs focus on the performance with respect to average throughput, which makes them less applicable for real-time applications especially when applications have hard timing requirements on the worst-case scenarios. In this paper, we focus on a Round- Robin Arbitration (RRA) based wormhole-switched NoC which is a common architecture used in most of the existing implementations. We propose a novel segmentation algorithm targeting RRA-based NoCs in order to improve the schedulability of real-time traffic without modifying the hardware architecture. According to the evaluation results, the proposed segmentation solution can signifi- cantly improve the schedulability of the whole network.

  • 122.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Using Segmentation to Improve Schedulability of RRA-based NoCs with Mixed Traffic2017In: 2017 22ND ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2017, p. 744-750, article id 7858413Conference paper (Refereed)
    Abstract [en]

    Network-on-Chip (NoC) is the interconnect of choice for many- core processors and system-on-chips in general. Most of the exist- ing NoC designs focus on the performance with respect to average throughput, which makes them less applicable for real-time appli- cations especially when applications have hard timing requirements on the worst-case scenarios. In this paper, we focus on a Round- Robin Arbitration (RRA) based wormhole-switched NoC which is a common architecture used in most of the existing implementa- tions. We propose a novel segmentation algorithm targeting RRA- based NoCs in order to improve the schedulability of real-time traf- fic without modifying the hardware architecture. Additionally, we also address the problem of transmitting both real-time traffic and best-effort traffic in the same NoC. The proposed solutions aim to provide timing guarantees to real-time traffic and achieve low la- tency for best-effort traffic. According to the evaluation results, the proposed segmentation solution can significantly improve the schedulability of the whole network.

  • 123.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Kato, Shinpei
    Nagoya University, Nagoya, Japan.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A Server-based Approach for Overrun Management in Multi-Core Real-Time Systems2014Conference paper (Refereed)
    Abstract [en]

    This paper presents a server-based framework for task overrun management in multi-core real-time systems. Unlike most existing scheduling methods which usually assume a single upper bound of the Worst-Case Execution Time (WCET) for each task, our approach targets scenarios with task overruns. The main idea of our framework is to employ Synchronized Deferrable Servers (SDS) to deal with globally scheduled task overruns, while a partitioned scheduling approach is applied on regular task executions. Moreover, we provide a deterministic Worst- Case Response Time (WCRT) analysis focusing on hard timing constraints, along with a probabilistic analysis of Deadline Miss Ratio (DMR) for soft real-time applications. In the evaluation phase, we have implemented two types of experiments evaluating different timing constraints. 

  • 124.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Kato, Shinpei
    Nagoya University, Nagoya, Japan.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    An Adaptive Server-Based Scheduling Framework with Capacity Reclaiming and Borrowing2014In: RTCSA 2014 - 20th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2014, p. Article number 6910548-Conference paper (Refereed)
    Abstract [en]

    In this paper, we present a new reservation based scheduling framework for soft real-time systems using EDF algorithm (called CARB-EDF). This framework has the features of Capacity Adaptation, Reclaiming and Borrowing. This framework can simplify the initial configuration of the system, where the system designer does not need to provide any estimations of task execution times. We also present a Chebyshev’s inequality based predictor to estimate task execution times. A number of simulation-based experiments have been implemented. According to the results compared with some related works, our scheduling framework can provide a better performance with acceptable extra scheduling overhead. 

  • 125.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A Stochastic Response Time Analysis for Communications in On-Chip Networks2015Conference paper (Refereed)
    Abstract [en]

    Priority-based wormhole-switching has been proposed as a solution to handle real-time traffic in on-chip networks. In order to support real-time traffic, the predictability of end-toend delays need to be guaranteed. Several deterministic schedulability analysis approaches for wormhole-switched networks have been proposed. These approaches calculate a single upper-bound of the response time of each Network-on-Chip (NoC) flow, which is suitable for hard real-time applications. However, for many soft real-time applications, the performance does not depend on the worst-case scenario, which means that the calculated single upper-bounds are not sufficient to represent the performance. Therefore, in this paper, we present a stochastic Response Time Analysis (RTA) which can calculate a distribution of the response times of a real-time NoC flow. The estimated distributions can be utilized for multiple purposes, such as calculating deadline miss ratios, and computing upper-bounds regarding different probabilities. A number of simulation-based experiments are generated in order to investigate the pessimism involved in the analysis. Moreover, the processing time of the analysis is also measured from the experiments in order to examine the scalability of the proposed approach.

  • 126.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    An EVT-based Worst-Case Response Time Analysis of Complex Real-Time Systems2013In: Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, SIES 2013, 2013, p. 249-258Conference paper (Refereed)
    Abstract [en]

    In recent years, the complexity of real-time embedded systems has increased dramatically. For those modern real-time systems, the limitations of original static Response Time Analysis (RTA) become more and more conspicuous. Most static analysis methods not only require much detailed system information, but also only target to some specific system model with non-realistic assumptions. As a result, those methods may produce overly pessimistic results, making them unsuitable to be applied on a complex industrial system. The best system model may be the system itself. Therefore, statistical RTA, which can produce probabilistic analysis results based on samples provided by real systems or simulators, may become more expedient. Statistical RTA usually requires more relaxed assumptions and less system information than static RTA. In this paper, we present an Extreme Value Theory (EVT) based method to compute Worst-Case Response Time (WCRT) targeting complex real-time systems. In the evaluation phase, we have applied this method to the calculation of worst-case transmission delays of messages over Controller Area Network (CAN), and some comparisons with static RTA are also provided. According to the experimental results, as the system complexity increases, our approach performs much more stable and less pessimistic.

  • 127.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Applying the Peak Over Thresholds Method on Worst-Case Response Time Analysis of Complex Real-Time Systems2013In: 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2013, 2013, p. 22-31Conference paper (Refereed)
    Abstract [en]

    The predictability of timing behavior is a very important performance issue of a real-time system. As the complexity of modern industrial systems increases, analyzing the timing behaviors of those systems becomes more and more challenging. Most of the existing analysis methods depend on static and detailed information of the systems under analysis. However, sometimes only partial information of a system can be available, or it may require too much effort on obtaining those details, making those analysis methods much less feasible. Moreover, those methods usually focus on some specific system models with unrealistic assumptions, consequently, applying those methods on a complex industrial real-time system may result in overly pessimistic results. Therefore, in this paper, we propose a statistical method to compute Worst-Case Response Times (WCRTs) of complex real-time systems regarding soft timing constraints, which can provide a higher general applicability with less required system information. Our approach employs a Peak Over Thresholds (POT) method, which is a branch of the Extreme Value Theory (EVT). For the evaluation, we have applied this approach on the analysis of message transmission latencies over Controller Area Networks (CAN).

  • 128.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Schedulability analysis of GMF-modeled messages over controller area networks with mixed-queues2014In: IEEE Int. Workshop Factory Commun. Syst. Proc. WFCS, 2014, p. Article number 6837606-Conference paper (Refereed)
    Abstract [en]

    The Controller Area Network (CAN) is widely utilized in many industrial real-time applications. As a real-time communication network, the predictability of timing behaviors is very important. Therefore, many works have been proposed regarding the schedulability analysis of CAN messages. Most of the existing analysis approaches are based on a traditional periodic message model. However, in some applications, the transmission of a message may follow a certain pattern instead of repeating the same transmission period by period. In these cases, applying the existing analysis methods may lead to quite pessimistic results. In order to tackle this problem, in this paper we apply the Generalized Multi-Frame (GMF) task model on CAN messages, where both priority-based and FIFO-based message queues are taken into account. We present a corresponding sufficient schedulability analysis. According to the experimental evaluations, our analysis can provide tighter results compared to the existing CAN message response time analysis in the context of GMF-modeled messages. 

  • 129.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Schedulability analysis of Multi-Frame messages over Controller Area Networks with mixed-queues2013Conference paper (Refereed)
    Abstract [en]

    The Controller Area Network (CAN) is one of the most widely utilized real-time communication networks, which has plenty of applications especially in automotive industry. Many works have been proposed regarding the CAN schedulability analysis which is very important for guaranteeing the safety and reliability of hard real-time systems. Most of the existing analysis methods assume a periodic message model, and some of them take sporadic messages into account. However, for some applications, message transmissions may follow a specific pattern instead of repeating the same transmission period by period, where applying the existing methods may include much pessimism. In this paper, we apply the Multi-Frame task model, which is first proposed by Mok and Chen in cite{MokChen}, on CAN messages. Moreover, we assume that the ECUs in the analyzed network can employ both FIFO and priority based queues. The schedulability analysis and the corresponding proofs are provided along with a case study.

  • 130.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Almeida, Luis
    University of Porto.
    Response time analysis for static priority based SpaceWire networks2012In: Proceeings of the 2nd International Workshop on Worst-Case Traversal Time (WCTT '12), 2012, p. 7-14Conference paper (Refereed)
    Abstract [en]

    The SpaceWire network standard is used in spacecraft communications and has been selected for future ESA satellites. In order to guarantee the safety and reliability of on-board systems, the designers have to make sure that all critical timing constraints are satisfied. The SpaceWire network is a wormhole based network which makes its timing analysis significantly complex. Some methods for computing upper-bounds of end-to-end delays of certain wormhole network models have been developed. However, those models require some explicit assumptions and dedicated real-time mechanisms which cannot be supported by the current SpaceWire networks. Moreover, some work has proposed analysis approaches for SpaceWire networks assuming the Round-Robin arbitration scheme only. In this paper, we focus on the priority based arbitration scheme instead and we propose a worst-case response time analysis to evaluate the end-to-end delays of traffic transmissions in SpaceWire networks. The corresponding proofs to our analysis are presented along with a case study. © 2012 ACM.

  • 131.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Chiru, Cezar
    Mälardalen University.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sandström, Kristian
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    On providing real-time guarantees in cloud-based platforms2016In: IEEE International Workshop on Factory Communication Systems - Proceedings, WFCS, 2016, article id Article number 7496534Conference paper (Refereed)
    Abstract [en]

    Cloud technologies are gaining more and more attentions in recent years. Cloud-based service brings benefits in cost, energy efficiency, sharing of resources, increased flexibility, adaptability and evolvability. However, there are a number of associated challenges that need to be properly addressed before applying the cloud technique generally in industries. Providing efficient and predictable computation and communication is one of the important challenges, since many industrial systems (e.g. a control system) have specific timing requirements. Our current work thus focuses on guaranteeing the predictability of a cloud-based service. Virtualization, as one of the key technologies in Cloud Computing, is used to abstract details of resources away from end-services which simplifies the resource sharing. It thus improves the resource utilization and saves budget for end-users. In this preliminary work, we have implemented a distributed system using virtualization techniques (including virtual machines and virtual switches). Additionally, we generate a number of experiments to investigate how QoS policies can help us to provide real-time communication guarantees. 

  • 132.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Towards Stochastic Response Time Analysis for CAN Messages with Multiple Probabilistic Factors2015In: The 21st IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, WiP RTCSA-wip'15, Hong Kong, HongKong, 2015Conference paper (Refereed)
    Abstract [en]

    Controller Area Network (CAN) is a widely used real-time network in the vehicular domain. In this paper we identify and discuss two practical parameters, namely message copy time and mixed transmission pattern, that can vary randomly during the execution of the system. We propose to leverage on these parameters to extend the existing stochastic Response Time Analysis (RTA) for CAN.

  • 133.
    Lo Bello, Lucia
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Univ Catania, Catania, Italy.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Pedreiras, Paulo
    Univ Aveiro, Aveiro, Portugal.
    Sauter, Thilo
    Inst Comp Technol, Vienna, Austria.
    Special Section on Communications in Automation-Innovation Drivers and New Trends2017In: IEEE Transactions on Industrial Informatics, ISSN 1551-3203, E-ISSN 1941-0050, Vol. 13, no 2, p. 841-845Article in journal (Refereed)
  • 134.
    Marau, Ricardo
    et al.
    University of Porto.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Iqbal, Zahid
    University of Porto.
    Silva, Pedro
    University of Porto.
    Almeida, Luis
    University of Porto.
    Portugal, Paulo
    University of Porto.
    Controlling Multi-Switch Networks for Prompt Reconfiguration2012In: IEEE International Workshop on Factory Communication Systems - Proceedings, WFCS, 2012, p. 233-242Conference paper (Refereed)
    Abstract [en]

    Recent trends in distributed embedded systems, such as those found in avionics and trains, have shown an increase in the amount and heterogeneity of the information that needs to be exchanged, together with a growing importance of supporting dynamic reconfiguration and adaptive behaviors. In this paper we focus on Ethernet technologies with real-time reconfiguration support and we address the case of middle-size networking infrastructures with a few switches. We use the FTT-SE protocol with the needed adaptations to support dynamic heterogeneous real-time transactions in multi-hop networks. The paper presents a worst-case response-time analysis that provides timeliness guarantees, improving the results obtained with another previous analysis, decreasing the needed network capacity for guaranteed schedulability by 25% on average. Practical experiments and simulation results validate the proposed approach and analysis.

  • 135.
    Marcus, Jägemar
    et al.
    Ericsson AB, Stockholm, Sweden.
    Ermedahl, Andreas
    Ericsson AB, Stockholm, Sweden.
    Eldh, Sigrid
    Ericsson AB, Stockholm, Sweden.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A Scheduling Architecture for Enforcing Quality of Service in Multi-Process Systems2017In: International Conference on Emerging Technologies And Factory Automation ETFA'17, 2017, p. 1-8Conference paper (Refereed)
    Abstract [en]

    There is a massive deployment of multi-core CPUs. It requires a significant drive to consolidate multiple services while still achieving high performance on these off-the-shelf CPUs. Each function had earlier an own execution environment, which guaranteed a certain Quality of Service (QoS). Consolidating multiple services can give rise to shared resource congestions, resulting in lower and non-deterministic QoS. We describe a method to increase the overall system performance by assisting the operating system process scheduler to utilize shared resources more efficiently. Our method utilizes hardware- and system-level performance counters to profile the shared resource usage of each process. We also use a big-data approach to analyzing statistics from many nodes. The outcome of the analysis is a decision support model that is utilized by the process scheduler when allocating and scheduling process. Our scheduler can efficiently distribute processes compared to traditional CPU-load based process schedulers by considering the hardware capacity and previous scheduling- and allocation decisions.

  • 136.
    Mifdaoui, Ahlem
    et al.
    University of Toulouse, France.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Pedreiras, Paulo
    University of Aveiro, Portugal.
    Almeida, Luis
    University of Porto, Portugal.
    Marau, Ricardo
    University of Porto, Portugal.
    Exploring alternatives to use master/slave full duplex switched Ethernet for avionics embedded applications2012Conference paper (Refereed)
    Abstract [en]

    The complexity of distributed real-time systems, including military embedded applications, is increasing due to an increasing number of nodes, their functionality and higher amounts of exchanged data. This higher complexity imposes major development challenges when nonfunctional properties must be enforced. On the other hand, the current military communication networks are a generation old and are no longer effective in facing such increasingly complex requirements. A new communication network, based on Full Duplex Switched Ethernet and Master/slave approach, has been proposed previously. However, this initial approach is not efficient in terms of network bandwidth utilization. In this paper we propose two new alternative approaches that can use the network bandwidth more efficiently. In addition we provide a preliminary qualitative assessment of the three approaches concerning different factors such as performance, scalability, complexity and flexibility.

  • 137.
    Moghaddami Khalilzad, Nima
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ashjaei, Seyed Mohammad Hossein
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sander, Ingo
    Royal Institute of Technology (KTH), Sweden.
    Towards Designing Efficient End-to-end Resource Reservations for Distributed Embedded Systems2016In: Forum on specification & Design Languages FDL'16, Bremen, Germany, 2016Conference paper (Refereed)
  • 138.
    Moghaddami Khalilzad, Nima
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Adaptive Hierarchical Scheduling Framework: Configuration and Evaluation2013Report (Other academic)
    Abstract [en]

    We have introduced an adaptive hierarchicalscheduling framework as a solution for composing dynamic realtime systems, i.e., systems where the CPU demand of its tasks aresubjected to unknown and potentially drastic changes during runtime. The framework consists of a controller which periodicallyadapts the system to the current load situation. In this paper,we unveil and explore the detailed behavior and performanceof such an adaptive framework. Specifically, we investigate thecontroller configurations enabling efficient control parameterswhich maximizes performance, and we evaluate the adaptiveframework against a traditional static one.

  • 139.
    Moghaddami Khalilzad, Nima
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Adaptive Hierarchical Scheduling Framework: Configuration and Evaluation2013Conference paper (Refereed)
    Abstract [en]

    We have introduced an adaptive hierarchical scheduling framework as a solution for composing dynamic real-time systems, i.e., systems where the CPU demand of its tasks are subjected to unknown and potentially drastic changes during run-time. The framework consists of a controller which periodically adapts the system to the current load situation. In this paper, we unveil and explore the detailed behavior and performance of such an adaptive framework. Specifically, we investigate the controller configurations enabling efficient control parameters which maximizes performance, and we evaluate the adaptive framework against a traditional static one. Furthermore, we demonstrate the results of our investigation using a practical multimedia case study in which we simulate the timing behavior of video decoding tasks running on our proposed framework. In addition, we compare the results of using our framework with the results of using static resource allocation approach.

  • 140.
    Moghaddami Khalilzad, Nima
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Exact and Approximate Supply Bound Function for Multiprocessor Periodic Resource Model: Unsynchronized Servers2012Conference paper (Refereed)
    Abstract [en]

    The Multi Processor Periodic Resource (MPR) model has been proposed for modeling compositional real-time systems which run on a shared multi processor hardware. In this paper we extend the MPR model such that the execution of virtual processors (servers) is not assumed to be synchronized i.e., the servers can have different phases. We believe that relaxing the server synchronization requirement provides greater deal of compatibility for implementing such a compositional method on various hardware platforms. We derive the resource supply bound function of the extended MPR model using an algorithm. Furthermore, we suggest an approach to calculate an approximate supply bound function with lower computational complexity for systems where calculating their supply bound function is computationally expensive.

  • 141.
    Moghaddami Khalilzad, Nima
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Implementation of the Multi-Level Adaptive Hierarchical Scheduling Framework2013In: Proceedings of OSPERT 2013, 2013, p. 11-19Conference paper (Refereed)
    Abstract [en]

    We have presented a multi-level adaptive hierarchical scheduling framework in our previous work. The framework targets compositional real-time systems which are composed of both hard and soft real-time systems. While static CPU portions are reserved for hard real-time components, the CPU portions of soft real-time components are adjusted during run-time. In this paper, we present the implementation details of our framework which is implemented as a Linux kernel loadable module. In addition, we present a case-study to evaluate the performance and the overhead of our framework.

  • 142.
    Moghaddami Khalilzad, Nima
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Multi-Level Adaptive Hierarchical Scheduling Framework for Composing Real-Time Systems2013In: 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2013, 2013, p. 320-329Conference paper (Refereed)
    Abstract [en]

    Processor partitioning and hierarchical scheduling have been widely used for composing hard real-time systems on a shared hardware platform while preserving the timing requirements of the systems. Due to the safety critical nature of the hard real-time systems for deriving the sufficient partition size often conservative analysis is used. Applying the exact same analysis for deriving the partition sizes for soft real-time systems result in unnecessary processors overallocation and consequently waste of the CPU resource. In this paper, to address the problem of composing soft and hard real-time systems on a resource constrained shared hardware, we present a multi-level adaptive hierarchical scheduling framework. In our framework, we adapt the processor partition sizes of soft real-time systems according to their need at each time point by on-line monitoring their processor demand. Furthermore, we implement our adaptive framework in the Linux kernel and show the performance of our framework using a case-study.

  • 143.
    Moghaddami Khalilzad, Nima
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Åsberg, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    On Adaptive Hierarchical Scheduling of Real-time Systems Using a Feedback Controller2011In: 3rd Workshop on Adaptive and Reconfigurable Embedded Systems (APRES'11), 2011Conference paper (Refereed)
    Abstract [en]

    Hierarchical scheduling provides predictable timing and temporal isolation; two properties desirable in real-time embedded systems. In hierarchically scheduled systems, subsystems should receive a sufficient amount of CPU resources in order to be able to guarantee timing constraints of its internal parts (tasks). In static systems, an exact amount of CPU resource can be allocated to a subsystem. However, in dynamic systems, where execution times of tasks vary considerably during runtime, it is desirable to give a dynamic portion of the CPU given the current load situation. In this paper we present a feedback control approach for adapting the amount of CPU resource that is allocated to subsystems during run-time such that each subsystem receives sufficient resources while keeping the number of deadline violations to a minimum. We also show an example simulation where the controller adapts the budget of a subsystem.

  • 144.
    Moghaddami Khalilzad, Nima
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Spampinato, Giacomo
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Bandwidth Adaptation in Hierarchical Scheduling Using Fuzzy Controllers2012In: 7th IEEE International Symposium on Industrial Embedded Systems, SIES 2012 - Conference Proceedings, 2012, p. 148-157Conference paper (Refereed)
    Abstract [en]

    In our previous work, we have introduced an adaptive hierarchical scheduling framework as a solution for composing dynamic real-time systems, i.e., systems where the CPU demand of their tasks are subjected to unknown and potentially drastic changes during run-time. The framework uses the PI controller which periodically adapts the system to the current load situation. The conventional PI controller despite simplicity and low CPU overhead, provides acceptable performance. However, increasing the pressure on the controller e.g, with an application consisting of multiple tasks with drastically oscillating execution times, degrades the performance of the PI controller. Therefore, in this paper we modify the structure of our adaptive framework by replacing the PI controller with a fuzzy controller to achieve better performance. Furthermore, we conduct a simulation based case study in which we compose dynamic tasks such as video decoder tasks with a set of static tasks into a single system, and we show that the new fuzzy controller outperforms our previous PI controller.

  • 145.
    Moghaddami Khalilzad, Nima
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Liu, Meng
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering. Embedded Systems.
    Probabilistic Application Interfaces for Hierarchical Scheduling2013In: IEEE Real-Time Systems Symposium: IEEE Real-Time Systems Symposium Work-in-Progress (WiP) session, Vancouver, Canad, 2013Conference paper (Refereed)
  • 146.
    Moghaddami Khalilzad, Nima
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Åsberg, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Towards Adaptive Hierarchical Scheduling of Real-Time Systems2011In: IEEE Symposium on Emerging Technologies and Factory Automation, ETFA, 2011 / [ed] Mammeri, Z., New York: IEEE , 2011, p. 1-8Conference paper (Refereed)
    Abstract [en]

    Hierarchical scheduling provides a modular framework for integrating, scheduling and guaranteeing timing constraints of compositional real-time systems. In such a scheduling framework, all modules should receive a sufficient portion of the shared CPU to be able to guarantee timing constraints of their internal parts. In dynamic systems i.e., systems where the execution time of tasks are subjected to sudden and drastic changes during run-time, assigning fixed CPU portions to the modules is conducive to either low CPU utilization or numerous task deadline misses. In this paper, in order to address this problem, we propose an adaptive CPU allocation method which dynamically assigns CPU portions to the modules during run-time based on their current CPU demand. Besides, the presented approach is evaluated using a series of different simulations. In addition, we present a method for scheduling modules in situations when the CPU resource is not sufficient for scheduling all modules. We introduce the notion of module (subsystem) criticality, and in an overload situation we distribute the CPU resource based on the criticality of modules.

  • 147.
    Monot, A.
    et al.
    ABB Corporate Research.
    Vulgarakis, Aneta
    ABB Corporate Research, Västerås, Sweden .
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    PASA: Framework for partitioning and scheduling automation applications on multicore controllers2014In: 19th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2014, 2014, p. Article number 7005153-Conference paper (Refereed)
    Abstract [en]

    With multicore controllers becoming available for industrial automation applications, new tools and algorithms to compute efficient partitioning and scheduling solutions for control applications need to be developed. Optimizing the deployment and the schedule of a set of Function Block Diagrams on a parallel architecture are both NP hard. Additionally, control engineers need help to shift from the single core towards the multicore paradigm. By taking advantage of the parallelism inside the control applications it is effectively possible to decrease the finish times of the applications which enables to decrease their cycle times and improve the quality of service of the controller processes. This paper presents a practical solution to this problem that consists in a framework, called PASA, designed for partitioning and scheduling control applications modeled as function block diagrams. It enables new algorithms tailored to solve these optimization problems. This paper presents an extension of list-based DAG scheduling algorithms designed to compute a deployment and schedule for several control applications with different cycle times. The different variants of this algorithm are compared against each other as well as against some other existing solutions on a set of randomly generated examples.

  • 148.
    Mubeen, Saad
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Abbaspour Asadollah, Sara
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Papadopoulos, Alessandro
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ashjaei, Seyed Mohammad Hossein
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Pei-Breivold, Hongyu
    ABB Corporate Research, Sweden.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. IS (Embedded Systems).
    Management of Service Level Agreements for Cloud Services in IoT: A Systematic Mapping Study2017In: IEEE Access, E-ISSN 2169-3536, no 99Article in journal (Refereed)
    Abstract [en]

    Cloud computing and Internet of Things (IoT) are computing technologies that provide services to consumers and businesses, allowing organizations to become more agile and flexible. Therefore, ensuring Quality of Service (QoS) through Service Level Agreements (SLAs) for such cloud-based services is crucial for both the service providers and service consumers. As SLAs are critical for cloud deployments and wider adoption of cloud services, the management of SLAs in cloud and IoT has thus become an important and essential aspect. This paper investigates the existing research on the management of SLAs in IoT applications that are based on cloud services. For this purpose, a Systematic Mapping study (a well-defined method) is conducted to identify the published research results that are relevant to SLAs. The paper identifies 328 primary studies and categorizes them into seven main technical classifications: SLA management, SLA definition, SLA modeling, SLA negotiation, SLA monitoring, SLA violation and trustworthiness, and SLA evolution. The paper also summarizes the research types, research contributions, and demographic information in these studies. The evaluation of the results show that most of the approaches for managing SLAs are applied in academic or controlled experiments with limited industrial settings rather than in real industrial environments. Many studies focus on proposal models and methods to manage SLAs, and there is a lack of focus on the evolution perspective and a lack of adequate tool support to facilitate practitioners in their SLA management activities. Moreover, the scarce number of studies focusing on concrete metrics for qualitative or quantitative assessment of QoS in SLAs urges the need for in-depth research on metrics definition and measurements for SLAs.

  • 149.
    Mubeen, Saad
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ashjaei, Mohammad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Integrating Response-Time Analyses for Heterogeneous Automotive Networks in MPS-CAN Analyzer2015In: 6th International Workshop on Analysis Tools and Methodologies for Embedded and Real-time Systems WATERS 2015, 2015Conference paper (Refereed)
    Abstract [en]

    MPS-CAN analyzer is a research tool that supports the Response Time Analysis (RTA) for Controller Area Network (CAN). It takes into account various queueing policies; buffer limitations in the CAN controllers; and mixed transmission patterns supported by the higher-level protocols. In this paper, we extend the MPS-CAN analyzer to support RTA of heterogeneous automotive networks. Within this context, first we implement RTA for Ethernet Audio/Video Bridging (AVB) messages in a single-switch architecture. We then integrate the analyses for CAN and Ethernet AVB by exploiting the analysis for CAN to Ethernet AVB gateway. With this integration, the MPS-CAN analyzer supports the analysis for heterogeneous messages that traverse through heterogeneous networks consisting of CAN and Ethernet AVB. We also evaluate the newly implemented analyses by conducting an automotive-application case study.

  • 150.
    Mubeen, Saad
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Zhao, Xiaosha
    Mälardalen University.
    Gan, Lingjian
    Mälardalen University.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Towards automated deployment of IEC 61131-3 applications on multi-core systems2016In: IEEE International Workshop on Factory Communication Systems - Proceedings, WFCS, 2016, article id Article number 7496531Conference paper (Refereed)
    Abstract [en]

    The IEC 61131-3 standard, a widely used standard in the automation industry, defines various programming languages for programmable logic controllers. Today, the open source tools that comply with this standard do not support deployment of the applications on multi-core platforms. In this paper, we introduce a novel multi-step approach that aims to support automatic deployment of the automation control applications, developed using the IEC 61131-3 standard, to multi-core platforms. In the first step, the generated sequential code is partitioned. In the second step, the partitioned code is allocated to tasks while the tasks are mapped to various cores, without violating the dependencies, synchronization and communication constraints in the application. In order to provide a proof of concept, we develop a prototype by extending an existing tool that complies with the standard. We also perform a case study and a preliminary evaluation of the prototype. 

1234 101 - 150 of 194
CiteExportLink to result list
Permanent link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf