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  • 101.
    Shah, M. B. N.
    et al.
    Universiti Teknikal Malaysia.
    Husain, A. R.
    Universiti Teknologi Malaysia.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    A new error handling algorithm for controller area network in networked control system2013In: Computers in industry (Print), ISSN 0166-3615, E-ISSN 1872-6194, Vol. 64, no 8, p. 984-997Article in journal (Refereed)
    Abstract [en]

    An effective error handling mechanism plays an important role to ensure the reliability and robustness of the application of controller area network (CAN) in controlling dynamic systems. This paper addresses a new online error handling approach or named per-sample-error-counting (PSeC) technique that tends to replace native error handling protocol in controller area network (CAN). The mechanism is designed to manage transmission errors of both sensor and control data in networked control system (NCS) used in controlling dynamic system such that the stability of the feedback system is preserved. A new parameter denoted as maximum allowable number of error burst (MAEB) is introduced in which MAEB is selected based on available bandwidth of the CAN network. MAEB serves as the maximum number of attempt of re-transmission of erroneous data per sample which allows the maximum transmission period to be known and guaranteed for time-critical control system. The efficacy of the proposed method is verified by applying the algorithm on the fourth order inverted pendulum system simulated on Matlab/Truetime simulator and the performance is benchmarked with the existing CAN error management protocol. The simulation run under various systems conditions demonstrate that the proposed method results in superior system performance in handling data transmission error as well as meeting control system requirement. © 2013 Elsevier B.V.

  • 102.
    Steiner, Wilfried
    et al.
    TTTech Computertechnik AG, Vienna, Austria.
    Mehmed, Ayhan
    TTTech Computertechnik AG, Vienna, Austria.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Improving Intelligent Vehicle Dependability By Means of Infrastructure-Induced Tests2015In: Proceedings - 2015 45th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, DSN-W 2015, 2015, p. 147-152Conference paper (Refereed)
    Abstract [en]

    Advanced driver assistance systems (ADAS) take over more and more driving responsibilities from the human operator and, therefore, evolve into safety-critical systems. Thus, the dependability of such systems is of up-most importance. While upcoming automobiles themselves will implement fault-tolerance and robustness mechanisms, it can be beneficial to also take infrastructure measures into account when assessing the overall vehicle dependability. In this paper we discuss an example of an infrastructure measure that targets to improve the dependability of an on-board computer vision system. Based on this example we outline a cyber-physical systems (CPS) architecture for intelligent vehicles and address open research directions.

  • 103. Sukumaran Nair, Arun
    et al.
    Colaco, Louella
    Patil, Geeta
    Raveendran, Biju
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    MEDIATOR - A Mixed Criticality Deadline Honored Arbiter for Multi-core Real-time Systems2020In: Proceedings - 2019 IEEE/ACM 23rd International Symposium on Distributed Simulation and Real Time Applications, DS-RT 2019October 2019, Article number 8958663, 2020Conference paper (Refereed)
    Abstract [en]

    Multi-core systems are the potential enablers of the overwhelming growth of mixed criticality systems. There exist challenges to the widespread usage of multi-core in mixed criticality systems due to the non-predictive resource access timings. In this work, we present an LLC access control mechanism, MEDIATOR that guarantees high criticality job executions without deadline misses for multi-core mixed-criticality systems. In MEDIATOR, the LLC access requests of lower criticality jobs are honored, if and only if there exists adequate slack for higher criticality jobs. The legacy FIFO arbiter has a greater probability of deadline misses for high criticality jobs. The MEDIATOR behaves like legacy FIFO when there is sufficient slack. When the slack of the higher criticality jobs is less, it blocks low criticality jobs for the successful execution of higher criticality jobs. The experimental evaluation with software simulation and hardware implementation confirms the successful completion of high criticality jobs with LLC contention by honoring low criticality jobs whenever possible. Simulation results with the help of synthetic benchmark shows successful completion of high criticality jobs at a high workload where legacy FIFO fails. The hardware design synthesized in Cadence using Genus Synthesis Solution 17.21−s010_1 shows that MEDIATOR takes negligibly small time overhead and energy consumption to achieve the same.

  • 104.
    Sundmark, Daniel
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Carlson, Jan
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Ermedahl, Andreas
    Mälardalen University, School of Innovation, Design and Engineering.
    Structural Testing of Component-Based Systems2008In: Lecture Notes in Computer Science, Vol. 5282, Springer, 2008, p. 180-195Chapter in book (Refereed)
    Abstract [en]

    Component based development of software systems needs to devise effective test management strategies in order fully achieve its perceived advantages of cost efficiency, flexibility, and quality in industrial contexts. In industrial systems with quality demands, while testing software, measures are employed to evaluate the thoroughness achieved by execution of a certain set of test cases. Typically, these measures are expressed in the form of coverage of different structural test criteria, e.g., statement coverage. However, such measures are traditionally applicable only on the lowest level of software integration (i.e., the component level). As components are assembled into subsystems and further into full systems, general measures of test thoroughness are no longer available. In this context, we formalize the added test effort and show to what extent the coverage of structural test criteria are maintained when components are integrated, in three representative component models. This enables focusing on testing the right aspects of the software at the right level of integration, and achieves cost reduction during testing one of the most resource-consuming activities in software engineering. 

  • 105.
    Swetha, A.
    et al.
    Amrita Vishwa Vidyapeetham, India .
    Anisha Asmy, N. R.
    Amrita Vishwa Vidyapeetham, India .
    Radhamani Pillay, V.
    Amrita Vishwa Vidyapeetham, India .
    Kumaresh, V.
    Amrita Vishwa Vidyapeetham, India .
    Saravana Prabu, R.
    Amrita Vishwa Vidyapeetham, India .
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dasgupta, S.
    Mohandas College of Engineering & Technology, India.
    Algorithm for autonomous cruise control system-real time scheduling and control aspects2014In: Advances in Intelligent Systems and Computing, 2014, p. 449-456Conference paper (Refereed)
  • 106.
    Swetha, A.
    et al.
    Amrita Vishwa Vidyapeetham University, India .
    Radhamani Pillay, V.
    Amrita Vishwa Vidyapeetham University, India .
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dasgupta, S.
    Mohandas College of Engineering & Technology, India .
    Hard aperiodic scheduling in fault tolerant cruise system-comparative evaluation with dual redundancy2015In: Advances in Intelligent Systems and Computing, 2015, Vol. 327, p. 589-596Conference paper (Refereed)
    Abstract [en]

    A scheduling algorithm for hard real-time systems with aperiodic task arrivals and fault tolerance can basically meet the needs of applications in the automotive or avionics domain. In these applications, weight, size and power requirements are crucial. Any resource augmentation technique to satisfy this and ensuring safe functionality under faults can bring in a paradigm shift in the design. This paper is based on a strategy for fault tolerance with task level criticality on dual processor system. An application with parallelizable task set has been used to advantage for resource augmentation under fault free condition. A processor failure (permanent fault) leads to safe recovery mechanism with graceful degradation. This paper deals with fault tolerant periodic task scheduling with arrivals of hard aperiodic events. An algorithm for aperiodic scheduling with admission control plan for hard and soft aperiodic tasks is developed and implemented on LPC2148 processors for the cruise system. A comparison is made with a traditional dual redundant system with appropriate performance metrics for evaluation.

  • 107.
    Swetha, Annam
    et al.
    Amrita University, India.
    Pillay, Radhamani
    Amrita University, India.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Design, Analysis and Implementation of Improved Adaptive Fault Tolerant Model for Cruise Control Multiprocessor System2014In: International Journal of Computer Applications, ISSN 0975-8887, Vol. 86, no 15, p. 19-26Article in journal (Refereed)
    Abstract [en]

    Safety or mission critical applications have to recover from an error within an acceptable time window or it may potentially lead to disastrous effects or higher costs. The usual industrial practice is to employ fault tolerance using hardware redundancy where costs are highly exorbitant depending on the mission. In this paper, we present a framework for adaptive fault tolerance on the commonly used hardware redundancy. This proposed model gives enhanced resource management and improved system performance under normal runtime and provides minimal safe functionality under error conditions. A new scheduling method, a combination of dynamic planning and dynamic best effort approach has been designed for joint scheduling of periodic and aperiodic tasks which also include online reconfiguration for error management. This fault recovery technique allows all critical tasks to meet their deadlines and the system continues functioning with minimal safe functionality upon errors. This model has been analyzed and evaluated on a practical case study of a Cruise Control System vis- à-vis a traditional redundancy scheme with simulation and validated with appropriate performance metrics. The results demonstrate the high performance throughput and process speedup (Execution time of process) that can be gained by applying this model to an m-processor redundancy model and the advantages can be accrued specially in the field of avionics in terms of fuel/weight ratio.

  • 108.
    Thekilakkattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Aysan, Hüseyin
    Mälardalen University, School of Innovation, Design and Engineering.
    Optimizing the Fault Tolerance Capabilities of Distributed Real-Time Systems2009In: 14th International Conference on Emerging Technologies and Factory Automation, WiP, 2009Conference paper (Refereed)
    Abstract [en]

    Industrial real-time systems typically have to satisfy complex requirements, mapped to the task attributes, eventually guaranteed by a fixed priority scheduler in a distributed environment. These systems consist of a mix of hard and soft tasks with varying criticality, as well as associated fault tolerance requirements. Time redundancy techniques are often preferred in industrial applications and, hence, it is extremely important to devise resource efficient methodologies for scheduling real-time tasks under failure assumptions. In this paper, we propose a methodology to provide a priori guarantees in distributed real-time systems with redundancy requirements. We do so by identifying temporal feasibility windows for all task executions and re-executions, as well as allocating them on different processing nodes. We then use optimization theory to derive the optimal feasibility windows that maximize the utilization on each node, while avoiding overloads. Finally on each node, we use Integer Linear Programming (ILP) to derive fixed priority task attributes that guarantee the task executions within the derived feasibility windows, while keeping the associated costs minimized.

  • 109.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Aysan, Hüseyin
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Towards a Contract-based Fault-tolerant Scheduling Framework for Distributed Real-time Systems2011Conference paper (Refereed)
    Abstract [en]

    The increasing complexity of real-time systems has lead to the adaptation of component based methods for their development which has a promising potential for faster and more cost effective development of complex real-time systems by facilitating reuse of the real-time components. This is enabled by the components' composition using contracts, which ensures 'correctness by construction'. Modern real-time systems typically consist of mixed criticality components, and scheduling them in a fault-tolerant as well as efficient way, on a distributed platform, is a challenging task. In this paper, we propose a contract-based approach to fault tolerant scheduling of mixed criticality real-time components on a distributed platform, by providing guarantees for the hard real-time components through offline negotiated contracts, as well as flexibility for the soft real-time components through online (re-)negotiated contracts. The proposed approach uses optimization techniques, that uses timing requirements and the recommendations of studies like Fault Hazard Analysis and Zonal Analysis, to provide the contractual parameters for the mixed-criticality components.

  • 110.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Baruah, Sanjoy
    University of North Carolina at Chapel Hill, USA.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    The Global Limited Preemptive Earliest Deadline First Feasibility of Sporadic Real-time Tasks2014In: Proceedings - Euromicro Conference on Real-Time Systems, 21 October 2014, 2014, p. 301-310Conference paper (Refereed)
    Abstract [en]

    The feasibility of preemptive and non-preemptivescheduling has been well investigated on uniprocessor and multiprocessor platforms under both Fixed Priority Scheduling(FPS) and Earliest Deadline First (EDF) paradigms. While feasibility of limited preemptive scheduling under FPS has been addressed on both uniprocssor and multiprocessor platforms,under EDF it has been investigated only on uniprocessors, and a similar analysis for multiprocessor platforms is still missing.In this paper, we introduce global Limited Preemptive Earliest Deadline First (g-LP-EDF) scheduling, and propose the associated feasibility analysis to complete the above described feasibility analysis spectrum. Specifically, we derive a sufficient condition that guarantees g-LP-EDF feasibility of sporadic real timetasks which directly provides a global Non-Preemptive Earliest Deadline First (g-NP-EDF) feasibility test. We then study the interplay between g-LP-EDF feasibility and processor speed, in order to quantify the sub-optimality of g-NP-EDF in terms of the minimum speed-up required to guarantee g-NP-EDF feasibility of all feasible tasksets. The results presented in this paper complement our previous results on uniprocessors, and provide a unified result on the sub-optimality of non-preemptive EDF on both uniprocessor and multiprocessor platforms.

  • 111.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Burns, Alan
    University of York, UK.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Birla Institute of Technology and Science, India.
    Mixed Criticality Systems: Beyond Transient Faults2015In: WMC 2015: Proceedings of the 3rd International Workshop on Mixed Criticality Systems, 2015Conference paper (Refereed)
    Abstract [en]

    Adopting mixed-criticality architectures enable safe sharing of computational resources between tasks of different criticalities consequently leading to reduced Size, Weight and Power (SWaP) requirements. A majority of the research in mixed-criticality systems focuses on scheduling tasks whose Worst Case Execution Times (WCETs) are certified to varying levels of assurances. If any given task overruns its WCET, the system switches to a higher criticality and all the lower criticality tasks are discarded to make time for the execution of higher criticality tasks. Task execution time overruns are transient faults that are typically tolerated by simply executing an alternate task before the original deadline, or, by discarding the failed task to prevent it from interfering with higher criticality tasks. However, permanent faults such as processor failures can render the system to be useless, many times leading to unsafe states. In this paper we present a taxonomy of fault tolerance techniques to tolerate permanent faults, as well as map it to real-time mixed-criticality requirements based on the extend of fault coverage that in turn influences the associated assurance.

  • 112.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Davis, Rob
    University of York, UK.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Birla Institute of Technology and Science, India.
    Bertogna, Marko
    University of Modena, Italy.
    Multiprocessor Fixed Priority Scheduling with Limited Preemptions2015In: ACM International Conference Proceeding Series, Volume 04-06, 2015, p. 13-22Conference paper (Refereed)
    Abstract [en]

    Challenges associated with allowing preemptions and migrations are compounded in multicore systems, particularly under global scheduling policies, because of the potentially high overheads. For example, multiple levels of cache greatly increase preemption and migration related overheads as well as the difficulty involved in accurately accounting for them, leading to substantially inflated worst-case execution times. Preemption and migrations related overheads can be significantly reduced, both in number and in size, by using fixed preemption points in the tasks' code; thus dividing each task into a series of non-preemptive regions. This leads to an additional consideration in the scheduling policy. When a high priority task is released and all of the processors are executing non-preemptive regions of lower priority tasks, then there is a choice to be made in terms of how to manage the next preemption. With an eager approach the first lower priority task to reach a preemption point is preempted even if it is not the lowest priority running task. Alternatively, with a lazy approach, preemption is delayed until the lowest priority currently running task reaches its next preemption point. In this paper, we show that under global fixed priority scheduling with eager preemptions each task suffers from at most a single priority inversion each time it resumes execution. Building on this observation, we derive a new response time based schedulability test for tasks with fixed preemption points. Experimental evaluations show that global fixed priority scheduling with eager preemptions is significantly more effective than with lazy preemption using link based scheduling in terms of task set schedulability.

  • 113.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Bounding the effectiveness of temporal redundancy in fault-tolerant real-time scheduling under error bursts2014In: 19th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2014, 2014, p. Article number 7005170-Conference paper (Refereed)
    Abstract [en]

    Reliability is a key requirement in many distributed real-time systems deployed in safety and mission critical applications, and temporal redundancy is a widely employed strategy towards guaranteeing it. The temporal redundancy approach is typically based on task re-executions in form of entire tasks, task alternates or, check-pointing blocks, and each of the re-execution strategies have different impacts on the Fault Tolerance feasibility (FT-feasibility) of the system, which is traditionally defined as the existence of a schedule that guarantees timeliness of all tasks under a specified fault hypothesis. In this paper, we propose the use of resource augmentation to quantify the FT-feasibility of real-time task sets and use it to derive limits on the effectiveness of temporal redundancy in fault-tolerant real-time scheduling under error bursts of bounded lengths. We derive the limits for the general case, and then show that for the specific case when the error burst length is no longer than half the shortest deadline, the lower limit on the effectiveness of temporal redundancy is given by the resource augmentation bound 2, while, the corresponding upper-limit is 6. Our proposed approach empowers a system designer to quantify the effectiveness of a particular implementation of temporal redundancy. 

  • 114.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Fault Tolerant Scheduling of Mixed Criticality Real-Time Tasks under Error Bursts2015In: PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON INFORMATION AND COMMUNICATION TECHNOLOGIES, ICICT 2014, Kochi, India: Elsevier Procedia Computer Science , 2015, p. 1148-1155Conference paper (Refereed)
    Abstract [en]

    Dependability is an important requirement in hard real-time applications due to the potentially catastrophic consequences of failures. In these systems, fault tolerance mechanisms like temporal redundancy are adopted to improve reliability. Most of these types of systems are increasingly moving towards integrating critical and non-critical functionalities on the same platform to, e.g., better utilize resources and further reduce cost, and are commonly deployed in environments where errors typically occur in the form of bursts e.g., due to Electro Magnetic Interference (EMI). Consequently, in mixed criticality real-time systems, the designer must guarantee that critical tasks are feasible even under the presence of the error burst, while ensuring the feasibility of the non-critical tasks that are not affected by the burst. We refer to this as {em Fault Tolerance feasibility} (FT-feasibility) of mixed-criticality real-time systems. In this paper, we build on the well established results on Earliest Deadline First (EDF) scheduling, to derive a sufficient test that determines the FT-feasibility of a set of mixed criticality real-time tasks under the assumption that the inter-arrival time between two consecutive error bursts is at least equal to the hyper-period of the taskset.

  • 115.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Preemption Control using CPU Frequency Scaling in Real-time Systems2011In: 18th INTERNATIONAL CONFERENCE ON CONTROL SYSTEMS AND COMPUTER SCIENCE, 2011, p. 88-95Conference paper (Refereed)
    Abstract [en]

    Controlling the preemption behavior in real-time systems can have beneficial impacts in multiple contexts as it can decrease the processor utilization, reduce the energy consumption or even enable the schedulability of the system. In this paper we study the preemption behavior of sporadic task systems scheduled using the Fixed Priority Scheduling (FPS) policy, and evaluate the feasibility of preemption control using CPU frequency scaling. We show that offline preemption control using CPU frequency scaling is difficult for sporadic task systems, and we propose an online heuristic algorithm, of linear complexity, to control the number of preemptions in a sporadic task system. Evaluation results show that online CPU frequency scaling is an attractive approach for preemption control in sporadic task systems.

  • 116.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Probabilistic Preemption Control using Frequency Scaling for Sporadic Real-time Tasks2012In: 7th IEEE International Symposium on IndustrialEmbedded Systems (SIES): Conference Proceedings, IEEE Computer Society, 2012, p. 158-165Conference paper (Refereed)
    Abstract [en]

    Preemption related costs are major sources of unpredictability in the task execution times in a real-time system. We examine the possibility of using CPU frequency scaling to control the preemption behavior of real-time sporadic tasks scheduled using a preemptive Fixed Priority Scheduling (FPS) policy. Our combined offline-online method provides probabilistic preemption control guarantees by making use of the release time probabilities of the sporadic tasks. The offline phase derives the probability related deviation from the minimum inter-arrival time of tasks. The online algorithm uses this information to calculate appropriate CPU frequencies that guarantees non-preemptive task executions while preserving the overall system schedulability. The online algorithm has a linear complexity and does not lead to significant implementation overheads. Our evaluations demonstrate the effectiveness of the method as well as the possibility of energy-preemption trade offs. Even though we have considered FPS, our method can easily be extended to dynamic priority scheduling schemes

  • 117.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Quantifying the Sub-Optimality of Non-Preemptive Real-time Scheduling2013In: Proceedings - Euromicro Conference on Real-Time Systems, 2013, 2013, p. 113-122Conference paper (Other academic)
    Abstract [en]

    A number of preemptive real-time scheduling algorithms, such as Earliest Deadline First (EDF), are known to be optimal on uni-processor systems under specified assumptions. However, no uni-processor optimal algorithm exists under the non-preemptive scheduling paradigm. Hence preemptive schemes strictly dominate non-preemptive schemes with respect to uni-processor feasibility. However, the 'goodness' of non-preemptive schemes, compared to uni-processor optimal preemptive scheduling schemes such as EDF, which can also be referred to as its sub-optimality, has not been fully investigated yet. In this paper, we apply resource augmentation, specifically processor speed-up, to quantify the sub-optimality of non-preemptive scheduling with respect to EDF, and apply the results to guarantee user specified upper-bounds on the preemption related scheduling costs. In particular, we derive an upper bound on the minimum processor speed-up required to guarantee the non-preemptive feasibility of tasks that are deemed feasible under the preemptive EDF, and we prove that, in the cases where, for all tasks in the task set, the largest execution requirement is not greater than the shortest deadline, this bound is equal to 4. We also show how the proposed approach enables a system designer to choose an optimal processor, in order to, e.g., guarantee specified upper bounds on the preemption related overheads.

  • 118.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    The Limited-preemptive Feasibility of Real-time Tasks on Uniprocessors2015In: Real-time systems, ISSN 0922-6443, E-ISSN 1573-1383, Vol. 51, no 3, p. 247-273Article in journal (Refereed)
    Abstract [en]

    The preemptive scheduling paradigm is known to strictly dominate the non-preemptive scheduling paradigm with respect to feasibility. On the other hand, preemptively scheduling real-time tasks on uniprocessors, unlike non-preemptive scheduling, may lead to unschedulability due to, e.g., preemption related overheads. The limited-preemptive scheduling paradigm, which is a generalization of preemptive and non-preemptive paradigms, has, however, the potential to reduce the preemption related overheads while enabling high processor utilization. In this paper, we focus on the characterization of the effects of increasing the computational resources on the limited-preemptive feasibility of real-time tasks in order to quantify the sub-optimality of limited-preemptive scheduling. Specifically, we first derive the required processor speed-up bound that guarantees limited-preemptive feasibility of any uniprocessor feasible taskset. Secondly, we demonstrate the applicability of the results in the context of controlling preemption related overheads while minimizing the required processor speed-up. In particular, we identify the preemptive behavior that minimizes preemption-related overheads, as well as derive the optimal processor speed associated with it. Finally, we examine the consequences of having more processors on limited-preemptive feasibility and derive the bound on the number of processors that guarantees a specified limited-preemptive behavior for any uniprocessor feasible real-time taskset. This paper essentially bridges the preemptive and non-preemptive real-time scheduling paradigms by providing significant theoretical results building on the limitedpreemptive scheduling paradigm, as well as provides analytical inputs to developers in order to perform various trade-offs, e.g., code refactoring, to control the preemptive behavior of real-time tasks.

  • 119.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Towards Preemption Control Using CPU Frequency Scaling in Sporadic Task Systems2011In: SIES 2011 - 6th IEEE International Symposium on Industrial Embedded Systems, Conference Proceedings, Vasteras, 2011, p. 35-38Conference paper (Refereed)
    Abstract [en]

    Preemptions in real-time systems scheduling typically lead to variations in task execution times, increase the temporal overhead required for various RTOS related operations and may even cause unschedulability.We examine the preemption behavior of sporadic tasks scheduled under the Fixed Priority Scheduling (FPS) policy, and evaluate the possibility of using CPU frequency scaling for preemption control. We propose an online heuristic-based algorithm, of linear complexity, to control the number of preemptions in a sporadic task system using CPU frequency scaling. Evaluation results show that CPU frequency scaling is an attractive option to control the preemption behavior of real-time sporadic task systems.

  • 120.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Using Processor Speed-up to Control Preemption Related Costs2013Report (Other academic)
  • 121.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Aysan, Huseyin
    Mälardalen University, School of Innovation, Design and Engineering.
    Resource Augmentation for Fault-Tolerance Feasibility of Real-time Tasks under Error Bursts2012In: Proceedings of the 20th International Conference on Real-Time and Network Systems (RTNS 12), Association for Computing Machinery (ACM), 2012, p. 41-50Conference paper (Refereed)
    Abstract [en]

    Dependability is a vital system requirement, particularly in safety critical and mission critical real-time systems, due to the potentially catastrophic consequences of failures. In most critical applications different fault tolerance mechanisms using redundancy are employed to prevent possible failures. In the case of real-time systems the system designer must ensure that the task set is feasible even under faults, which we refer to as 'fault tolerance feasibility'. Due to cost considerations, often temporal redundancy has been prevalently used to meet this objective.

    In this paper we focus on guaranteeing fault-tolerance feasibility under error bursts on uni-processor systems by the usage of resource augmentation, specifically through processor speed-up. Firstly, we derive a processor demand bound based sufficient condition for a set of real-time tasks to be fault tolerance feasible under an assumption that no more than one error burst occurs during the hyper-period of the task set. Subsequently, we derive the necessary resource augmentation bounds (i.e., the processor speed-up), that guarantees the fault tolerance feasibility, if the sufficient test fails. Finally, we prove that, if the error burst length is no more than half the shortest relative deadline of the task set, the minimum processor speed-up required to guarantee fault tolerance feasibility is upper-bounded by 6.

  • 122.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Pillai, Anju
    Amrita School of Engineering, Amrita Vishwa Vidyapeetham, India .
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Preemption Control Using Frequency Scaling in Fixed Priority Scheduling2010In: Proceedings - IEEE/IFIP International Conference on Embedded and Ubiquitous Computing, EUC 2010, 2010, p. 281-288Conference paper (Refereed)
    Abstract [en]

    Controlling the number of preemptions in realtime systems is highly desirable in order to achieve an efficient system design in multiple contexts. For example, the delays due to context switches account for high preemption overheads which detrimentally impact the system schedulability. Preemption control can also be potentially used for the efficient control of critical section behaviors in multi-threaded applications. At the same time, modern processor architectures provide for the ability to selectively choose operating frequencies, primarily targeting energy efficiency as well as system performance. In this paper, we propose the use of CPUFrequency Scaling for controlling the preemptive behavior of real-time tasks. We present a framework for selectively eliminating preemptions, that does not require modifications to the task attributes or to the underlying scheduler. We evaluate the proposed approach by four different heuristics through extensive simulation studies. 

  • 123.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Pillai, Anju S
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Reducing the Number of Preemptions in Real-Time Systems Scheduling by CPU Frequency Scaling2010In: 18th International Conference on Real-Time and Network Systems, Toulouse, France, 2010Conference paper (Refereed)
    Abstract [en]

    Controlling the number of preemptions in real-time systems is highly desirable in order to achieve an efficient system design in multiple contexts. For example, the delays due to context switches account for high preemption overheads which detrimentally impact the system schedulability. Preemption avoidance can also be potentially used for the efficient control of critical section behaviors in multi-threaded applications. At the same time, modern processor architectures provide for the ability to selectively choose operating frequencies, primarily targeting energy efficiency as well as system performance. In this paper, we propose the use of CPU Frequency Scaling for controlling the preemptive behavior of real-time tasks. We present a framework for selectively eliminating preemptions, that does not require modifications to the task attributes or to the underlying scheduler. We evaluate the proposed approach by four different heuristics through extensive simulation studies.

  • 124.
    Thekkilakattil, Abilsash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mixed criticality scheduling in fault-tolerant distributed real-time systems2014In: International Conference on Embedded Systems, ICES 2014, 2014, p. 92-97Conference paper (Refereed)
    Abstract [en]

    Modern safety critical real-time systems are composed of tasks of mixed criticalities and the problem of scheduling them in a fault tolerant manner, on a distributed platform, is challenging. Fault tolerance is typically achieved by using redundancy techniques, most commonly in the form of temporal redundancy which involves executing an alternate task before the original deadline of the failed task. Additionally, studies like Zonal Hazard Analysis (ZHA) and Fault Hazard Analysis (FHA) may impose extra constraints on the re-executions, e.g., spatial separation of alternates, to improve reliability. In this paper, we present a method for scheduling mixed criticality real-time tasks on a distributed platform in a fault tolerant manner while taking into account the recommendations given by the reliability studies like ZHA and FHA. First, we use mathematical optimization to allocate tasks on the processors, and then derive fault tolerant and fault aware feasibility windows for the critical and non-critical tasks respectively. Finally, we derive scheduler specific task attributes like priorities for the fixed priority scheduler. Our method provides hard real-time fault tolerance guarantees for critical tasks while maximizing resource utilization for non-critical tasks.

  • 125.
    UL Muram, Faiz
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Javed, Muhammad Atif
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    System of Systems Hazard Analysis Using HAZOP and FTA for Advanced Quarry Production2019In: 2019 4th International Conference on System Reliability and Safety, ICSRS 2019, Institute of Electrical and Electronics Engineers Inc. , 2019, p. 394-401Conference paper (Refereed)
    Abstract [en]

    The advanced production systems are composed of separate and distinct systems that operate in both isolation and conjunction, and therefore forms the System-of-Systems (SoS). However, a lot of production systems are classified as safety-critical, for example, due to the interactions between machines and involved materials. From the safety perspective, besides the behaviour of an individual system in SoS, the emergent behaviour of systems that comes from their individual actions and interactions must be considered. An unplanned event or sequence of events in safety-critical production systems may results in human injury or death, damage to machines or the environment. This paper focuses on the construction equipment domain, particularly the quarry site, which solely produce dimension stone and/or gravel products. The principal contribution of this paper is SoS hazard identification and mitigation/elimination for the electric quarry site for which the combination of guide words based collaborative method Hazard and Operability (HAZOP) and Fault Tree Analysis (FTA) are used. The published studies on HAZOP and FTA techniques have not considered the emergent behaviours of different machines. The applicability of particular techniques is demonstrated for individual and emergent behaviours of machines used in the quarry operations, such as autonomous hauler, wheel loader, excavator and crusher. 

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