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  • 1.
    Asadi, M.
    et al.
    Department of Electrical Engineering, Tarbiat Modares University, Tehran, Iran.
    Poursalim, F.
    Shiraz University of Medical Science, Shiraz, Iran.
    Loni, Mohammad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Daneshtalab, Masoud
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Gharehbaghi, A.
    Department of Biomedical Engineering, Linköping University, Linköping, Sweden.
    Accurate detection of paroxysmal atrial fibrillation with certified-GAN and neural architecture search2023In: Scientific Reports, E-ISSN 2045-2322, Vol. 13, no 1Article in journal (Refereed)
    Abstract [en]

    This paper presents a novel machine learning framework for detecting PxAF, a pathological characteristic of electrocardiogram (ECG) that can lead to fatal conditions such as heart attack. To enhance the learning process, the framework involves a generative adversarial network (GAN) along with a neural architecture search (NAS) in the data preparation and classifier optimization phases. The GAN is innovatively invoked to overcome the class imbalance of the training data by producing the synthetic ECG for PxAF class in a certified manner. The effect of the certified GAN is statistically validated. Instead of using a general-purpose classifier, the NAS automatically designs a highly accurate convolutional neural network architecture customized for the PxAF classification task. Experimental results show that the accuracy of the proposed framework exhibits a high value of 99.0% which not only enhances state-of-the-art by up to 5.1%, but also improves the classification performance of the two widely-accepted baseline methods, ResNet-18, and Auto-Sklearn, by [Formula: see text] and [Formula: see text].

  • 2. Asadi, Nima
    et al.
    Saadatmand, Mehrdad
    Mälardalen University, School of Innovation, Design and Engineering.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Run-Time Monitoring of Timing Constraints: A Survey of Methods and Tools2013Conference paper (Refereed)
    Abstract [en]

    Despite the availability of static analysis methods to achieve a correct-by-construction design for different systems in terms of timing behavior, violations of timing constraints can still occur at run-time due to different reasons. The aim of monitoring of system performance with respect to the timing constraints is to detect the violations of timing specifications, or to predict them based on the current system performance data. Considerable work has been dedicated to suggesting efficient performance monitoring approaches during the past years. This paper presents a survey and classification of those approaches in order to help researchers gain a better view over different methods and developments in monitoring of timing behavior of systems. Classifications of the mentioned approaches are given based on different items that are seen as important in developing a monitoring system, i.e. the use of additional hardware, the data collection approach, etc. Moreover, a description of how these different methods work is presented in this paper along with the advantages and downsides of each of them.

  • 3.
    Ashjaei, Seyed Mohammad Hossein
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A novel frame preemption model in TSN networks2021In: Journal of systems architecture, ISSN 1383-7621, E-ISSN 1873-6165, Vol. 116, article id 102037Article in journal (Refereed)
    Abstract [en]

    This paper identifies a limitation in the frame preemption model in the TSN standard (IEEE 802.1Q-2018), due to which high priority frames can experience significantly long blocking delays, thereby exacerbating their worst-case response times. This limitation can have a considerable impact on the design, analysis and performance of TSN-based systems. To address this limitation, the paper presents a novel and more efficient frame preemption model in the TSN standard that allows over 90% reduction in the maximum blocking delay leading to lower worst-case response times of high priority frames compared to the frame preemption model used in the existing works. The paper also shows that the improvement becomes even more significant in multi-switch TSN networks. In order to evaluate the effects of preemption, the paper performs simulations by enabling and disabling preemptions as well as enabling and disabling the Hold/Release mechanism supported by TSN. Furthermore, the paper performs a comparative evaluation of the two models of frame preemption in TSN using simulations. The evaluation shows that the maximum response times of high priority frames can be significantly reduced with very small impact on the response times of lower priority frames. The paper also shows the improvement in the maximum response times of higher priority frames using an automotive industrial use case that employs a multi-hop TSN network for on-board communication.

  • 4.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ciccozzi, Federico
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Bruhn, Fredrik
    Bruhnspace AB, Uppsala, Sweden .
    Software architecture for next generation hyperparallel cyber-physical hardware platforms: challenges and opportunities2015In: ECSAW '15 Proceedings of the 2015 European Conference on Software Architecture Workshops, 2015, Vol. Article No. 19Conference paper (Refereed)
    Abstract [en]

    We present what is destined to become the de-facto standard for hardware platforms for next generation cyber-physical systems. Heterogeneous System Architecture (HSA) is an initiative to harmonize the industry around a common architecture which is easier to program and is an open standard defining the key interfaces for parallel computation. Since HSA is supported by virtually all major players in the silicon market we can conjecture that HSA, with its capabilities and quirks, will highly influence both the hardware and software for next generation cyber-physical systems. In this paper we describe HSA and discuss how its nature will influence architectures of system software and application software. Specifically, we believe that the system software needs to both leverage the hyperparallel nature of HSA while providing predictable and efficient resource allocation to different parallel activities. The application software, on the other hand, should be isolated from the complexity of the hardware architecture but yet be able to efficiently use the full potential of the hyperparallel nature of HSA.

  • 5.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Inam, Rafia
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Multi-core Composability in the Face of Memory Bus Contention2012Conference paper (Refereed)
    Abstract [en]

    In this paper we describe the problem of achieving composability of independently developed real-time subsystems to be executed on a multicore platform.We evaluate existing work for achieving real-time performance on multicores and illustrate their lack with respect to composability. To better address composability we present a multi-resource server-based scheduling technique to provide predictable performance when composing multiple subsystems on a multicore platform. To achieve composability also on multicore platforms, we propose to add memory-bandwidth as an additional server resource. Tasks within our multi-resource servers are guaranteed both CPU- and memory-bandwidth; thus the performance of a server will become independent of resource usage by tasks in other servers. We are currently implementing multi-resource servers for the Enea’s OSE operating system for a P4080 8-core processor to be tested with software for a 3G-basestation.

  • 6.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Overrun Methods for Semi-Independent Real-Time Hierarchical Scheduling2009Report (Other academic)
    Abstract [en]

    The Hierarchical Scheduling Framework (HSF) has been introduced as a design-time framework to enable compositional schedulability analysis of embedded software systems with real-time properties. In this paper a software system consists of a number of semi-independent components called subsystems. Subsystems are developed independently and later integrated to form a system. To support this design process, in the paper, the proposed methods allow non-intrusive configuration and tuning of subsystem timing-behaviour via subsystem interfaces for selecting scheduling parameters. This paper considers three methods to handle overruns due to resource sharing between subsystems in the HSF. For each one of these three overrun methods corresponding scheduling algorithms The work in this paper is supported by the Swedish Foundation for Strategic Research (SSF), via the research programme PROGRESS. and associated schedulability analysis are presented together with analysis that shows under what circumstances one or the other is preferred. The analysis is generalized to allow for both Fixed Priority Scheduling (FPS) and Earliest Deadline First (EDF) scheduling. Also, a further contribution of the paper is the technique of calculating resource-holding times within the framework under different scheduling algorithms. The resource holding times being an important parameter in the global schedulability analysis.

  • 7.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Shin, Insik
    Department of Computer Science, KAIST University , Korea.
    Overrun Methods and Resource Holding Times for Hierarchical Scheduling of Semi-Independent Real-Time Systems2010In: IEEE Transactions on Industrial Informatics, ISSN 1551-3203, Vol. 6, no 1, p. 93-104Article in journal (Refereed)
    Abstract [en]

    The Hierarchical Scheduling Framework (HSF) has been introduced as a design-time framework toenable compositional schedulability analysis of embedded software systems with real-time properties. Inthis paper a software system consists of a number of semi-independent components called subsystems.Subsystems are developed independently and later integrated to form a system. To support this designprocess, in the paper, the proposed methods allow non-intrusive configuration and tuning of subsystemtiming-behaviour via subsystem interfaces for selecting scheduling parameters.This paper considers three methods to handle overruns due to resource sharing between subsystemsin the HSF. For each one of these three overrun methods corresponding scheduling algorithms and associatedschedulability analysis are presented together with analysis that shows under what circumstances one or the other is preferred. The analysis is generalized to allow for both Fixed Priority Scheduling (FPS)and Earliest Deadline First (EDF) scheduling. Also, a further contribution of the paper is the techniqueof calculating resource-holding times within the framework under different scheduling algorithms; theresource holding times being an important parameter in the global schedulability analysis.

  • 8.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Shin, Insik
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    SIRAP: A Synchronization Protocol for Hierarchical Resource Sharing in Real-Time Open Systems2007In: EMSOFT'07: Proceedings of the Seventh ACM and IEEE International Conference on Embedded Software, 2007, p. 279-288Conference paper (Refereed)
    Abstract [en]

    This paper presents a protocol for resource sharing in a hierarchical real-time scheduling framework. Targeting real-time open systems, the protocol and the scheduling framework significantly reduce the efforts and errors associated with integrating multiple semi-independent subsystems on a single processor. Thus, our proposed techniques facilitate modern software development processes, where subsystems are developed by independent teams (or subcontractors) and at a later stage integrated into a single product. Using our solution, a subsystem need not know, and is not dependent on, the timing behaviour of other subsystems; even though they share mutually exclusive resources. In this paper we also prove the correctness of our approach and evaluate its efficiency.

  • 9.
    Behnam, Moris
    et al.
    Mälardalen University, Department of Computer Science and Electronics.
    Shin, Insik
    Mälardalen University, Department of Computer Science and Electronics.
    Nolte, Thomas
    Mälardalen University, Department of Computer Science and Electronics.
    Sjödin, Mikael
    Mälardalen University, Department of Computer Science and Electronics.
    Independent Abstraction and Dynamic Slack Reclaiming in Hierarchical Real-Time Open Systems2007In: Proceedings of the Work-In-Progress (WIP) session of the 19th Euromicro Conference on Real-Time Systems (ECRTS'07), Pisa, Italy, 2007, p. 1-4Conference paper (Refereed)
    Abstract [en]

    Independent subsystem abstraction allows subsystems to be developed and validated separately and supports an easier subsystem integration. In particular, this approach is desirable in open systems, since it does not require knowledge of temporal behaviour of other subsystems. However, independent

    abstraction, assuming the worst-case CPU supply pattern, requires extra CPU allocations. We present our work in progress on dynamic slack reclamation, which keeps track of such extra CPU allocations at run time. We are also investigating how to utilize those extra resources for supporting soft real-time tasks.

  • 10.
    Behnam, Moris
    et al.
    Mälardalen University, Department of Computer Science and Electronics.
    Shin, Insik
    Mälardalen University, Department of Computer Science and Electronics.
    Nolte, Thomas
    Mälardalen University, Department of Computer Science and Electronics.
    Sjödin, Mikael
    Mälardalen University, Department of Computer Science and Electronics.
    Real-Time Subsystem Integration in the Presence of Shared Resources2006In: Proceedings of the Work-In-Progress (WIP) session of the 27th IEEE Real-Time Systems Symposium (RTSS'06), Rio de Janeiro, Brazil: 27th IEEE International Real-Time Systems Symposium (RTSS 2006) Rio deJaneiro, Brazil, 5-8 December 2006, 2006Conference paper (Refereed)
    Abstract [en]

    We present our ongoing work to support the difficult, time consuming, and error-prone process of subsystem integration in the real-time domain. Our work will result in methods where independently developed subsystems, including both hard real-time and soft real-time functions, can be easily integrated without resulting unpredictable timing behaviour. The methods will also facilitate subsystem reuse, since a subsystem can easily be integrated in a new environment. Related research and methods are presented, together with our ongoing work in the area.

  • 11.
    Behnam, Moris
    et al.
    Mälardalen University, Department of Computer Science and Electronics.
    Shin, Insik
    Mälardalen University, Department of Computer Science and Electronics.
    Nolte, Thomas
    Mälardalen University, Department of Computer Science and Electronics.
    Sjödin, Mikael
    Mälardalen University, Department of Computer Science and Electronics.
    SIRAP: A Global Resource Sharing Protocol Facilitating Integration of Semi-independent Real-Time Systems2007Report (Other academic)
    Abstract [en]

    This paper presents a protocol for resource sharing in a hierarchical real-time scheduling framework. Together, the protocol and the scheduling framework significantly reduce the efforts and errors associated with integrating multiple semi-independent subsystems on a single processor. Thus, our proposed techniques facilitate modern software development processes, where subsystems are developed by independent teams (or subcontractors) and at a later stage integrated into a single product. Using our solution, a subsystem need not know, and is not dependent on, the timing behaviour of other subsystems; even though they share mutually exclusive resources. In this paper we also prove the correctness of our approach and evaluate its efficiency.

  • 12.
    Berisa, Aldin
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Ashjaei, Seyed Mohammad Hossein
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Daneshtalab, Masoud
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Investigating and Analyzing CAN-to-TSN Gateway Forwarding Techniques2023In: Proc. - IEEE Int. Symp. Real-Time Distrib. Comput., ISORC, Institute of Electrical and Electronics Engineers Inc. , 2023, p. 136-145Conference paper (Refereed)
    Abstract [en]

    Controller Area Network (CAN) and Ethernet network are expected to co-exist in automotive industry as Ethernet provides a high-bandwidth communication, while CAN is a legacy cost-effective solution. Due to the shortcomings of conventional switched Etherent, such as determinism, IEEE Time Sensitive Networking (TSN) task group developed a set of standards to enhance the switched Ethernet technology providing low-jitter and deterministic communication. Considering these two network domains, we investigate various design approaches for a gateway that connects a CAN domain to a TSN domain. We present three gateway forwarding techniques and we develop end-to-end delay analysis methods for them. Via the analysis methods and applying them to synthetic use cases we show that the intuitive existing approach of encapsulating multiple CAN frames into a single Ethernet frame is not necessarily an efficient solution. In fact, we demonstrate several cases where it is preferable to encapsulate only one CAN frame into a TSN frame, in particular when we use a high speed TSN network. The results have a significant impact on developing such gateways as the implementation of the one-to-one frame encapsulation is considerably simpler than other complex gateway-forwarding techniques.

  • 13.
    Berisa, Aldin
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Panjevic, A.
    Arcticus Systems, Järfälla, Sweden.
    Kovac, I.
    Arcticus Systems, Järfälla, Sweden.
    Lyngbäck, H.
    HIAB, Hudiksvall, Sweden.
    Ashjaei, Seyed Mohammad Hossein
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Daneshtalab, Masoud
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Comparative Evaluation of Various Generations of Controller Area Network Based on Timing Analysis2023In: IEEE Int. Conf. Emerging Technol. Factory Autom., ETFA, Institute of Electrical and Electronics Engineers Inc. , 2023Conference paper (Refereed)
    Abstract [en]

    This paper performs a comparative evaluation of various generations of Controller Area Network (CAN), including the classical CAN, CAN Flexible Data-Rate (FD), and CAN Extra Long (XL). We utilize response-time analysis for the evaluation. In this regard, we identify that the state of the art lacks the response-time analysis for CAN XL. Hence, we discuss the worst-case transmission times calculations for CAN XL frames and incorporate them to the existing analysis for CAN to support response-time analysis of CAN XL frames. Using the extended analysis, we perform a comparative evaluation of the three generations of CAN by analyzing an automotive industrial use case. In crux, we show that using CAN FD is more advantageous than the classical CAN and CAN XL when using frames with payloads of up to 8 bytes, despite the fact that CAN XL supports higher bit rates. For frames with 12-64 bytes payloads, CAN FD performs better than CAN XL when running at the same bit rate, but CAN XL performs better when running at a higher bit rate. Additionally, we discovered that CAN XL performs better than the classical CAN and CAN FD when the frame payload is over 64 bytes, even if it runs at the same or higher bit rates than CAN FD.

  • 14.
    Berisa, Aldin
    et al.
    Mälardalen University.
    Zhao, L.
    Beihang University, Beijing, China.
    Craciunas, S. S.
    TTTech Computertechnik Ag, Vienna, Austria.
    Ashjaei, Seyed Mohammad Hossein
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Daneshtalab, Masoud
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    AVB-aware Routing and Scheduling for Critical Traffic in Time-sensitive Networks with Preemption2022In: ACM International Conference Proceeding Series, Association for Computing Machinery , 2022, p. 207-218Conference paper (Refereed)
    Abstract [en]

    The Time-Sensitive Network (TSN) amendments and protocols add capabilities on top of standard 802.1 Ethernet for guaranteeing the timeliness of both (isochronous) scheduled traffic (ST) and shaped (audio-video) communication (AVB) in distributed applications. ST streams are guaranteed via an offline computed schedule controlling the time-aware gate mechanism of IEEE 802.1Qbv, while AVB real-time streams are shaped via a credit-based shaper (CBS) and scheduler with lower-priority than ST. Although the two traffic classes use different TSN mechanisms, they are interrelated as the ST traffic class schedule influences the latency of AVB traffic. In this paper, we propose a method for the integration of the ST schedule synthesis with an analysis for the AVB class featuring IEEE 802.1Qbu frame preemption under different configurations to reduce the interference between the two classes. We first present a new worst-case response-time (WCRT) analysis for the AVB traffic class in TSN networks with preemption, considering an arbitrary number of AVB queues and different configurations for the CBS credit behavior. Then, we integrate the creation of ST schedule tables with the schedulability analysis of AVB traffic using a heuristic algorithm featuring frame preemption and a novel routing mechanism aimed at maximizing AVB schedulability. Finally, we evaluate our approach using both real-world and synthetic use cases showing the efficiency both in terms of schedule creation runtime and in terms of increasing the schedulability of lower-priority AVB traffic.

  • 15.
    Bohlin, Markus
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Hänninen, Kaj
    Mälardalen University, School of Innovation, Design and Engineering.
    Mäki-Turja, Jukka
    Mälardalen University, School of Innovation, Design and Engineering.
    Carlson, Jan
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Safe Shared Stack Bounds in Systems with Offsets and Precedences2008Report (Other academic)
    Abstract [en]

    The paper presents two novel methods to bound the stack memory used in preemptive, shared stack, real-time systems. The first method is based on branch-and-bound search for possible preemption patterns, and the second one approximates the first in polynomial time. The work extends previous methods by considering a more general taskmodel, in which all tasks can share the same stack. In addition, the new methods account for precedence and offset relations. Thus, the methods give tight bounds for a large set of realistic systems. The methods have been implemented and a comprehensive evaluation, comparing our new methods against each other and against existing methods, is presented. The evaluation shows that our exact method can significantly reduce the amount of stack memory needed. In our simulations, a decrease in the order of 40% was typical, with a runtime in the order of seconds. Our polynomial approximation consequently yields about 20% higher bound than the exact method. 

  • 16.
    Bohlin, Markus
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Hänninen, Kaj
    Mälardalen University, School of Innovation, Design and Engineering.
    Mäki-Turja, Jukka
    Mälardalen University, School of Innovation, Design and Engineering.
    Carlson, Jan
    Mälardalen University, School of Innovation, Design and Engineering.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Bounding Shared-Stack Usage in Systems with Offsets and Precedences2008In: ECRTS 2008: PROCEEDINGS OF THE 20TH EUROMICRO CONFERENCE ON REAL-TIME SYSTEMS, 2008, p. 276-285Conference paper (Refereed)
    Abstract [en]

    The paper presents two novel methods to bound the stack memory used in preemptive, shared stack, real-time systems. The first method is based on branch-and-bound search for possible preemption patterns, and the second one approximates the first in polynomial time. The work extends previous methods by considering a more general task-model, in which all tasks can share the same stack. In addition, the new methods account for precedence and offset relations. Thus, the methods give tight bounds for a large set of realistic systems. The methods have been implemented and a comprehensive evaluation, comparing our new methods against each other and against existing methods, is presented. The evaluation shows that our exact method can significantly reduce the amount of stack memory needed.

  • 17.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Arcticus Systems AB, Järfälla, Sweden.
    Addazi, Lorenzo
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ciccozzi, Federico
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Eramo, Romina
    University of L’Aquila, L’Aquila, Italy..
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Arcticus Systems AB, Järfälla, Sweden.
    Nolin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    MoVES: a Model-driven methodology for Vehicular Embedded Systems2018In: IEEE Access, E-ISSN 2169-3536, p. 6424-6445Article in journal (Refereed)
    Abstract [en]

    This paper introduces a novel model-driven methodology for the software development of real-time distributed vehicular embedded systems on single- and multi-core platforms. The proposed methodology discloses the opportunity of improving the cost-efficiency of the development process by providing automated support to identify viable design solutions with respect to selected non-functional requirements. To this end, it leverages the interplay of modelling languages for the vehicular domain whose integration is achieved by a suite of model transformations. An instantiation of the methodology is discussed for timing requirements, which are among the most critical ones for vehicular systems. To support the design of temporally correct systems, a cooperation between EAST-ADL and the Rubus Component Model is opportunely built-up by means of model transformations, enabling timing-aware design and model-based timing analysis of the system. The applicability of the methodology is demonstrated as proof of concepts on industrial use cases performed in cooperation with our industrial partners.

  • 18.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Arcticus Systems AB, Järfälla, Sweden.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ciccozzi, Federico
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Eramo, Romina
    University of L'Aquila, Italy.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Anticipating Implementation-Level Timing Analysis for Driving Design-Level Decisions in EAST-ADL2015In: CEUR Workshop Proceedings, Vol. 1487, 2015, p. 63-72Conference paper (Refereed)
    Abstract [en]

    The adoption of model-driven engineering in the automotive domain resulted in the standardization of a layered architectural description language, namely EAST-ADL, which provides means for enforcing abstraction and separation of concerns, but no support for automation among its abstraction levels. This support is particularly helpful when manual transitions among levels are tedious and error-prone. This is the case of design and implementation levels. Certain fundamental analyses (e.g., timing), which have a significant impact on design decisions, give precise results only if performed on implementation level models, which are currently created manually by the developer. Dealing with complex systems, this task becomes soon overwhelming leading to the creation of a subset of models based on the developers experience; relevant implementation level models may therefore be missed. In this work, we describe means for automation between EAST-ADL design and implementation levels to anticipate end-to-end delay analysis at design level for driving design decisions.

  • 19.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ciccozzi, Federico
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Kodali, M.
    Westermo, Västerås, Sweden.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Alignment of Requirements and Testing in Agile: An Industrial Experience2018In: Advances in Intelligent Systems and Computing, ISSN 2194-5357, E-ISSN 2194-5365, Vol. 738, p. 225-232Article in journal (Refereed)
    Abstract [en]

    Agile development aims at switching the focus from processes to interactions between stakeholders, from heavy to minimalistic documentation, from contract negotiation and detailed plans to customer collaboration and prompt reaction to changes. With these premises, requirements traceability may appear to be an overly exigent activity, with little or no return-of-investment. However, since testing remains crucial even when going agile, the developers need to identify at a glance what to test and how to test it. That is why, even though requirements traceability has historically faced a firm resistance from the agile community, it can provide several benefits when promoting precise alignment of requirements with testing. This paper reports on our experience in promoting traceability of requirements and testing in the data communications for mission-critical systems in an industrial Scrum project. We define a semi-automated requirements tracing mechanism which coordinates four traceability techniques. We evaluate the solution by applying it to an industrial project aiming at enhancing the existing Virtual Router Redundancy Protocol by adding Simple Network Management Protocol support. 

  • 20.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ciccozzi, Federico
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Pierantonio, Alfonso
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Towards Design-Space Exploration of Component Chains in Vehicle Software2016In: 42nd Euromicro Conference series on Software Engineering and Advanced Applications, Work In Progress (WiP) SEAA 2016 WiP, 2016Conference paper (Refereed)
    Abstract [en]

    The size, complexity and heterogeneity of vehicular software systems has been constantly increasing. As a result, there is a growing consensus on the need to leverage modelbased techniques for automating, thus taming, error-proneness of tedious engineering tasks. Our methodology employs a one-tomany model transformation for generating a set of implementation models from a single design model. Then, it evaluates the appropriateness of each generated model by means of modelbased timing analysis. In this ongoing work, we discuss an enhancement of our methodology where model-based timing analysis is extended for running on a single model with uncertainty.

  • 21.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Arcticus Syst, Järfälla, Sweden.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ciccozzi, Federico
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Pierantonio, Alfonso
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Univ Aquila, DISIM, Laquila, Italy.
    Handling Uncertainty in Automatically Generated Implementation Models in the Automotive Domain2016In: 42nd Euromicro Conference series on Software Engineering and Advanced Applications SEAA 2016, 2016, p. 173-180Conference paper (Refereed)
    Abstract [en]

    Models and model transformations, the two core constituents of Model-Driven Engineering, aid in software development by automating, thus taming, error-proneness of tedious engineering activities. In most cases, the result of these automated activities is an overwhelming amount of information. This is the case of one-to-many model transformations that, e.g. in designspace exploration, can potentially generate a massive amount of candidate models (i.e., solution space) from one single model. In our scenario, from one design model we generate a set of possible implementation models on which timing analysis is run. The aim is to find the best model from a timing perspective. However, multiple implementation models can have equally good analysis results. Therefore, the engineer is expected to investigate the solution space for making a final decision, using criteria which fall outside the analysis’ criteria themselves. Since candidate models can be many and very similar to each other, manually finding differences and commonalities is an impractical and errorprone task. In order to provide the engineer with an expressive representation of models’ commonalities and differences, we propose the use of modelling with uncertainty. We achieve this by elevating the solution space to a first-class status, adopting a compact notation capable of representing the solution space by means of a single model with uncertainty. Commonalities and differences are thus represented by means of uncertainty points for the engineer to easily grasp them and consistently make her decision without manually inspecting each model individually.

  • 22.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Towards a metamodel for the Rubus Component Model2014In: CEUR Workshop Proceedings, vol 1281, 2014, p. 46-56Conference paper (Refereed)
    Abstract [en]

    Component-Based Software Engineering has been recognized as an effective practice for dealing with the increasing complexity of the software for vehicular embedded systems. Despite the advantages it has introduced in terms of reasoning, design and reusability, the software development for vehicular embedded systems is still hampered by constel- lations of different processes, file formats and tools, which often require manual ad hoc translations. By exploiting the crossplay of Component- Based Software Engineering and Model-Driven Engineering, we take ini- tial steps towards the definition of a seamless chain for the structural, functional and execution modeling of software for vehicular embedded systems. To this end, one of the entry requirements is the metamodels definition of all the technologies used along the software development. In this work, we define a metamodel for an industrial component model, Rubus Component Model, used for the software development of vehicular real-time embedded systems by several international companies. We focus on the definition of metamodeling elements representing the software architecture.

  • 23.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ciccozzi, Federico
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Di Salle, Amleto
    European University of Rome, Rome, Italy.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    From low-level programming to full-fledged industrial model-based development: the story of the Rubus Component Model2023In: Software and Systems Modeling, ISSN 1619-1366, E-ISSN 1619-1374Article in journal (Refereed)
    Abstract [en]

    Developing distributed real-time systems is a complex task that has historically entailed specialized handcraft. In this paper, we propose a retrospective on the (r)evolutionary changes that led to the transition from low-level programming to industrial full-fledged model-based development embodied by the Rubus Component Model and its tool-ecosystem. We focus on the needs, challenges, and solutions of a 15-year-long evolution journey of a software development approach that has gone from low-level and manual programming to a highly automated environment offering modeling, analysis, and development of vehicular software systems with multi-criticality for deployment on single- and multi-core platforms. 

  • 24.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lundbäck, John
    Arcticus Systems AB, Sweden.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mubeen, Saad
    On Model-based Development of Embedded Software for Evolving Automotive E/E Architectures2020In: Advances in Intelligent Systems and Computing, Volume 1134, Las Vegas, United States, 2020, Vol. 1134, p. 693-699Conference paper (Refereed)
    Abstract [en]

    Fueled by an increasing demand for computational power and high data-rate low-latency on-board communication, the automotive electrical and electronic architectures are evolving from distributed to consolidated domain and centralised architectures. Future electrical and electronic automotive architectures are envisioned to leverage heterogeneous computing platforms, where several different processing units will be embedded within electronic control units. These powerful control units are expected to be connected by high-bandwidth and low-latency on-board backbone networks. This paper draws on the industrial collaboration with the Swedish automotive industry for tackling the challenges associated to the model-based development of predictable embedded software for contemporary and evolving automotive E/E architectures.

  • 25.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Arcticus Systems AB, Jarfalla, Sweden.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Arcticus Systems AB, Jarfalla, Sweden.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Exploring Timing Model Extractions at EAST-ADL Design-level Using Model Transformations2015In: Proceedings - 12th International Conference on Information Technology: New Generations, ITNG 2015, 2015, Vol. Article number 7113538, p. 596-600Conference paper (Refereed)
    Abstract [en]

    We discuss the problem of extracting control and data flows from vehicular distributed embedded systems at higher abstraction levels during their development. Unambiguous extraction of control and data flows is vital part of the end-to-end timing model which is used as input by the end-to end timinganalysis engines. The goal is to support end-to-end timing analysis at higher abstraction levels. In order to address the problem, we propose a two-phase methodology that exploits the principles of ModelDriven Engineering and Component Based Software Engineering. Using this methodology, the software architecture at a higher level is automatically transformed to all legal implementation-level models. The end-to-end timing analysis is performed on each generated implementation-level model and the analysis results are fed back to the design-level model. This activity supports design space exploration, modelrefinement and/or remodeling at higher abstraction levels for tuning the timing behavior of the system.

  • 26.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Arcticus Systems AB.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ciccozzi, Federico
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A Metamodel for the Rubus Component Model: Extensions for Timing and Model Transformation from EAST-ADL2017In: IEEE Access, E-ISSN 2169-3536, ISSN 2169-3536, p. 9005-9020Article in journal (Refereed)
    Abstract [en]

    According to the Model-Driven Engineering paradigm, one of the entry requirements when realising a seamless tool chain for the development of software is the definition of metamodels, to regulate the specification of models, and model transformations, for automating manipulations of models. In this context, we present a metamodel definition for the Rubus Component Model, an industrial solution used for the development of vehicular embedded systems. The metamodel includes the definition of structural elements as well as elements for describing timing information. In order to show how, using Model-Driven Engineering, the integration between different modelling levels can be automated, we present a model-to-model transformation between models conforming to EAST-ADL and models described by means of the Rubus Component Model. To validate our solution, we exploit a set of industrial automotive applications to show the applicability of both the Rubus Component Model metamodel and the model transformation.

  • 27.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Arcticus Systems AB, Järfälla, Sweden.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ciccozzi, Federico
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Comparative Evaluation of Timing Model Extraction Methodologies at EAST-ADL Design Level2015In: Proceedings - 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security and 2015 IEEE 12th International Conference on Embedded Software and Systems, HPCC-CSS-ICESS 2015, 2015, p. 1110-1115Conference paper (Refereed)
    Abstract [en]

    There are various methodologies that support the extraction of timing models from EAST-ADL design-level models during the development of vehicular embedded software systems. These timing models are used to predict timing behavior of the systems by performing end-to-end timing analysis. This paper presents, for the first time, a comparative evaluation of three methodologies. We present an evaluation framework that consists of several evaluation features. Using the framework, we compare and evaluate the methodologies against each feature. Eventually, the evaluation results can be used as guidelines for the selection of the most suitable methodology with respect to the end-to-end timing behavior of a given vehicular embedded application.

  • 28.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Arcticus Syst AB, Jarfalla, Sweden..
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Arcticus Syst AB, Jarfalla, Sweden..
    Ciccozzi, Federico
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Malardalen Univ, Sch Innovat Design & Engn, Vasteras, Sweden..
    Modelling multi-criticality vehicular software systems: evolution of an industrial component model2020In: Software and Systems Modeling, ISSN 1619-1366, E-ISSN 1619-1374, Vol. 19, no 5, p. 1283-1302Article in journal (Refereed)
    Abstract [en]

    Software in modern vehicles consists of multi-criticality functions, where a function can be safety-critical with stringent real-time requirements, less critical from the vehicle operation perspective, but still with real-time requirements, or not critical at all. Next-generation autonomous vehicles will require higher computational power to run multi-criticality functions and such a power can only be provided by parallel computing platforms such as multi-core architectures. However, current model-based software development solutions and related modelling languages have not been designed to effectively deal with challenges specific of multi-core, such as core-interdependency and controlled allocation of software to hardware. In this paper, we report on the evolution of the Rubus Component Model for the modelling, analysis, and development of vehicular software systems with multi-criticality for deployment on multi-core platforms. Our goal is to provide a lightweight and technology-preserving transition from model-based software development for single-core to multi-core. This is achieved by evolving the Rubus Component Model to capture explicit concepts for multi-core and parallel hardware and for expressing variable criticality of software functions. The paper illustrates these contributions through an industrial application in the vehicular domain.

  • 29.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Arcticus Systems AB, Järfälla, Sweden.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Arcticus Systems AB, Järfälla, Sweden.
    Ciccozzi, Federico
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Technology-preserving transition from single-core to multi-core in modelling vehicular systems2017In: Lecture Notes in Computer Science, vol. 10376, Springer Verlag , 2017, p. 285-299Chapter in book (Refereed)
    Abstract [en]

    The vehicular industry has exploited model-based engineering for design, analysis, and development of single-core vehicular systems. Next generation of autonomous vehicles will require higher computational power, which can only be provided by parallel computing platforms such as multi-core electronic control units. Current model-based software development solutions and related modelling languages, originally conceived for single-core, cannot effectively deal with multi-core specific challenges, such as core-interdependency and allocation of software to hardware. In this paper, we propose an extension to the Rubus Component Model, central to the Rubus model-based approach, for the modelling, analysis, and development of vehicular systems on multi-core. Our goal is to provide a lightweight transition of a model-based software development approach from single-core to multi-core, without disrupting the current technological assets in the vehicular domain.

  • 30.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lundbäck, John
    Arcticus Systems AB, Sweden.
    Lundbäck, Kurt-Lennart
    Arcticus Systems AB, Sweden.
    Mäki-Turja, Jukka
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Demonstrator for modeling and development of component-based distributed real-time systems with Rubus-ICE2013In: Open Demo Session of Real-Time Systems: Open Demo Session of Real-Time Systems located at Real Time Systems Symposium (RTSS), 2013Conference paper (Refereed)
    Abstract [en]

    We present a demonstrator for modeling and development of component-based vehicular distributed real-time systems using the industrial model Rubus Component Model (RCM) and its development environment Rubus-ICE (Integrated Component development Environment). It demonstrates various stages during the development process of these systems such as modeling of software architecture, performing timing analysis, automatic synthesis of code from the software architecture, simulation, testing, and deployment.

  • 31.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lundbäck, John
    Arcticus Systems AB, Sweden.
    Lundbäck, Kurt-Lennart
    Arcticus Systems AB, Sweden.
    Mäki-Turja, Jukka
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    From Modeling to Deployment of Component-Based Vehicular Distributed Real-Time Systems2014In: Proceedings, International Conference on Information Technology: ITNG 2014, IEEE , 2014, p. 649-654Conference paper (Refereed)
    Abstract [en]

    We present complete model-and component based approach for the development of vehiculardistributed real-time systems. Within this context, we model and timing analyze these systems using one of the state-of-the-practice modeling and timing analysis techniques that is implemented in the existing industrial model the Rubus Component Model and accompanying tool suite. As a proof of concept, we conduct a case study by developing an intelligent parking assist system which is adistributed real-time application from the vehicular domain. The case study shows various stages during the development such as modeling of software architecture, performing timing analysis, simulation, testing, automatic synthesis of code from the software architecture, deployment, and execution.

  • 32.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lundbäck, John
    Arcticus Systems AB, Sweden.
    Gålnander, Mattias
    Arcticus Systems AB, Sweden.
    Lundbäck, Kurt-Lennart
    Arcticus Systems AB, Sweden.
    Demonstrating Model- and Component-based Development of Vehicular Real-time Systems2017In: Open Demo Session of Real-Time Systems located at Real Time Systems Symposium (RTSS) RTSS@Work'17, 2017Conference paper (Refereed)
  • 33.
    Carlson, Jan
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Feljan, Juraj
    Mälardalen University, School of Innovation, Design and Engineering.
    Mäki-Turja, Jukka
    Mälardalen University, School of Innovation, Design and Engineering.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Deployment Modelling and Synthesis in a Component Model for Distributed Embedded Systems2010In: Proceedings - 36th EUROMICRO Conference on Software Engineering and Advanced Applications, SEAA 2010, Lille, France, 2010, p. 74-82Conference paper (Refereed)
    Abstract [en]

    We present an approach to combine model-driven and component-based software engineering of distributed embedded systems. Specifically, we describe how deployment modelling is performed in two steps, and present an incremental synthesis of runnable representations of model entities on various abstraction levels. Our approach allows for flexible reuse opportunities, in that entities at different levels of granularity and abstraction can be reused. It also permits detailed analysis, e.g., with respect to timing, of units smaller than a whole physical node. We present a concept, virtual nodes, which preserves real-time properties across reuse and integration in different contexts.

  • 34.
    Carlson, Jan
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Mäki-Turja, Jukka
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Event-Pattern Triggered Real-Time Tasks2008Conference paper (Refereed)
    Abstract [en]

    We present the concept of pattern-triggered tasks which are released when a particular pattern of events occur. A formal event algebra is used to define complex triggering conditions for these tasks, and the detection of triggering conditions is performed within the system by code generated automatically from these definitions. The implementation of the algebra has many desirable features for resource constrained real-time systems, including bounded and low execution time and memory consumption. Furthermore, we present novel schedulability analysis for our pattern-triggered tasks that leverage on existing analysis for fixed-priority and dynamic-priority scheduling policies.

  • 35.
    Chetto, Maryline
    et al.
    Univ Nantes, Nantes, France..
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Guest editorial: special issue on the Real-Time and Network Systems (RTNS 2009) conference2010In: Real-time systems, ISSN 0922-6443, E-ISSN 1573-1383, Vol. 46, no 3, p. 303-304Article in journal (Other academic)
  • 36.
    Ciccozzi, Federico
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering.
    Krekola, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Generation of Correct-by-Construction Code from Design Models for Embedded Systems2011In: 6th IEEE International Symposium on Industrial Embedded Systems (SIES'11), IEEE , 2011, p. 63-66Conference paper (Refereed)
    Abstract [en]

    In a model-driven engineering development process that focuses on guaranteeing that extra-functional concerns modeled at design level are preserved at platform execution level, the task of automated code generation must produce artifacts that enable back-annotation activities. In fact when the target platform code has been generated, quality attributes of the system are evaluated by appropriate code execution monitoring/analysis tools and their results back-annotated to the source models to be extensively evaluated. Only at this point the preservation of analysed extra-functional aspects can be either asserted or achieved by re-applying the code generation chain to the source models properly optimized according to the evaluation results. In this work we provide a solution for the problem of automatically generating target platform code from source models focusing on producing code artifacts that facilitate analysis and enable back-annotation activities. Arisen challenges and solutions are described together with completed and planned implementation of the proposed approach.

  • 37.
    Ciccozzi, Federico
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Exploiting UML Semantic Variation Points to Generate Explicit Component Interconnections in Complex Systems2013In: ITNG '13 Proceedings of the 2013 10th International Conference on Information Technology: New Generations, 2013, p. 225-232Conference paper (Refereed)
    Abstract [en]

    Modern modelling languages provide dedicated features to support the detailed design of complex systems from different domains. Nevertheless, especially general-purpose languages provide extensive syntactical expressiveness that, in some cases, may be hard to align with well-defined semantics. This is often inevitable due to the fact that, in order for model-driven approaches to be fruitful, modelling activities should require a lower effort than code-based approaches. In the case of UML and component-based design, precise syntactical definition of the number of component and port instances building up the system is provided. How component instances are explicitly connected to each other via ports is left as a semantic variation point in order for the modeller to freely interpret the related metamodel semantics. On the one hand, in order to allow model analysability, simulation and generation of target code, ad-hoc choices regarding this semantics need to be taken. On the other hand, leaving the burden of this task to the developers is often unthinkable for complex industrial systems (composed by a number of components and connections in the magnitude of 10^4 and above). Therefore we propose a set of semantic rules for the establishment of explicit links between component instances and provide a solution for the automatic generation of these links by applying the defined rules.

  • 38.
    Ciccozzi, Federico
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Full Code Generation from UML Models for Complex Embedded Systems2012In: Second International Software Technology Exchange Workshop (STEW) 2012, 2012Conference paper (Refereed)
    Abstract [en]

    The complexity of modern software systems is ever increasing thus demanding new powerful development mechanisms. In the research work summarised in this paper we aim at providing a model-driven engineering approach centred on the generation of 100% of the implementation from source models defined using a UML profile enriched with Action Language for Foundational UML. The focus is on the development of industrial embedded systems. The final aim is to increase productivity by automating development tasks through the exploitation of model-driven and component-based techniques as well as to tackle the error-proneness typical of code-based approaches.

  • 39.
    Ciccozzi, Federico
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    On the Generation of Full-fledged Code from UML Profiles and ALF for Complex Systems2015In: Proceedings - 12th International Conference on Information Technology: New Generations, ITNG 2015, 2015, p. 81-88Conference paper (Refereed)
    Abstract [en]

    Modern software systems are becoming more and more complex thus demanding for new powerful development mechanisms. Model-driven engineering has been recognised as a promising paradigm for the development of complex systems especially for its capability of abstracting the problem through models and then manipulating them to reach the implementation. In this work we provide a solution for the problem of automatically generating target code from models expressed in CHESS-ML, a UML profile that leverages the Action Language for Foundational UML. The goal is to produce code that does not require any manual intervention after its automatic generation to be executed on the target platform. Focus is on the generation of complex systems targeting both single and multi process deployment configurations as well as different execution platforms.

  • 40.
    Ciccozzi, Federico
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Round-Trip Support for Extra-functional Property Management in Model-Driven Engineering of Embedded Systems2013In: Information and Software Technology, ISSN 0950-5849, E-ISSN 1873-6025, Vol. 55, no 6, p. 1085-1100Article in journal (Refereed)
    Abstract [en]

    Context: In order for model-driven engineering to succeed, automated code generation from models through model transformations has to guarantee that extra-functional properties modelled at design level are preserved at code level. Objective: The goal of this research work is to provide a full round-trip engineering approach in order to evaluate quality attributes of the embedded system by code execution monitoring as well as code static analysis and then provide back-propagation of the resulting values to modelling level. In this way, properties that can only be roughly estimated statically are evaluated against observed values and this consequently allows to refine the design models for ensuring preservation of analysed extra-functional properties at code level. Method: Following the model-driven engineering vision, (meta-)models and transformations are used as main artefacts for the realisation of the round-trip support which is finally validated against an industrial case-study. Result: This article presents an approach to support the whole round-trip process starting from the generation of source code for a target platform, passing through the monitoring of selected system quality attributes at code level, and finishing with the back-propagation of observed values to modelling level. The technique is validated against an industrial case-study in the telecommunications applicative domain. Conclusion: Preservation of extra-functional properties through appropriate description, computation and evaluation allows to reduce final product verification and validation effort and costs by providing correctness-by-construction of the generated code. The proposed round-trip support aids a model-driven component-based development process in ensuring a desired level of extra-functional properties preservation from the source modelling artefacts to the generated code.

  • 41.
    Ciccozzi, Federico
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Towards a Round-Trip Support for Model-Driven Development of Embedded Systems: Towards a round-trip support for model-driven engineering of embedded systems2011In: Proceedings - 37th EUROMICRO Conference on Software Engineering and Advanced Applications, SEAA 2011, Los Alamitos: IEEE Computer Society, 2011, p. 200-208Conference paper (Refereed)
    Abstract [en]

    In a model-driven environment aiming at generating implementation code ensuring that extra-functional properties modeled at design level are preserved at execution time, a full round-trip engineering approach is often needed. Target code is meant to be generated from design models through appropriate model transformations, once the code has been generated, quality attributes of the embedded system are evaluated by execution monitoring/analysis tools. Eventually, in order to complete a model-driven round-trip approach, provision of back-annotation of the target code analysis results to modeling level is crucial for evaluating and consequently optimizing the design models for ensuring preservation of analyzed extra-functional aspects. In this work the problem of providing such approach in terms of process and related challenges is described together with a proposed solution. Particular emphasis is put on the description of how both traceability information and code analysis results are formalized in order to enable the desired back-annotating capabilities.

  • 42.
    Ciccozzi, Federico
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Towards Translational Execution of Action Language for Foundational UML2013In: 39th Euromicro Conference Series on Software Engineering and Advanced Applications SEAA 2013, Santander, Spain, 2013, p. 153-160Conference paper (Refereed)
    Abstract [en]

    Model-driven engineering has prominently gained consideration as effective substitute of error-prone code-centric development approaches especially for its capability of abstracting the problem through models and then manipulating them to automatically generate target code. Nowadays, thanks to powerful modelling languages, a system can be designed by means of well-specified models that capture both structural as well as behavioural aspects. From them, target implementation is meant to be automatically generated. An example of well-established general purpose modelling language is the UML, recently enhanced with the introduction of an action language denominated ALF, both proposed by the OMG. In this work we focus on enabling the execution of models defined in UML--ALF and more specifically on the translational execution of ALF towards non-UML target platforms.

  • 43.
    Ciccozzi, Federico
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Saadatmand, Mehrdad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    An automated round-trip support towards deployment assessment in component-based embedded systems2013In: CBSE 2013 - Proceedings of the 16th ACM SIGSOFT Symposium on Component Based Software Engineering, 2013, 2013, p. 179-188Conference paper (Refereed)
    Abstract [en]

    Synergies between model-driven and component-based software engineering have been indicated as promising to mitigate complexity in development of embedded systems. In this work we evaluate the usefulness of a model-driven round-trip approach to aid deployment optimization in the development of embedded component-based systems. The round-trip approach is composed of the following steps: modelling the system, generation of full code from the models, execution and monitoring the code execution, and finally back-propagation of monitored values to the models. We illustrate the usefulness of the round-trip approach exploiting an industrial case-study from the telecom-domain. We use a code-generator that can realise different deployment strategies, as well as special monitoring code injected into the generated code, and monitoring primitives defined at operating system level. Given this infrastructure we can evaluate extra-functional properties of the system and thus compare different deployment strategies. 

  • 44.
    Ciccozzi, Federico
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Enhancing the Generation of Correct-by-construction Code from Design Models for Complex Embedded Systems2012In: IEEE Symposium on Emerging Technologies and Factory Automation, ETFA, 2012, p. art.nr: 6489716-Conference paper (Other academic)
    Abstract [en]

    Modern embedded systems are becoming more and more complex thus demanding for new powerful development mechanisms. Model-driven engineering has been recognised as a promising paradigm for the development of complex systems especially for its capability of abstracting the problem through models and then manipulating them to automatically generate target code. In our previous works, we presented mechanisms for the generation of 100% of the target code from UML models to be run on singlecore platforms. In this work we provide possible solutions to enhance the generation process to entail a more complex set of platform configurations (i.e., multiprocess, multicore) as well as heterogeneous processing units (i.e., CPU, GPU).

  • 45.
    Danielsson, Jakob
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ashjaei, Seyed Mohammad Hossein
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sörensen, Thomas
    Westermo Teleindustri AB, Västerås, Sweden.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Performance Evaluation of Network Convergence Time Measurement Techniques2017In: International Conference on Emerging Technologies And Factory Automation ETFA'17, 2017, p. 1-7Conference paper (Refereed)
    Abstract [en]

    In this paper we evaluate solutions that provide measurements for the network convergence time in switched Ethernet networks when links failures happen. We evaluate three solutions to measure the network convergence time in a faulty situation. Compared to the commercially available solutions, our proposals are cost-effective, portable, and open source. Thus, they are easy to deploy on many testbeds. We show the performance of the solutions by measuring different metrics including jitter, network convergence time and packet loss during the network recovery time. Our measurements indicate that it is possible to accurately measure the network convergence time using a packet sender which does not suffer interference from the overlying operating system. Furthermore, we noticed that the packet sniffer TShark did not suffer from kernel interrupts from overlying operating systems.

  • 46.
    Danielsson, Jakob
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Mälardalen University.
    Janne, Suuronen
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Marcus, Jägemar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Seceleanu, Tiberiu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Modelling Application Cache Behavior using Regression Models2021In: / [ed] IEEE, Västerås, 2021Conference paper (Refereed)
    Abstract [en]

    In this paper, we describe the creation of resource usage forecasts for applications with unknown execution characteristics, by evaluating different regression processes, including autoregressive, multivariate adaptive regression splines, exponential smoothing, etc. We utilize Performance Monitor Units (PMU) and generate hardware resource usage models for the L-2-cache and the L-3-cache using nine different regression processes. The measurement strategy and regression process methodology are general and applicable to any given hardware resource when performance counters are available. We use three benchmark applications: the SIFT feature detection algorithm, a standard matrix multiplication, and a version of Bubblesort. Our evaluation shows that Multi Adaptive Regressive Spline (MARS) models generate the best resource usage forecasts among the considered models, followed by Single Exponential Splines (SES) and Triple Exponential Splines (TES).

  • 47.
    Danielsson, Jakob
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Jägemar, M.
    Ericsson AB, Stockholm, Sweden.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Investigating execution-characteristics of feature-detection algorithms2017In: IEEE Conference on Emerging Technologies and Factory Automation, ISSN 1946-0740, E-ISSN 1946-0759, Vol. Part F134116, p. 1-4Article in journal (Refereed)
    Abstract [en]

    We discuss how to obtain information of execution characteristics, such as parallelizability and memory utilization, with the final aim to improve the performance and predictability of feature and corner detection algorithms for use in e.g. robotics and autonomous machines. Our aim is to obtain a better understanding of how computer vision algorithms use hardware resources and how to improve the time predictability and execution time of such algorithms when executing on multi-core CPUs. We evaluate a fork-join model applicable to feature detection algorithms and present a method for measuring how well the algorithm performance correlates with hardware resource usage. We have applied our method to the Featured from Accelerated Segment Test (FAST) algorithm. Our characterization of FAST reveals that it is an algorithm with excellent parallelism opportunities, resulting in an almost linear speed-up per core. Our measurements also reveal that the performance of FAST correlates very little with the number number of misses in the L1 data cache, L1 instruction cache, data translation lookaside buffer and L2 cache. Thus, the FAST algorithm will not have a negative effect on the execution time when the input data fits in the L2 cache. 

  • 48.
    Danielsson, Jakob
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Marcus, Jägemar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Ericsson AB, Stockholm, Sweden.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Seceleanu, Tiberiu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Measurement-based evaluation of data-parallelism for OpenCV feature-detection algorithms2018In: Staying Smarter in a Smartening World COMPSAC'18, 2018, p. 701-710Conference paper (Refereed)
    Abstract [en]

    We investigate the effects on the execution time, shared cache usage and speed-up gains when using data-partitioned parallelism for the feature detection algorithms available in the OpenCV library. We use a data set of three different images which are scaled to six different sizes to exercise the different cache memories of our test architectures. Our measurements reveal that the algorithms using the default settings of OpenCV behave very differently when using data-partitioned parallelism. Our investigation shows that the executions of the algorithms SURF, Dense and MSER correlate to L3-cache usage and they are therefore not suitable for data-partitioned parallelism on multi-core CPUs. Other algorithms: BRISK, FAST, ORB, HARRIS, GFTT, SimpleBlob and SIFT, do not correlate to L3-cache in the same extent, and they are therefore more suitable for data-partitioned parallelism. Furthermore, the SIFT algorithm provides the most stable speed-up, resulting in an execution between 3 and 3.5 times faster than the original execution time for all image sizes. We also have evaluated the hardware resource usage by measuring the algorithm execution time simultaneously with the L3-cache usage. We have used our measurements to conclude which algorithms are suitable for parallelization on hardware with shared resources.

  • 49.
    Danielsson, Jakob
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Marcus, Jägemar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Seceleanu, Tiberiu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Run-time Cache-Partition Controller for Multi-core Systems2019Conference paper (Refereed)
  • 50.
    Danielsson, Jakob
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Seceleanu, Tiberiu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Marcus, Jägemar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Ericsson AB, Stockholm, Sweden.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Ericsson Ab, Stockholm, Sweden.
    Nolin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Resource Depedency Analysis in Multi-Core Systems2020In: Proceedings - 2020 IEEE 44th Annual Computers, Software, and Applications Conference, COMPSAC 2020, Institute of Electrical and Electronics Engineers Inc. , 2020, p. 87-94, article id 9202484Conference paper (Refereed)
    Abstract [en]

    In this paper, we evaluate different methods for statistical determination of application resource dependency in multi-core systems. We measure the performance counters of an application during run-time and create a system resource usage profile. We then use the resource profile to evaluate the application dependency on the specific resource. We discuss and evaluate two methods to process the data, including moving average filter and partitioning the data into smaller segments in order to interpret data for correlation calculations. Our aim with this study is to evaluate and create a generalizeable methods for automatic determination of resource dependencies. The final outcome of the methods used in this study is the answer to the question: 'To what resources is this application dependent on?'. The recommendation of this tool will be used in conjunction with our last-level cache partitioning controller (LLC-PC), to make decision if an application should receive last-level cache partition slices.

12345 1 - 50 of 235
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