mdh.sePublications
Change search
Refine search result
1 - 17 of 17
CiteExportLink to result list
Permanent link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Rows per page
  • 5
  • 10
  • 20
  • 50
  • 100
  • 250
Sort
  • Standard (Relevance)
  • Author A-Ö
  • Author Ö-A
  • Title A-Ö
  • Title Ö-A
  • Publication type A-Ö
  • Publication type Ö-A
  • Issued (Oldest first)
  • Issued (Newest first)
  • Created (Oldest first)
  • Created (Newest first)
  • Last updated (Oldest first)
  • Last updated (Newest first)
  • Disputation date (earliest first)
  • Disputation date (latest first)
  • Standard (Relevance)
  • Author A-Ö
  • Author Ö-A
  • Title A-Ö
  • Title Ö-A
  • Publication type A-Ö
  • Publication type Ö-A
  • Issued (Oldest first)
  • Issued (Newest first)
  • Created (Oldest first)
  • Created (Newest first)
  • Last updated (Oldest first)
  • Last updated (Newest first)
  • Disputation date (earliest first)
  • Disputation date (latest first)
Select
The maximal number of hits you can export is 250. When you want to export more records please use the Create feeds function.
  • 1.
    Goknil, A.
    et al.
    AOSTE Team, UNS-I3S-INRIA, Sophia-Antipolis, France .
    Suryadevara, Jagadish
    Mälardalen University, School of Innovation, Design and Engineering.
    Peraldi-Frati, M. -A
    AOSTE Team, UNS-I3S-INRIA, Sophia-Antipolis, France .
    Mallet, F.
    AOSTE Team, UNS-I3S-INRIA, Sophia-Antipolis, France .
    Analysis support for TADL2 timing constraints on EAST-ADL models2013In: Lecture Notes in Computer Science, vol. 7957, Springer, 2013, p. 89-105Chapter in book (Refereed)
    Abstract [en]

    It is critical to analyze characteristics of real-time embedded systems, such as timing behavior, early in the development. In the automotive domain, EAST-ADL is a concrete example of the model-based approach for the architectural modeling of real-time systems. The Timing Augmented Description Language v2 (TADL2) allows for the specification of timing constraints on top of EAST-ADL models. In this paper we propose a formal validation & verification methodology for timing behaviors given with TADL2. The formal semantics of the timing constraints is given as a mapping to the Clock Constraint Specification Language (CCSL), a formal language that implements the MARTE Time Model. Based on such a mapping, the validation is carried out by the simulation of TADL2 specifications. The simulation allows for a rapid prototyping of TADL2 specifications. The verification is performed based on a TADL2 mapping to timed automata modeling using the Uppaal model-checker. The whole process is illustrated on a Brake-By-Wire application.

  • 2.
    Slutej, Davor
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Håkansson, J.
    Uppsala University.
    Suryadevara, Jagadish
    Mälardalen University, School of Innovation, Design and Engineering.
    Seceleanu, Cristina
    Mälardalen University, School of Innovation, Design and Engineering.
    Pettersson, Paul
    Mälardalen University, School of Innovation, Design and Engineering.
    Analyzing a Pattern-Based Model of a Real-Time Turntable System.2009In: Electronical Notes in Theoretical Computer Science, ISSN 1571-0661, E-ISSN 1571-0661, Vol. 1, no 6, p. 161-178Article in journal (Refereed)
    Abstract [en]

    Designers of industrial real-time systems are commonly faced with the problem of complex system modeling and analysis, even if a component-based design paradigm is employed. In this paper, we present a case-study in formal modeling and analysis of a turntable system, for which the components are described in the SaveCCM language. The search for general principles underlying the internal structure of our real-time system has motivated us to propose three modeling patterns of common behaviors of real-time components, which can be instantiated in appropriate design contexts. The benefits of such reusable patterns are shown in the case-study, by allowing us to produce easy-to-read and manageable models for the real-time components of the turntable system. Moreover, we believe that the patterns may pave the way toward a generic pattern-based modeling framework targeting real-time systems in particular.

  • 3.
    Suryadevara, Jagadish
    Mälardalen University, School of Innovation, Design and Engineering.
    Design and Analysis Support for Abstract Models of Component-based Embedded Systems2011Licentiate thesis, comprehensive summary (Other academic)
    Abstract [en]

    Developing industrial real-time software systems is challenging due to de- mands on system safety and reliability, through stringent system requirements in terms of functionality, timing, resource consumption etc. Due to this, the system development needs to ensure predictability before the actual imple- mentation, through reliable engineering methods. To address these challenges, model-based engineering (MBE) combined with Component-based develop- ment (CBD) has emerged as a feasible solution. MBE supports system model- ing and formal analysis through the development phases such as requirements, specification, and design. CBD supports reusability of software parts leading to faster development time, and reduced costs. However, an integrated approach needs to deal with various abstractions of the system during different phases of the development.

    In this thesis, we present model-based techniques, for the development of predictable, component-based designs of embedded systems. We consider Pro- Com as the underlying component model and, as a first step, we define a for- mal semantics for its architectural elements. The given semantics provides a basis for developing analyzable embedded systems designs, associated analy- sis techniques, model transformations etc. Next, we describe some commonly- found behavioral patterns, in component-based designs. These patterns provide an abstract, and reusable specification of a real-time components functional- ity. Also, we define component-based design templates, intended to support the systematic development of component-based designs from abstract system models. Finally, we propose a formal framework to correlate statemachine- based system behavior with corresponding ProCom-based system designs. We validate our research contributions using case-studies and examples, and also by applying verification techniques, such as, model-checking.

     

  • 4.
    Suryadevara, Jagadish
    Mälardalen University, School of Innovation, Design and Engineering.
    Model Based Development of Embedded Systems using Logical Clock Constraints and Timed Automata2013Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    In modern times, human life is intrinsically depending on real-time embedded systems (RTES) with increasingly safety-critical and mission-critical features, for instance, in domains such as automotive and avionics. These systems are characterized by stringent functional requirements and require predictable timing behavior. However, the complexity of RTES has been ever increasing requiring systematic development methods. To address these concerns, model-based frameworks and component-based design methodologies have emerged as a feasible solution. Further, system artifacts such as requirements/specifications, architectural designs as well as behavioral models like statemachine views are integrated within the development process. However, several challenges remain to be addressed, out of which two are especially important: expressiveness, to represent the real-time and causality behavior, and analyzability, to support verification of functional and timing behavior.

    As the main research contribution, this thesis presents design and verification techniques for model-based development of RTES, addressing expressiveness and analyzability for architectural and behavioral models. To begin with, we have proposed a systematic design process to support component-based development. Next, we have provided a real-time semantic basis, in order to support expressiveness and verification for structural and behavioral models. This is achieved by defining an intuitive formal semantics for real-time component models, using ProCom, a component model developed at our research centre, and also using the CCSL (Clock Constraint Specification Language), an expressive language for specification of timed causality behavior. This paves the way for formal verification of both architectural and behavioral models, using model checking, as we show in this work, by transforming the models into timed automata and performing verification using UPPAAL, a model checking tool based on timed automata. Finally, the research contributions are validated using representative examples of RTES as well as an industrial case-study.

  • 5.
    Suryadevara, Jagadish
    Mälardalen University, School of Innovation, Design and Engineering.
    Validating EAST-ADL Timing Constraints using UPPAAL2013In: 39th Euromicro Conference on Software Engineering and Advanced Applications (SEAA), 2013Conference paper (Refereed)
    Abstract [en]

    Systematic and formal development approaches for safety- and mission critical systems are of increasing importance. These systems are often implemented as periodically triggered control systems, to ensure deterministic and analyzable timing behavior. However, integrating timing ‘constraints’ in the development process remains a challenging task. For instance, these constraints itself should be formally verified as consistent and feasible with respect to the system design. In this paper, we present a timed automata based validation approach for EAST-ADL timing constraints for periodic control systems. The constraints are specified using CCSL – the Clock Constraint Specification Language,and transformed into timed automata, to enable formal verification with UPPAAL model-checker. The resulting timed automata specification can be simulated and verified for the formal validation of the timing constraints. Further, the transformed specification model can be easily integrated with the actual system design, thus extending verification aspects. The proposed approach is demonstrated using the timing constraints for an Anti-lock Braking System (ABS) example.

  • 6.
    Suryadevara, Jagadish
    et al.
    Birla Insitute of Technology and Science, India.
    Chung, Lawrence
    University of Texas, Dallas, United States.
    RK, Shyamasundar
    Mälardalen University, School of Innovation, Design and Engineering. Tata Insitute of Fundamental Reseach, India.
    cmUML - A UML based Framework for Formal Specification of Concurrent, Reactive Systems2008In: Journal of Object Technology (JOT), ISSN 1660-1769, Vol. 7, no 8, p. 187-207Article in journal (Refereed)
    Abstract [en]

    Complex software systems possess concurrent and reactive behaviors requiring precise specifications prior to development. Lamport's transition axiom method is a formal specification method which combines axiomatic and operational approaches. On the other hand Unified Modeling Language (UML), a de facto industry standard visual language, lacks suitable constructs and semantics regarding concurrency aspects. Though UML includes action semantics, its higher level constructs and object semantics are inconsistent. Motivated by Lamport's approach, this paper proposes a UML based specification framework 'cmUML' ('cm' for concurrent modules) for formal specification of concurrent, reactive systems without object level diagrams and OCL. The framework integrates higher level diagrams of UML and addresses various concurrency issues including exception handling. It combines UML-RT and UML/ SPT profile as the latter defines a core package for concurrency and causality. Further the framework includes the characteristic safety and liveness aspects of concurrent systems. The proposed framework is in contrast with existing approaches based on low level primitives (semaphore, monitors). The paper includes several specification examples validating the proposed framework.

  • 7.
    Suryadevara, Jagadish
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Kang, Eun-Young
    Mälardalen University, School of Innovation, Design and Engineering.
    Seceleanu, Cristina
    Mälardalen University, School of Innovation, Design and Engineering.
    Pettersson, Paul
    Mälardalen University, School of Innovation, Design and Engineering.
    Bridging the Semantic Gap between Abstract Models of Embedded Systems2010In: Lecture Notes in Computer Science, vol. 6902, Springer, 2010, p. 55-73Chapter in book (Refereed)
    Abstract [en]

    In the development of embedded software, modeling languages used within or across development phases e.g., requirements, specification, design, etc are based on different paradigms and an approach for relating these is needed. In this paper, we present a formal framework for relating specification and design models of embedded systems. We have chosen UML statemachines as specification models and ProCom component language for design models. While the specification is event-driven, the design is based on time triggering and data ow. To relate these abstractions, through the execution trajectories of corresponding models, formal semantics for both kinds of models and a set of inference rules are defined. The approach is applied on an autonomous truck case-study.

  • 8.
    Suryadevara, Jagadish
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Pettersson, Paul
    Mälardalen University, School of Innovation, Design and Engineering.
    Seceleanu, Cristina
    Mälardalen University, School of Innovation, Design and Engineering.
    Validating the Design Model of an Autonomous Truck System2009Conference paper (Refereed)
    Abstract [en]

    Model driven approaches have become effective solutions for the development of embedded systems. In particular, models across various abstraction layers, e.g., application, design, and implementation, provide the opportunity for applying different analysis techniques appropriate at various phases of system development. In this paper, we informally show how to validate the design model of an {em Autonomous Truck} embedded system, by comparing its trajectories with the trajectories of the corresponding application model. In the comparison, we also correlate the corresponding time scales of the two different models. The autonomous truck system is designed in the integrated modeling environment of SaveIDE. The system's functional and timing requirements verification is carried out on the truck's design model. Our work can be regarded as a preliminary step towards developing a general solution to the problem of bridging the gap between application and design models of embedded systems.

  • 9.
    Suryadevara, Jagadish
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sapienza, Gaetana
    ABB Corporate Research, Norway.
    Seceleanu, Cristina
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Seceleanu, Tiberiu
    ABB Corporate Research, Norway.
    Elleveseth, Stein-Erik
    ABB Corporate Research, Norway.
    Pettersson, Paul
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Wind Turbine System: An Industrial Case Study in Formal Modeling and Verification2014In: Communications in Computer and Information Science, Volume 419 CCIS, 2014, p. 229-245Conference paper (Refereed)
    Abstract [en]

    In the development of embedded systems, the formal analysis of system artifacts, such as structural and behavioral models, helps the system engineers to understand the overall functional and timing behavior of the system. In this case study paper, we present our experience in applying formal verification and validation (V&V) techniques, we had earlier proposed, for an industrial wind turbine system (WTS). We demonstrate the complementary benefits of formal verification in the context of existing V&V practices largely based on simulation and testing. We also discuss some modeling trade-offs and challenges we have identified with the case-study, which are worth being emphasized. One issue is related, for instance, to the expressiveness of the system artifacts, in view of the known limitations of rigorous verification, e.g. model-checking, of industrial systems.

  • 10.
    Suryadevara, Jagadish
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Seceleanu, Cristina
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mallet, F.
    Aoste Team-project INRIA/I3S, Sophia-Antipolis, France.
    Pettersson, Paul
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Verifying MARTE/CCSL mode behaviors using UPPAAL2013In: Lect. Notes Comput. Sci., 2013, p. 1-15Conference paper (Refereed)
    Abstract [en]

    In the development of safety-critical embedded systems, the ability to formally analyze system behavior models, based on timing and causality, helps the designer to get insight into the systems overall timing behavior. To support the design and analysis of real-time embedded systems, the UML modeling profile MARTE provides CCSL - a time model and a clock constraint specification language. CCSL is an expressive language that supports specification of both logical and chronometric constraints for MARTE models. On the other hand, semantic frameworks such as timed automata provide verification support for real-time systems. To address the challenge of verifying CCSL-based behavior models, in this paper, we propose a technique for transforming MARTE/CCSL mode behaviors into Timed Automata for model-checking using the UPPAAL tool. This enables verification of both logical and chronometric properties of the system, which has not been possible before. We demonstrate the proposed transformation and verification approach using two relevant examples of real-time embedded systems.

  • 11.
    Suryadevara, Jagadish
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Seceleanu, Cristina
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mallet, Frederic
    Univ. of Nice .
    Pettersson, Paul
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Software Engineering and Formal Methods2013In: Software Engineering and Formal Methods: 11th International Conference, SEFM 2013, Madrid, Spain, September 25-27, 2013. Proceedings, Springer, 2013, p. 1-15Chapter in book (Refereed)
    Abstract [en]

    In the development of safety-critical embedded systems, the ability to formally analyze system behavior models, based on timing and causality, helps the designer to get insight into the system’s overall timing behavior. To support the design and analysis of real-time embedded systems, the UML modeling profile MARTE provides CCSL – a time model and a clock constraint specification language. On the one hand, CCSL is an expressive language that supports specification of both logical and chronometric constraints associated with MARTE models. On the other hand, semantic frameworks such as Timed Automata provide verification support for real-time systems. To tackle the challenge of verifying CCSL-based system properties, in this paper, we propose a technique for transforming MARTE/CCSL mode behaviors into Timed Automata for model-checking using the UPPAAL tool. This enables verification of both logical and chronometric properties of the system, which has not been possible before. We demonstrate the proposed transformation and verification approach using two relevant examples of real-time embedded systems.

  • 12.
    Suryadevara, Jagadish
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Seceleanu, Cristina
    Mälardalen University, School of Innovation, Design and Engineering.
    Pettersson, Paul
    Mälardalen University, School of Innovation, Design and Engineering.
    Pattern-driven support for designing component-based architectural models.2011In: 18TH IEEE INTERNATIONAL CONFERENCE AND WORKSHOPS ON ENGINEERING OF COMPUTER BASED SYSTEMS (ECBS 2011) / [ed] Sprinkle, J; Sterritt, R; Breitman, K, 2011, p. 187-196Conference paper (Refereed)
    Abstract [en]

    The development of embedded systems often requires the use of various models such as requirements specification, architectural (component-based), and deployment models, across different phases. However, there exists little design support for obtaining suitable component-based designs that satisfy specified requirements and timing constraints. In order to provide guided support for the design process of embedded systems, we introduce several component templates, referred as patterns, which we also formally verify against relevant properties. To illustrate the usefulness of the approach, we have applied the proposed patterns to obtain a component-based design of a temperature control system.

  • 13.
    Suryadevara, Jagadish
    et al.
    Birla Institue of Technology and Science.
    Shyamasundar, R., K.
    Tata Institute of Fundamental Research, India.
    cmUML - A Precise UML for Abstract Specification of Concurrent Components2006In: Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems2006, 2006, p. 141-146Conference paper (Refereed)
    Abstract [en]

    Unified Modeling Language (UML) has become a de facto industry standard graphical language for design specification of object oriented systems. But, due to lack of formal semantics UML models are not suitable for rigorous formal analysis. This paper defines a UML subset language (cmUML) with formal semantics for precise and abstract specification of concurrent components independent of implementation issues. The approach provides modular specification and verification of larger systems. An integrated multi-view operational semantics of cmUML is defined using symbolic transition systems. This highly expressive language provides constructs to specify explicit parallelism, conditional synchronization, mutual exclusion, safety, and liveness notions as well as the behavior of the interacting environment.

  • 14.
    Suryadevara, Jagadish
    et al.
    Birla Institute of Technology & Scinec, INDIA.
    Shyamasundar, RK
    Mälardalen University, Department of Computer Science and Electronics. Tata Institute of Fundamental Research, INDIA .
    UML-based Approach to Specify Secured, Fine-grained Concurrent Access to Shared Resources2007In: Journal of Object Technology (JOT), ISSN 1660-1769, Vol. 6, no 1, p. 107-119Article in journal (Refereed)
    Abstract [en]

    In object oriented paradigm, a concurrent system can be regarded as a collection of autonomous active objects which synchronize and communicate through shared passive objects. In this paper, we propose a UML-based approach to specify secured, fine-grained concurrent access to shared resources ensuring data integrity and security. The goal of the approach is to develop the UML specification with precise executional semantics, yet independent of low-level synchronization primitives and implementation environment. The approach is largely inspired from the language constructs of CDL*. A light-weight extension of UML 2.0 meta-model is proposed for the required constructs and semantics. UML protocol statemachine is used to define the access protocol for shared resources and UML activity is used to specify the behavior of methods implementing plausibly concurrent operations. The UML activity construct is extended to support concurrency features; synchronization regions, mutual exclusion and conditional synchronization not supported in current UML2.0 semantic model. The approach can be easily extended to a programming framework of design and coding.

  • 15.
    Suryadevara, Jagadish
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Vulgarakis, Aneta
    Mälardalen University, School of Innovation, Design and Engineering.
    Carlson, Jan
    Mälardalen University, School of Innovation, Design and Engineering.
    Seceleanu, Cristina
    Mälardalen University, School of Innovation, Design and Engineering.
    Pettersson, Paul
    Mälardalen University, School of Innovation, Design and Engineering.
    ProCom: Formal Semantics2009Report (Other (popular science, discussion, etc.))
    Abstract [en]

    This technical report presents the formal semantics of the ProCom component model.

  • 16.
    Suryadevara, Jagadish
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Yin, Ling
    East China Normal University, Shanghai, China.
    Timed Automata Modeling of CCSL Constraints2012Conference paper (Refereed)
    Abstract [en]

    The UML profile MARTE includes CCSL (Clock Constraint Specification Language) for specifying logical (synchronous/asynchronous) as well as chronometric timing constraints. A reference semantics for CCSL has been defined and transformation techniques proposed e.g. CCSL to Promela. In this paper, we present transformation of CCSL into timed automata, to enable verification with UPPAAL modelchecker. Further, we discuss how the transformation approach supports modeling multiple timebases, timebase relationships and corresponding timing constraints.

  • 17.
    Vulgarakis, Aneta
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Suryadevara, Jagadish
    Mälardalen University, School of Innovation, Design and Engineering.
    Carlson, Jan
    Mälardalen University, School of Innovation, Design and Engineering.
    Seceleanu, Cristina
    Mälardalen University, School of Innovation, Design and Engineering.
    Pettersson, Paul
    Mälardalen University, School of Innovation, Design and Engineering.
    Formal semantics of the ProCom real-time component model2009In: Proceedings of the 35th Euromicro Conference on Software Engineering and Advanced Applications 2009. SEAA 09, 2009, p. 478-485Conference paper (Refereed)
    Abstract [en]

    ProCom is a new component model for real-timeand embedded systems, targeting the domains of vehicularand telecommunication systems. In this paper, we describehow the architectural elements of the ProCom componentmodel have been given a formal semantics. The semantics isgiven in a small but powerful finite state machine formalism,with notions of urgency, timing, and priorities. By definingthe semantics in this way, we (i) provide a rigorous and compactdescription of the modeling elements of ProCom, (ii) setthe ground for formal analysis using other formalisms, and(iii) provide an intuitive and useful description for bothpractitioners and researchers. To illustrate the approach,we exemplify with a number of particularly interestingcases, ranging from ports and services to components andcomponent hierarchies.

1 - 17 of 17
CiteExportLink to result list
Permanent link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf