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  • 1.
    Chauhan, S. B.
    et al.
    Ahmedabad University, Gujrat, India.
    Gore, Rahul Nandkumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    SMQTT: A Lightweight Clock Synchronization Algorithm for IoT Devices Using MQTT2023In: IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication, ISPCS, IEEE Computer Society , 2023Conference paper (Refereed)
    Abstract [en]

    Advancements in the Industrial Internet of Things (IIoT) and cyber-physical systems have driven the development of Industry 4.0, which has led to the emergence of advanced cloud-based applications. The web applications connect the field IIoT devices to 'the Internet'. The adequate performance of web applications depends on how seamlessly devices communicate and synchronize. The IIoT devices prominently use Message Queueing Telemetry Transport (MQTT) for machine to machine (M2M) communication. MQTT implements publish-subscribe-based broker architecture that distributes a common timebase to client devices. Such one-way time transfer methods are less accurate and often introduce synchronization errors. While existing time synchronization methods for field IIoT end devices, e.g., Simple Network Time Protocol (SNTP), provide adequate synchronization based on two-way delay transfer methods, their performance degrades significantly with deteriorating network conditions. To address these synchronization challenges, we propose SMQTT, a scalable, software-based, lightweight clock synchronization method for IIoT end devices utilizing MQTT-based M2M communication. The proposed method effectively leverages the broker architecture to implement a two-way delay-based synchronization algorithm. We conducted measurements in network deployments to evaluate the performance of the proposed algorithm. The results demonstrate that SMQTT surpasses both SNTP and state-of-the-art methods in terms of accuracy. Specifically, in our measurements under poor network conditions, SMQTT achieves synchronization performance improvements of 94% and 73% compared to SNTP and the state-of-the-art method, respectively. 

  • 2.
    Ghaderi, Adnan
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Innovation and Product Realisation.
    Gore, Rahul Nandkumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Analysis of Fault Tolerant Multi-stage Switch Architecture for TSNManuscript (preprint) (Other academic)
    Abstract [en]

    We conducted the feasibility analysis of utilizing a highly available multi-stage architecture for TSN switches used for sending high priority, mission-critical traffic within a bounded latency instead of traditional single-stage architectures. To verify the TSN functionality, we implemented the 'strict priority' feature. We evaluated the performance of both architectures on multiple parameters such as fault tolerance, packet latency, throughput, reliability, path length effectiveness, and cost per unit. The fault tolerance analysis demonstrated that the multi-stage architecture fairs better than the single-stage counterpart. The average latency and throughput performance of multi-stage architectures, although low, can be considered comparable with single-stage counterparts. However, the multi-stage architecture fails to meet the performance of single-stage architectures on parameters such as reliability, path length effectiveness, and cost-effectiveness. The improved fault tolerance comes at the cost of increased hardware resources, cost, and complexity. However, with the advent of cost-effective technologies in hardware design and efficient architecture designs, the multi-stage switching architecture-based TSN switches can be made reasonably comparable to single-stage switching TSN switches. This work gives initial confidence that the multi-stage architecture can be pursued further for safety-critical systems that require determinism and reliability in the communication of critical messages.

  • 3.
    Gore, Rahul Nandkumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Improving Clock Synchronization Performance in Industrial Networks2023Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    The recent advances in cyber-physical systems and industrial internet-of-things (IIoT) have enabled the convergence of information technology (IT) and operational technology (OT) worlds of industrial automation systems achieving higher productivity, reliability, and revenues. The availability of business-critical and production-critical data on the converged network has enabled new and advanced network-centric applications that require time-constrained embedded devices to be connected to “the internet.'' The massively interconnected IIoT devices communicating in real-time require a accurate, scalable, easy-to-deploy, and cost-effective clock synchronization service for the ordering of information collected throughout a network. Thus, a time or clock synchronization service that aligns the devices' clocks in the network to ensure accurate timestamping and orderly event executions, has gained great importance. The industrial networks are heterogeneous in nature, where various grades of hardware resources along with varied software complexities operate in average to extremely harsh and hostile environments. The heterogeneity and the huge number of devices make it challenging to achieve an adequate level of clock synchronization in industrial networks with existing hardware and software-based solutions. For this reason, the thesis aims to enhance the accuracy of the most-economical, highly scalable, and easy-to-deploy software-based clock synchronization in wired industrial networks with the hypothesis that predictive software strategies can compensate for their lack of accuracy.

    The first step towards this goal is to identify the industrial network characteristics essential for improving clock synchronization. The analysis of real network data from an industrial site confirmed that packet delay variation (PDV) could assure the clock synchronization performance in an industrial network. Using signal processing-based PDV compensation methods, we propose enhanced clock synchronization algorithms, namely, 'CoSiNeT' and 'CoSiWiNet' for local and wide area industrial networks. Based on the analysis in real networks, both algorithms outperform state-of-the-practice and state-of-the-art methods in degrading network scenarios. Once the significance of PDV in synchronization performance has been confirmed, the next step is identifying the network parameters significantly affecting PDV. The thesis provides a network calculus-based PDV analysis of synchronization messages in a multi-stage wired packet-switched network under the presence of stochastic  background traffic. The analysis, based on a closed-form, end-to-end probabilistic analytical model of PDV, identifies the network parameters that significantly affect PDV. It further unveils the significant relationship between PDV incurred by synchronization messages and the rate, burstiness of background network traffic parameters. Bounding the PDV or jitter under a certain level can be beneficial for applications such as synchronization, where PDV is a significant decider of assured performance. A Sigma traffic shaper is proposed to maintain PDV under limits by controlling the rate of incoming background traffic at the ingress port of the network. We further estimate the probability of a synchronization message loss due to the shaper, given the finite buffers available at network stages. The loss probability estimation is a vital trade-off tool that can be utilized to fix the limiting rate for a desired PDV maintenance. Finally, we extend the PDV analysis to predict the probabilistic clock synchronization accuracy bound for given network conditions. The performance analysis conducted with proposed configurations showed that limiting the arrival traffic rate to 50% resulted in PDV levels and in turn synchronization accuracy being reduced from a few milliseconds to a few microseconds.

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  • 4.
    Gore, Rahul Nandkumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Investigating Software-based Clock Synchronization for Industrial Networks2021Licentiate thesis, comprehensive summary (Other academic)
    Abstract [en]

    A rising level of industrialization and advances in Industry 4.0 have resulted in Industrial Internet of Things (IIoT) gaining immense significance in today’s industrial automation systems. IIoT promises to achieve improved productivity, reliability, and revenues by connecting time-constrained embedded systems to “the Internet”. New opportunities bring with them challenges, and in particular for industrial networks, massively interconnected IIoT devices communicating in real-time,  require synchronized operation of devices for the ordering of information collected throughout a  network. Thus,   a   time or clock synchronization service that aligns the devices’ clocks in the network to ensure accurate timestamping and orderly event executions, has gained great importance. Achieving adequate clock synchronization in the industrial domain is challenging due to heterogeneous communication networks and exposure to harsh environmental conditions bringing interference to the communication networks. The investigative study based on existing literature and the envisioned architecture of the future industrial automation system unveils that the key requirements for future industrial networks are to have a cost-effective, accurate, scalable, secured, easy to deploy and maintain clock synchronization solution. Today’s industrial automation systems employ clock synchronization solutions from a wide plethora of hardware and software based solutions. The most economical, highly scalable, maintainable software-based clock synchronization means are best candidates for the identified future requirements as their lack in accuracy compared to hardware solutions could be compensated by predictive software strategies.

     Thus, the thesis’s overall goal is to enhance the accuracy of software-based clock synchronization in heterogeneous industrial networks using predictable software strategies. The first step towards developing an accurate clock synchronization for heterogeneous industrial networks with real-time requirements is to investigate communication parameters affecting time synchronization accuracy. Towards this goal, we investigated actual industrial network data for packet delay profiles and their impact on clock synchronization performance.  We further analyzed wired and wireless local area networks to identify key network parameters for clock synchronization and proposed an enhanced clock synchronization algorithm CoSiNeT for field IoT devices in industrial networks. CoSiNeT matches well with state-of-the-practice SNTP and state-of-the-art method SPoT in good network conditions in terms of accuracy and precision;  however,  it outperforms them in scenarios with degrading network conditions.

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  • 5.
    Gore, Rahul Nandkumar
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lisova, Elena
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Åkerberg, Johan
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Björkman, Mats
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Clock Synchronization in Future Industrial Networks: Applications, Challenges, and Directions2020In: 12th AEIT International Annual Conference, AEIT 2020, Institute of Electrical and Electronics Engineers Inc. , 2020Conference paper (Refereed)
    Abstract [en]

    Time synchronization is essential for the correct and consistent operation of automation systems. An inaccurate analysis being a consequence of improper synchronization, can affect automation functions, e.g., by producing false commands and warnings. Industrial systems are evolving from the rigid automation pyramid to a flexible and reconfigurable architecture due to market evolution. The new trends in Cyber-Physical-Systems (CPS), Industry 4.0, and Internet of Things (IoT) are enabling this evolution. Citing a need to understand the future synchronization requirements, this paper envisions the architecture, communication network, and applications of future automation systems. Built on this vision, the paper derives the future needs of synchronization and analyzes them with state-of-art synchronization means. Based on the analysis, we envision the future of synchronization systems for automation systems.

  • 6.
    Gore, Rahul Nandkumar
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lisova, Elena
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Åkerberg, Johan
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Björkman, Mats
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    CoSiNeT: A Lightweight Clock Synchronization Algorithm for Industrial IoT2021In: IEEE International Conference on Industrial Cyber-Physical Systems ICPS 2021, 2021Conference paper (Refereed)
    Abstract [en]

    Recent advances in industrial internet of things~(IIoT) and cyber-physical systems drive Industry 4.0 and lead to advanced applications. The adequate performance of time-critical automation applications depends on a clock synchronization scheme used by control systems. Network packet delay variations adversely impact the clock synchronization performance. The impact is significant in industrial sites, where software and hardware resources heavily contribute to delay variations, and where harsh environmental conditions interfere with communication network dynamics. While existing time synchronization methods for IIoT devices, e.g., Simple Network Time Protocol~(SNTP), provide adequate synchronization in good operating conditions, their performance degrades significantly with deteriorating network conditions. To overcome this issue, we propose a scalable, software-based, lightweight clock synchronization method, called CoSiNeT, for IIoT devices that maintains precise synchronization performance in a wide range of operating conditions. We have conducted measurements in local network deployments such as home and a university campus in order to evaluate the proposed algorithm performance. The results show that CoSiNeT matches well with SNTP and state-of-the-art method in good network conditions in terms of accuracy and precision; however, it outperforms them in degrading network scenarios. In our measurements, in fair network conditions, CoSiNeT improves synchronization performance by 23% and 25% compared to SNTP and state-of-the-art method. In the case of poor network conditions, it improves performance by 43% and 26%, respectively.

  • 7.
    Gore, Rahul Nandkumar
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lisova, Elena
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Åkerberg, Johan
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Björkman, Mats
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    CoSiWiNeT: A Clock Synchronization Algorithm for Wide Area IIoT Network2021In: Applied Sciences, E-ISSN 2076-3417, Vol. 11, no 24, article id 11985Article in journal (Refereed)
    Abstract [en]

    Recent advances in the industrial internet of things (IIoT) and cyber–physical systems drive Industry 4.0 and have led to remote monitoring and control applications that require factories to be connected to remote sites over wide area networks (WAN). The adequate performance of remote applications depends on the use of a clock synchronization scheme. Packet delay variations adversely impact the clock synchronization performance. This impact is significant in WAN as it comprises wired and wireless segments belonging to public and private networks, and such heterogeneity results in inconsistent delays. Highly accurate, hardware–based time synchronization solutions, global positioning system (GPS), and precision time protocol (PTP) are not preferred in WAN due to cost, environmental effects, hardware failure modes, and reliability issues. As a software–based network time protocol (NTP) overcomes these challenges but lacks accuracy, the authors propose a software–based clock synchronization method, called CoSiWiNeT, based on the random sample consensus (RANSAC) algorithm that uses an iterative technique to estimate a correct offset from observed noisy data. To evaluate the algorithm’s performance, measurements captured in a WAN deployed within two cities were used in the simulation. The results show that the performance of the new algorithm matches well with NTP and state–of–the–art methods in good network conditions; however, it outperforms them in degrading network scenarios.

  • 8.
    Gore, Rahul Nandkumar
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lisova, Elena
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Åkerberg, Johan
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Björkman, Mats
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Delay and Jitter Analysis in Industrial Control Systems: A Paper Mill Case Study2021In: 17th IEEE International Conference on Factory Communication Systems (WFCS) WFCS'21, 2021, p. 99-106Conference paper (Refereed)
    Abstract [en]

    Industrial control systems have strict requirements for time-sensitive applications and clock synchronization services. Performance of such applications is adversely impacted by packet delays and jitters. The impact is especially critical in process industries due to harsh environmental conditions. In this paper, we analyze delays and jitters to assess the performance of time-sensitive applications. To this end, we captured and analyzed round trip delay data retrieved from a paper factory. Analysis shows that a sub-millisecond level average delays and the jitters derived from the observed data are sufficient to meet the minimum 10ms update frequency required for most critical control applications. Moreover, the filtered delay variations at the end devices are less than the recommended 150us, which guarantees an adequate time synchronization accuracy in the factory network. Besides, this analysis can provide significant insights into performance bottlenecks for factory applications.

  • 9.
    Gore, Rahul Nandkumar
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lisova, Elena
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Åkerberg, Johan
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Björkman, Mats
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    In Sync with Today's Industrial System Clocks2020In: 2020 International Conference on COMmunication Systems and NETworkS, COMSNETS 2020, Institute of Electrical and Electronics Engineers Inc. , 2020, p. 785-790Conference paper (Refereed)
    Abstract [en]

    Synchronization is essential for correct and consistent operation of automation systems. Synchronized devices accurately time-stamp the events and enable timely communication of messages over a communication network. In absence of a common time base, critical functions of automation systems cannot be carried out in a safe fashion. Unsynchronized systems may lead to malfunctions such as false alarms, wrong decisions and erroneous outcomes resulting into serious showstopper for plant operations. Despite technical advances in synchronization, industrial automation systems have lagged compared to telecommunication and financial services in utilization of latest synchronization technology. Thus, there is a need to investigate the adoption of synchronization in industrial networks, its current state and implementation problems. We carried out an extensive literature search in a structured way to study the evolution of synchronization in automation systems. We also investigated today's industrial automation systems and their network topologies to get insight into the synchronization techniques and mechanisms being used. As an outcome of study, the paper highlights the challenges related to synchronization in existing automation networks that need to be addressed in the immediate and short-term future. 

  • 10.
    Gore, Rahul Nandkumar
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lisova, Elena
    Mälardalen University, School of Innovation, Design and Engineering, Innovation and Product Realisation.
    Åkerberg, Johan
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Björkman, Mats
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Jitter Control in Multi-stage Wired Networks via a Sigma Traffic ShaperManuscript (preprint) (Other (popular science, discussion, etc.))
  • 11.
    Gore, Rahul Nandkumar
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lisova, Elena
    Mälardalen University, School of Innovation, Design and Engineering, Innovation and Product Realisation.
    Åkerberg, Johan
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Björkman, Mats
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Network Calculus Approach for Packet Delay Variation Analysis of Multi-Hop Wired Networks2022In: Applied Sciences, E-ISSN 2076-3417, Vol. 12, no 21, article id 11207Article in journal (Refereed)
    Abstract [en]

    The Industrial Internet of Things (IIoT) has revolutionized businesses by changing the way data are used to make products and services more efficient, reliable, and profitable. To achieve the improvement goals, the IIoT must guarantee the real-time performance of industrial applications such as motion control, by providing stringent quality of service (QoS) assurances for their (industrial applications) communication networks. An application or service may malfunction without adequate network QoS, resulting in potential product failures. Since an acceptable end-to-end delay and low jitter or packet delay variation (PDV) are closely related to quality of service (QoS), their impact is significant in ensuring the real-time performance of industrial applications. Although a communication network topology ensures certain jitter levels, its real-life performance is affected by dynamic traffic due to the changing number of devices, services, and applications present in the communication network. Hence, it is essential to study the jitter experienced by real-time traffic in the presence of background traffic and how it can be maintained within the limits to ensure a certain level of QoS. This paper presents a probabilistic network calculus approach that uses moment-generating functions to analyze the delay and PDV incurred by the traffic flows of interest in a wired packet switched multi-stage network. The presented work derives closed-form, end-to-end, probabilistic performance bounds for delay and PDV for several servers in series in the presence of background traffic. The PDV analysis conducted with the help of a Markovian traffic model for background traffic showed that the parameters from the background traffic significantly impact PDV and that PDV can be maintained under the limits by controlling the shape of the background traffic. For the studied configurations, the model parameters can change the PDV bound from 1 ms to 100 ms. The results indicated the possibility of using the model parameters as a shaper of the background traffic. Thus, the analysis can be beneficial in providing QoS assurances for real-time applications.

  • 12.
    Åkerberg, Johan
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Åkesson, J.F.
    Westermo Network Technologies AB, Västerås, Sweden.
    Gade, J.
    ABB AB Corporate Research, Västerås, Sweden.
    Vahabi, Maryam
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. ABB AB Corporate Research, Västerås, Sweden.
    Björkman, Mats
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lavassani, Mehrzad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Division of Industrial Systems, RISE-Research Institutes of Sweden, Sundsvall, Sweden.
    Gore, Rahul Nandkumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lindh, T.
    Iggesund Paperboard, Iggesund, Sweden.
    Jiang, X.
    ABB AB Corporate Research, Västerås, Sweden.
    Future industrial networks in process automation: Goals, challenges, and future directions2021In: Applied Sciences, E-ISSN 2076-3417, Vol. 11, no 8, article id 3345Article in journal (Refereed)
    Abstract [en]

    There are many initiatives and technologies working towards implementing factories of the future. One consensus is that the classical hierarchical automation system design needs to be flattened while supporting the functionality of both Operation Technology (OT) and Information Technology (IT) within the same network infrastructure. To achieve the goal of IT/OT convergence in process automation, an evolutionary transition is preferred. Challenges are foreseen during the transition, mainly caused by the traditional automation architecture, and the main challenge is to identify the gap between the current and future network architectures. To address the challenges, in this paper, we describe one desired future scenario for process automation and carry out traffic measurements from a pulp and paper mill. The measured traffic is further analyzed, which reveals representative traffic characteristics in the process automation. Finally, the key challenges and future directions towards a system architecture for factories of the future are presented.

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