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  • 1.
    Ashjaei, Mohammad
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Liu, Meng
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Mifdaoui, A.
    University of Toulouse, France.
    Almeida, L.
    University of Porto, Portugal.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Worst-case delay analysis of master-slave switched ethernet networks2012In: Proceeings of the 2nd International Workshop on Worst-Case Traversal Time: Proceeding, 2012, p. 15-21Conference paper (Refereed)
    Abstract [en]

    Switched Ethernet is increasingly used in real-time communication due to its intrinsic features such as micro segmentation and high throughput. However, COTS switches may impose long blocking times due to their FIFO queues and can also experience buffer overflow in outgoing queues due to uncontrolled packets arrival. The FTT-SE protocol uses a Master-Slave technique to overcome the COTS switch limitations in real-time applications. Recently, we extended the protocol for large scale networks and in this paper we present the worst-case delay analysis using the Network Calculus formalism for such a network. Moreover, we assess the end-to-end delay of traffic with simulation concluding that the obtained analytical results present a good match with the observed delays, providing uppers bounds that vary between 0% and 50% above the maximum measured values. © 2012 ACM.

  • 2.
    Becker, Matthias
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Liu, Meng
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Adaptive Routing of Real-Time Traffic on a 2D-Mesh Based NoC2015In: The 21st IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, WiP RTCSA-wip'15, 2015Conference paper (Refereed)
  • 3.
    Liu, Meng
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    On Improving Resource Utilization in Distributed Real-Time Embedded Systems2014Licentiate thesis, comprehensive summary (Other academic)
    Abstract [en]

    In our modern life, embedded systems are playing an essential role. An embedded system is a computer system embedded into a certain device, in order to achieve computing functions. Beyond all doubt, as a validated system, the functional correctness must be guaranteed. However, for many embedded systems, timeliness also plays an important role in addition to the correctness of the functionalities. For example, in an automotive braking system, the braking function needs to be processed within a limited time duration in order to avoid accidents. Such systems are known as real-time embedded systems.

    In these systems, there can be plenty of software programs (called tasks) sharing limited computing resources (e.g. processors, memories). If the system executes tasks in a random way, the whole system will become unpredictable. As a result, the system designers will not be able to verify if the system design can fulfill all the timing requirements or not. In other words, the system is not guaranteed to be safe. Therefore, system designers need to carefully implement algorithms to schedule all the tasks in a predictable manner. Regarding each scheduling algorithm, schedulability analyses are proposed which are used to check if the requirements can be satisfied.

    Unfortunately, many real-time systems reserve too much computing resource for the sake of fulfilling timing requirements, without taking into account resource utilization. As a result, system resources cannot be efficiently utilized, which can cause significant resource waste in reality. Therefore, in this thesis, we aim to improve resource utilization in modern distributed real-time embedded systems. We try to tackle this problem from the following two aspects.

    1. Investigating tighter timing analyses. Due to the difficulty in performing precise mathematical schedulability analyses, most of the existing analyses include varying degrees of pessimism. In other words, the actual performance of the system can be much better than the predictions. If we can reduce the pessimism in schedulability analyses, we can then admit more workload into the system.
    2. Proposing new scheduling frameworks. It is difficult to find a scheduling algorithm which is suitable for all the situations. Therefore, we need different mechanisms to handle specific system characteristics in order to improve the resource utilization. 
  • 4.
    Liu, Meng
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Real-Time Communication over Wormhole-Switched On-Chip Networks2017Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    In a modern industrial system, the requirement on computational capacity has increased dramatically, in order to support a higher number of functionalities, to process a larger amount of data or to make faster and safer run-time decisions. Instead of using a traditional single-core processor where threads can only be executed sequentially, multi-core and many-core processors are gaining more and more attentions nowadays. In a multi-core processor, software programs can be executed in parallel, which can thus boost the computational performance. Many-core processors are specialized multi-core processors with a larger number of cores which are designed to achieve a higher degree of parallel processing. An on-chip communication bus is a central intersection used for data-exchange between cores, memory and I/O in most multi-core processors. As the number of cores increases, more contention can occur on the communication bus which raises a bottleneck of the overall performance. Therefore, in order to reduce contention incurred on the communication bus, a many-core processor typically employs a Network-on-Chip (NoC) to achieve data-exchange. Real-time embedded systems have been widely utilized for decades. In addition to the correctness of functionalities, timeliness is also an important factor in such systems. Violation of specific timing requirements can result in performance degradation or even fatal problems. While executing real-time applications on many-core processors, the timeliness of a NoC, as a communication subsystem, is essential as well. Unfortunately, many real-time system designs over-provision resources to guarantee the fulfillment of timing requirements, which can lead to significant resource waste. For example, analysis of a NoC design yields that the network is already saturated (i.e. accepting more traffic can incur requirement violation), however, in reality the network actually has the capacity to admit more traffic. In this thesis, we target such resource wasting problems related to design and analysis of NoCs that are used in real-time systems. We propose a number of solutions to improve the schedulability of real-time traffic over wormhole-switched NoCs in order to further improve the resource utilization of the whole system. The solutions focus mainly on two aspects: (1) providing more accurate and efficient time analyses; (2) proposing more cost-effective scheduling methods.

  • 5. Liu, Meng
    et al.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A dependency-graph based priority assignment algorithm for real-time traffic over NoCs with shared virtual-channels2016In: IEEE International Workshop on Factory Communication Systems - Proceedings, WFCS, 2016, article id Article number 7496504Conference paper (Refereed)
    Abstract [en]

    The Network-on-Chip (NoC) is the on-chip interconnection medium of choice for modern massively parallel processors and System-on-Chip (SoC) in general. Fixed-priority based preemptive scheduling using virtual-channels is a solution to support real-time communications in on-chip networks. Targeting the priority assignment problem in the context of NoCs, heuristic based priority assignment algorithms are more practical, due to the exponentially increased search space as the number of flows goes up. In our previous work, we have proposed a graph-based heuristic priority assignment algorithm (called GHSA) for NoC communications, where we show that taking the dependencies between flows into account can significantly reduce the search space. However, GHSA only works for NoCs with distinct priorities. Routers in such type of platforms may have a large amount of buffer cost when the number of flows is high. The applicability can thus be limited in reality. One solution to reduce the buffer cost is to allow priority sharing of different flows. In this paper, we propose a dependency-graph based priority assignment algorithm (called eGHSA) targeting NoCs with shared virtual-channels. A number of experiments as well as a case study based on an automotive application are generated, which clearly show that eGHSA improves the efficiency compared to the existing solution in the literature. 

  • 6.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A Tighter Recursive Calculus to Compute the Worst-Case Traversal Time of Real-Time Traffic over NoCs2017In: 2017 22ND ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2017, p. 275-282, article id 7858332Conference paper (Refereed)
    Abstract [en]

    Network-on-Chip (NoC) is a communication subsystem which has been widely utilized in many-core processors and system-on-chips in general. In this paper, we focus on a Round-Robin Arbitration (RRA) based wormhole-switched NoC which is a common architecture used in most of the existing implementations. In order to execute real-time applications on such a NoC based platform, a number of given real-time requirements need to be fulfilled. One of the most typical requirements is schedulability which refers to if real-time packets can be delivered within the given time durations. Timing analysis is a common tool to verify the schedulability of a real-time system. Unfortunately, the existing timing analyses of RRA-based NoCs either provide too pessimistic estimates which results in overly allocated resources, or require a large amount of processing which limits the applicability in reality. Therefore, in this paper, we present an improved timing analysis, aiming to provide more accurate estimates along with acceptable computation time. From the evaluation results, we can clearly observe the improvement achieved by the proposed timing analysis.

  • 7.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Buffer-Aware Analysis for Worst-Case Traversal Time of Real-Time Traffic over RRA-based NoCs2017In: Proceedings - 2017 25th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2017, 2017, p. 567-575, article id 7912705Conference paper (Refereed)
    Abstract [en]

    Network-on-Chip (NoC) is a communication sub-system which has been widely utilized in many-core processors and system-on-chips in general. In order to execute time-critical applications on a NoC-based platform, the timing behavior of the network needs to be predicted during system design. One of the most important timing requirements is regarding schedulability, which refers to determining if a real-time packet can be delivered within a specific time duration. To verify the fulfillment of such timing requirement, a proper timing analysis is mandatory. Our work focuses on a Round-Robin Arbitration (RRA) based wormhole-switched NoC, which is a common architecture used in many of the existing implementations. Recursive Calculus (RC) is one of the existing analysis approaches for RRA-based NoCs which has been utilized in many research works. However, RC does not take buffer-effects into account. As a result, while performing RC on most of the existing RRA-based NoC designs, it can produce unsafe estimates which is not acceptable for time-critical systems. In this paper, we identify the optimistic problem of RC, and we propose a Revised Recursive Calculus (RRC) which extends RC by considering buffer-effects as well as supporting packetization.

  • 8.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Improved Priority Assignment for Real-Time Communications in On-Chip Networks2015In: ACM International Conference Proceeding SeriesVolume 04-06, 2015, p. 171-180Conference paper (Refereed)
    Abstract [en]

    The Network-on-Chip is the on-chip interconnection medium of choice for modern massively parallel processors and System-on-Chip in general. Fixed-priority based preemptive scheduling using virtual-channels is a solution to support real-time communications in on-chip networks. However, the different characteristics of the Network-on-Chip compared to the single processor scheduling problem prevents the usage of known optimal algorithms (e.g. the Audsley's algorithm) to assign priorities to messages. A heuristic search algorithm based approach (called the HSA) focusing on the priority assignment for on-chip communications has been presented in the literature. The HSA is much faster than an exhaustive search based solution, with a price of missing certain schedulable cases (i.e. non-optimal). In this paper, we present two undirected-graph based priority assignment algorithms, the GESA and the GHSA. In contrast to the previous work, we can decrease the search space significantly by taking the interference dependencies of different messages on the network into account. A number of experiments are generated, in order to evaluate the proposed algorithms. The results show that the GESA can always achieve higher schedulability ratios than the HSA, but may require longer processing time. On the other hand, the GHSA has the same performance as the HSA regarding the schedulability, but can significantly improve the efficiency.

  • 9.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Scheduling Real-Time Packets with Non-preemptive Regions on Priority-Based NoCs2016In: Proceedings - 2016 IEEE 22nd International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2016, 2016Conference paper (Refereed)
    Abstract [en]

    Network-on-Chip (NoC) is a preferred communi- cation medium for massively parallel platforms. Fixed-priority based scheduling using virtual-channels is one of the promising solutions to support real-time traffic in on-chip networks. Most of the existing NoC implementations which can support fixed- priority based scheduling use a flit-level preemptive scheduling. Under such a mechanism, preemptions can happen between the transmissions of successive flits. In this paper, we present a modified framework where the non-preemptive region of each NoC packet increases from a single flit. Using the proposed approach, the response times of certain packet flows can be reduced, which can thus improve the schedulability of the whole network. As a result, the utilization of NoCs can be improved by admitting more real-time traffic. Schedulability tests regarding the proposed framework are presented along with the proof of the correctness. Moreover, a number of experiments as well as a case study based on an automotive application have been generated, where we can clearly observe the improvement of our solution compared to the original flit-level preemptive NoC.

  • 10.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Tighter Time Analysis for Real-Time Traffic in On-Chip Networks with Shared Priorities2016In: 2016 10th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2016, 2016, article id 7579319Conference paper (Refereed)
    Abstract [en]

    The Network-on-Chip (NoC) is the preferred inter- connection medium for massively parallel platforms. Targeting real-time applications, fixed-priority based NoCs with virtual- channels have been proposed as a promising solution. In order to verify if specific time requirements can be satisfied, scheduability tests are typically used. Several analysis approaches have been proposed targeting priority-based NoCs. However, due to the approximation considered in the analyses, the results may involve a large amount of pessimism. The applicability of the analyses is thus limited in practice. In this paper, we identify a number of properties of NoCs with shared priorities. An improved time analysis is proposed where pessimism can be significantly reduced for many cases. In order to evaluate the proposed analysis, a number of experiments have been generated along with a case study based on an automotive application. The improvement can be clearly observed from the evaluation results.

  • 11.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Using Non-Preemptive Regions and Path Modification to Improve Schedulability of Real-Time Traffic over Priority-Based NoCs2017In: Real-time systems, ISSN 0922-6443, E-ISSN 1573-1383, no 6, p. 886-915Article in journal (Refereed)
    Abstract [en]

    Network-on-Chip (NoC) is a preferred communication medium for massively parallel platforms. Fixed-priority based scheduling using virtual-channels is one of the promising solutions to support real-time traffic in on-chip networks. Most of the existing works regarding priority-based NoCs use a flit-level preemptive scheduling. Under such a mechanism, preemptions can only happen between the transmissions of successive flits but not during the transmission of a single flit. In this paper, we present a modified framework where the non-preemptive region of each NoC packet increases from a single flit. Using the proposed approach, the response times of certain traffic flows can be reduced, which can thus improve the schedulability of the whole network. As a result, the utilization of NoCs can be improved by admitting more real-time traffic. Schedulability tests regarding the proposed framework are presented along with the proof of the correctness. Additionally, we also propose a path modification approach on top of the non-preemptive region based method to further improve schedulability. A number of experiments have been performed to evaluate the proposed solutions, where we can observe significant improvement on schedulability compared to the original flit-level preemptive NoCs. 

  • 12.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Using Segmentation to Improve Schedulability of Real-Time Traffic over RRA-based NoCs2016In: ACM SIGBED Review. Special Issue on 14th International Workshop on Real-Time Networks (RTN 2016) SIGBED Review, ISSN 1551-3688, Vol. 13, no 4, p. 20-24Article in journal (Refereed)
    Abstract [en]

    Network-on-Chip (NoC) is the interconnect of choice for many- core processors and system-on-chips in general. Most of the existing NoC designs focus on the performance with respect to average throughput, which makes them less applicable for real-time applications especially when applications have hard timing requirements on the worst-case scenarios. In this paper, we focus on a Round- Robin Arbitration (RRA) based wormhole-switched NoC which is a common architecture used in most of the existing implementations. We propose a novel segmentation algorithm targeting RRA-based NoCs in order to improve the schedulability of real-time traffic without modifying the hardware architecture. According to the evaluation results, the proposed segmentation solution can signifi- cantly improve the schedulability of the whole network.

  • 13.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Using Segmentation to Improve Schedulability of RRA-based NoCs with Mixed Traffic2017In: 2017 22ND ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2017, p. 744-750, article id 7858413Conference paper (Refereed)
    Abstract [en]

    Network-on-Chip (NoC) is the interconnect of choice for many- core processors and system-on-chips in general. Most of the exist- ing NoC designs focus on the performance with respect to average throughput, which makes them less applicable for real-time appli- cations especially when applications have hard timing requirements on the worst-case scenarios. In this paper, we focus on a Round- Robin Arbitration (RRA) based wormhole-switched NoC which is a common architecture used in most of the existing implementa- tions. We propose a novel segmentation algorithm targeting RRA- based NoCs in order to improve the schedulability of real-time traf- fic without modifying the hardware architecture. Additionally, we also address the problem of transmitting both real-time traffic and best-effort traffic in the same NoC. The proposed solutions aim to provide timing guarantees to real-time traffic and achieve low la- tency for best-effort traffic. According to the evaluation results, the proposed segmentation solution can significantly improve the schedulability of the whole network.

  • 14.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Kato, Shinpei
    Nagoya University, Nagoya, Japan.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A Server-based Approach for Overrun Management in Multi-Core Real-Time Systems2014Conference paper (Refereed)
    Abstract [en]

    This paper presents a server-based framework for task overrun management in multi-core real-time systems. Unlike most existing scheduling methods which usually assume a single upper bound of the Worst-Case Execution Time (WCET) for each task, our approach targets scenarios with task overruns. The main idea of our framework is to employ Synchronized Deferrable Servers (SDS) to deal with globally scheduled task overruns, while a partitioned scheduling approach is applied on regular task executions. Moreover, we provide a deterministic Worst- Case Response Time (WCRT) analysis focusing on hard timing constraints, along with a probabilistic analysis of Deadline Miss Ratio (DMR) for soft real-time applications. In the evaluation phase, we have implemented two types of experiments evaluating different timing constraints. 

  • 15.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Kato, Shinpei
    Nagoya University, Nagoya, Japan.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    An Adaptive Server-Based Scheduling Framework with Capacity Reclaiming and Borrowing2014In: RTCSA 2014 - 20th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2014, p. Article number 6910548-Conference paper (Refereed)
    Abstract [en]

    In this paper, we present a new reservation based scheduling framework for soft real-time systems using EDF algorithm (called CARB-EDF). This framework has the features of Capacity Adaptation, Reclaiming and Borrowing. This framework can simplify the initial configuration of the system, where the system designer does not need to provide any estimations of task execution times. We also present a Chebyshev’s inequality based predictor to estimate task execution times. A number of simulation-based experiments have been implemented. According to the results compared with some related works, our scheduling framework can provide a better performance with acceptable extra scheduling overhead. 

  • 16.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A Stochastic Response Time Analysis for Communications in On-Chip Networks2015Conference paper (Refereed)
    Abstract [en]

    Priority-based wormhole-switching has been proposed as a solution to handle real-time traffic in on-chip networks. In order to support real-time traffic, the predictability of end-toend delays need to be guaranteed. Several deterministic schedulability analysis approaches for wormhole-switched networks have been proposed. These approaches calculate a single upper-bound of the response time of each Network-on-Chip (NoC) flow, which is suitable for hard real-time applications. However, for many soft real-time applications, the performance does not depend on the worst-case scenario, which means that the calculated single upper-bounds are not sufficient to represent the performance. Therefore, in this paper, we present a stochastic Response Time Analysis (RTA) which can calculate a distribution of the response times of a real-time NoC flow. The estimated distributions can be utilized for multiple purposes, such as calculating deadline miss ratios, and computing upper-bounds regarding different probabilities. A number of simulation-based experiments are generated in order to investigate the pessimism involved in the analysis. Moreover, the processing time of the analysis is also measured from the experiments in order to examine the scalability of the proposed approach.

  • 17.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    An EVT-based Worst-Case Response Time Analysis of Complex Real-Time Systems2013In: Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, SIES 2013, 2013, p. 249-258Conference paper (Refereed)
    Abstract [en]

    In recent years, the complexity of real-time embedded systems has increased dramatically. For those modern real-time systems, the limitations of original static Response Time Analysis (RTA) become more and more conspicuous. Most static analysis methods not only require much detailed system information, but also only target to some specific system model with non-realistic assumptions. As a result, those methods may produce overly pessimistic results, making them unsuitable to be applied on a complex industrial system. The best system model may be the system itself. Therefore, statistical RTA, which can produce probabilistic analysis results based on samples provided by real systems or simulators, may become more expedient. Statistical RTA usually requires more relaxed assumptions and less system information than static RTA. In this paper, we present an Extreme Value Theory (EVT) based method to compute Worst-Case Response Time (WCRT) targeting complex real-time systems. In the evaluation phase, we have applied this method to the calculation of worst-case transmission delays of messages over Controller Area Network (CAN), and some comparisons with static RTA are also provided. According to the experimental results, as the system complexity increases, our approach performs much more stable and less pessimistic.

  • 18.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Applying the Peak Over Thresholds Method on Worst-Case Response Time Analysis of Complex Real-Time Systems2013In: 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2013, 2013, p. 22-31Conference paper (Refereed)
    Abstract [en]

    The predictability of timing behavior is a very important performance issue of a real-time system. As the complexity of modern industrial systems increases, analyzing the timing behaviors of those systems becomes more and more challenging. Most of the existing analysis methods depend on static and detailed information of the systems under analysis. However, sometimes only partial information of a system can be available, or it may require too much effort on obtaining those details, making those analysis methods much less feasible. Moreover, those methods usually focus on some specific system models with unrealistic assumptions, consequently, applying those methods on a complex industrial real-time system may result in overly pessimistic results. Therefore, in this paper, we propose a statistical method to compute Worst-Case Response Times (WCRTs) of complex real-time systems regarding soft timing constraints, which can provide a higher general applicability with less required system information. Our approach employs a Peak Over Thresholds (POT) method, which is a branch of the Extreme Value Theory (EVT). For the evaluation, we have applied this approach on the analysis of message transmission latencies over Controller Area Networks (CAN).

  • 19.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Schedulability analysis of GMF-modeled messages over controller area networks with mixed-queues2014In: IEEE Int. Workshop Factory Commun. Syst. Proc. WFCS, 2014, p. Article number 6837606-Conference paper (Refereed)
    Abstract [en]

    The Controller Area Network (CAN) is widely utilized in many industrial real-time applications. As a real-time communication network, the predictability of timing behaviors is very important. Therefore, many works have been proposed regarding the schedulability analysis of CAN messages. Most of the existing analysis approaches are based on a traditional periodic message model. However, in some applications, the transmission of a message may follow a certain pattern instead of repeating the same transmission period by period. In these cases, applying the existing analysis methods may lead to quite pessimistic results. In order to tackle this problem, in this paper we apply the Generalized Multi-Frame (GMF) task model on CAN messages, where both priority-based and FIFO-based message queues are taken into account. We present a corresponding sufficient schedulability analysis. According to the experimental evaluations, our analysis can provide tighter results compared to the existing CAN message response time analysis in the context of GMF-modeled messages. 

  • 20.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Schedulability analysis of Multi-Frame messages over Controller Area Networks with mixed-queues2013Conference paper (Refereed)
    Abstract [en]

    The Controller Area Network (CAN) is one of the most widely utilized real-time communication networks, which has plenty of applications especially in automotive industry. Many works have been proposed regarding the CAN schedulability analysis which is very important for guaranteeing the safety and reliability of hard real-time systems. Most of the existing analysis methods assume a periodic message model, and some of them take sporadic messages into account. However, for some applications, message transmissions may follow a specific pattern instead of repeating the same transmission period by period, where applying the existing methods may include much pessimism. In this paper, we apply the Multi-Frame task model, which is first proposed by Mok and Chen in cite{MokChen}, on CAN messages. Moreover, we assume that the ECUs in the analyzed network can employ both FIFO and priority based queues. The schedulability analysis and the corresponding proofs are provided along with a case study.

  • 21.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Almeida, Luis
    University of Porto.
    Response time analysis for static priority based SpaceWire networks2012In: Proceeings of the 2nd International Workshop on Worst-Case Traversal Time (WCTT '12), 2012, p. 7-14Conference paper (Refereed)
    Abstract [en]

    The SpaceWire network standard is used in spacecraft communications and has been selected for future ESA satellites. In order to guarantee the safety and reliability of on-board systems, the designers have to make sure that all critical timing constraints are satisfied. The SpaceWire network is a wormhole based network which makes its timing analysis significantly complex. Some methods for computing upper-bounds of end-to-end delays of certain wormhole network models have been developed. However, those models require some explicit assumptions and dedicated real-time mechanisms which cannot be supported by the current SpaceWire networks. Moreover, some work has proposed analysis approaches for SpaceWire networks assuming the Round-Robin arbitration scheme only. In this paper, we focus on the priority based arbitration scheme instead and we propose a worst-case response time analysis to evaluate the end-to-end delays of traffic transmissions in SpaceWire networks. The corresponding proofs to our analysis are presented along with a case study. © 2012 ACM.

  • 22.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Chiru, Cezar
    Mälardalen University.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sandström, Kristian
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    On providing real-time guarantees in cloud-based platforms2016In: IEEE International Workshop on Factory Communication Systems - Proceedings, WFCS, 2016, article id Article number 7496534Conference paper (Refereed)
    Abstract [en]

    Cloud technologies are gaining more and more attentions in recent years. Cloud-based service brings benefits in cost, energy efficiency, sharing of resources, increased flexibility, adaptability and evolvability. However, there are a number of associated challenges that need to be properly addressed before applying the cloud technique generally in industries. Providing efficient and predictable computation and communication is one of the important challenges, since many industrial systems (e.g. a control system) have specific timing requirements. Our current work thus focuses on guaranteeing the predictability of a cloud-based service. Virtualization, as one of the key technologies in Cloud Computing, is used to abstract details of resources away from end-services which simplifies the resource sharing. It thus improves the resource utilization and saves budget for end-users. In this preliminary work, we have implemented a distributed system using virtualization techniques (including virtual machines and virtual switches). Additionally, we generate a number of experiments to investigate how QoS policies can help us to provide real-time communication guarantees. 

  • 23.
    Liu, Meng
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Towards Stochastic Response Time Analysis for CAN Messages with Multiple Probabilistic Factors2015In: The 21st IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, WiP RTCSA-wip'15, Hong Kong, HongKong, 2015Conference paper (Refereed)
    Abstract [en]

    Controller Area Network (CAN) is a widely used real-time network in the vehicular domain. In this paper we identify and discuss two practical parameters, namely message copy time and mixed transmission pattern, that can vary randomly during the execution of the system. We propose to leverage on these parameters to extend the existing stochastic Response Time Analysis (RTA) for CAN.

  • 24.
    Moghaddami Khalilzad, Nima
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Liu, Meng
    Mälardalen University, School of Innovation, Design and Engineering.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering. Embedded Systems.
    Probabilistic Application Interfaces for Hierarchical Scheduling2013In: IEEE Real-Time Systems Symposium: IEEE Real-Time Systems Symposium Work-in-Progress (WiP) session, Vancouver, Canad, 2013Conference paper (Refereed)
  • 25.
    Nolte, Thomas
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. ABB Corporate Research, Västerås, Sweden.
    Liu, Meng
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lisper, Björn
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Challenges with Probabilities in Response-Time Analysis of Real-Time Systems2014In: 5th International Real-Time Scheduling Open Problems Seminar RTSOPS'14, 2014Conference paper (Refereed)
    Abstract [en]

    In this paper we present and discuss some of the key open problems and challenges with using probabilities in Response-Time Analysis (RTA) of "real" real-time systems, i.e., challenges inherent in the real software to be analyzed.

1 - 25 of 25
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