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  • 1.
    Aldea, M.
    et al.
    Universidad de Cantabria, Santander, Spain.
    Bernat, G.
    University of York.
    Broster, I.
    Universidad de Cantabria, Santander, Spain .
    Burns, A.
    University of York.
    Dobrin, Radu
    Mälardalen University, Department of Computer Science and Electronics.
    Drake, J. M.
    Universidad de Cantabria, Santander, Spain .
    Fohler, Gerhard
    Mälardalen University, Department of Computer Science and Electronics.
    Gai, P.
    ReTiS Lab, Scuola Superiore sant'Anna, Pisa, Italy.
    Harbour, M. G.
    Universidad de Cantabria, Santander, Spain .
    Guidi, G.
    ReTiS Lab, Scuola Superiore sant'Anna, Pisa, Italy.
    Gutierrez, J. J.
    Universidad de Cantabria, Santander, Spain.
    Lennvall, Tomas
    Mälardalen University, Department of Computer Science and Electronics.
    Lipari, G.
    ReTiS Lab, Scuola Superiore sant'Anna, Pisa, Italy .
    Martinez, J. M.
    Universidad de Cantabria, Santander, Spain .
    Medina, J. L.
    Universidad de Cantabria, Santander, Spain.
    Palencia, J. C.
    Universidad de Cantabria, Santander, Spain .
    Trimarchi, M.
    ReTiS Lab, Scuola Superiore sant'Anna, Pisa, Italy .
    FSF: A real-time scheduling architecture framework2006In: Real-Time Technology and Applications - Proceedings, 2006, p. 113-124Conference paper (Refereed)
    Abstract [en]

    Scheduling theory generally assumes that real-time systems are mostly composed of activities with hard real-time requirements. Many systems are built today by composing different applications or components in the same system, leading to a mixture of many different kinds of requirements with small parts of the system having hard real-time requirements and other larger parts with requirements for more flexible scheduling and for quality of service. Hard real-time scheduling techniques are extremely pessimistic for the latter part of the application, and consequently it is necessary to use techniques that let the system resources be fully utilized to achieve the highest possible quality. This paper presents a framework for a scheduling architecture that provides the ability to compose several applications or components into the system, and to flexibly schedule the available resources while guaranteeing hard real-time requirements. The framework (called FSF) is independent of the underlying implementation, and can run on different underlying scheduling strategies. It is based on establishing service contracts that represent the complex and flexible requirements of the applications, and which are managed by the underlying system to provide the required level of service.

  • 2.
    Aravind, Meera
    et al.
    Mälardalen University.
    Wiklander, G.
    Uppsala University, Uppsala, Sweden.
    Palmheden, J.
    Scania AB, Södertälje, Sweden.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    An Event-Based Messaging Architecture for Vehicular Internet of Things (IoT) Platforms2017In: Communications in Computer and Information Science, vol. 778, Springer Verlag , 2017, p. 37-46Conference paper (Refereed)
    Abstract [en]

    Internet of Things (IoT) has revolutionized transportation systems by connecting vehicles consequently enabling their tracking, as well as monitoring of driver activities. Such an IoT platform requires a significant amount of data to be send from the on-board vehicle to the off-board servers, contributing to high network usage. The data can be send at regular intervals or in an event-based manner whenever relevant events occur. In interval-based approach, the data is send even if it is not relevant for reporting leading to a wastage of network resources, e.g., when the data does not change considerably compared to the previously sent value. In this paper, we investigate the possibility of using an event-based architecture to send data from the on-board system to the off-board system. The results show that our event-based architecture improves the accuracy of data available at the off-board system, by a careful selection of events. Moreover, we found that our event based architecture significantly decreases the frequency of sending messages, particularly during highway driving, leading to reduced average data transfer rates. Our results enable a customer to perform trade-offs between accuracy and data transfer rates. 

  • 3.
    Aysan, Huseyin
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Susikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Schedulability guarantees for dependable distributed real-time systems under error bursts2013In: Advances in Intelligent Systems and Computing, Springer Verlag , 2013, Vol. 187, p. 393-406Conference paper (Refereed)
    Abstract [en]

    In dependable embedded real-time systems, typically built of computing nodes exchanging messages over reliability-constrained networks, the provision of schedulability guarantees for task and message sets under realistic fault and error assumptions is an essential requirement, though complex and tricky to achieve. An important factor to be considered in this context is the random nature of occurrences of faults and errors, which, if addressed in the traditional schedulability analysis by assuming a rigid worst-case occurrence scenario, may lead to inaccurate results. In this work we propose a framework for end-to-end probabilistic schedulability analysis for real-time tasks exchanging messages over Controller Area Network under stochastic errors.

  • 4.
    Aysan, Hüseyin
    et al.
    Mälardalen University, Department of Computer Science and Electronics.
    Dobrin, Radu
    Mälardalen University, Department of Computer Science and Electronics.
    Punnekkat, Sasikumar
    Mälardalen University, Department of Computer Science and Electronics.
    A Generalized Task Allocation Framework for Dependable Real-Time Systems2007In: Proceedings of the Work-In-Progress (WIP) session of the 19th Euromicro Conference on Real-Time Systems (ECRTS 07), 2007Conference paper (Refereed)
    Abstract [en]

    In this paper, we present a general framework which allows the designer to specify a wide range of criteria for allocation. Major factors considered as part of our framework are mixed criticalities of tasks, schedulability, power consumption, fault-tolerance, and dependability requirements in addition to typical functional aspects such as memory constraints. This being a global optimization problem, we are forced to use meta-heuristic algorithms, and we were able to represent these requirements in a very intuitive manner by the usage of energy functions in simulated annealing. We envision the proposed methodology as a quite simple, scalable, as well as computationally effective solution covering a wide range of system architectures and solution spaces. 

  • 5.
    Aysan, Hüseyin
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Fault Tolerant Scheduling on Control Area Network (CAN):  2010In: ISORC Workshops 2010 - 2010 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, Vol. 2, 2010, p. 226-232Conference paper (Refereed)
    Abstract [en]

    Dependable communications is becoming a critical factor due to the pervasive usage of networked embedded systems that increasingly interact with human lives in one way or the other in many real-time applications. Though many smaller systems are providing dependable services employing uniprocesssor solutions, stringent fault containment strategies etc., these practices are fast becoming inadequate due to the prominence of COTS in hardware and component based development(CBD) in software as well as the increased focus on building 'system of systems'. Hence the repertoire of design paradigms, methods and tools available to the developers of distributed real-time systems needs to be enhanced in multiple directions and dimensions. In future scenarios, potentially a network needs to cater to messages of multiple criticality levels (and hence varied redundancy requirements) and scheduling them in a fault tolerant manner becomes an important research issue. We address this problem in the context of Controller Area Network (CAN), which is widely used in automotive and automation domains, and describe a methodology which enables the provision of appropriate scheduling guarantees. The proposed approach involves definition of fault-tolerant windows of execution for critical messages and the derivation of message priorities based on earliest deadline first (EDF).

  • 6.
    Aysan, Hüseyin
    et al.
    Mälardalen University, Department of Computer Science and Electronics.
    Dobrin, Radu
    Mälardalen University, Department of Computer Science and Electronics.
    Punnekkat, Sasikumar
    Mälardalen University, Department of Computer Science and Electronics.
    FT-Feasibility in Fixed Priority Real-Time Scheduling2007Report (Other academic)
    Abstract [en]

    Real-time systems typically have to satisfy complex requirements mapped to the timing attributes of the tasks that are eventually guaranteed by the underlying scheduler. These systems consist of a mix of hard and soft tasks with varying criticalities as well as associated fault tolerance (FT) requirements. Often time redundancy techniques are preferred in many embedded applications and hence it is extremely important to devise appropriate methodologies for scheduling real-time tasks under fault assumptions. Additionally, the relative criticality of tasks could undergo changes during the evolution of the system. Hence scheduling decisions under fault assumptions have to reflect all these important factors in addition to the resource constraints.

    In this paper we propose a framework for 'FTfeasibility', i.e., to provide a priori guarantees that all critical tasks in the system will meet their deadlines even in case of faults. Our main objective here is to ensure FTfeasibility of all critical tasks in the system and do so with minimal costs and without any fundamental changes in the scheduling paradigm. We demonstrate its applicability in scenarios where the FT strategy employed is re-execution of the affected tasks or an alternate action upon occurrence of transient faults or software design faults. We analyse a feasible set of tasks and propose methods to adapt it to varying FT requirements without modifications to the underlying scheduler. We do so by reassigning task attributes to achieve FT-feasibility while keeping the costs minimised.

  • 7.
    Aysan, Hüseyin
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Probabilistic schedulability analysis for fault tolerant tasks under stochastic error occurrences2013In: 19th International Conference on Control Systems and Computer Science, CSCS 2013: Proceedings, 2013, p. 113-120Conference paper (Refereed)
    Abstract [en]

    In dependable real-time systems, provision of schedulability guarantees for task sets under realistic fault and error assumptions is an essential requirement, though complex and tricky to achieve. An important factor to be considered in this context is the random nature of occurrences of faults and errors, which, if addressed in the traditional schedulability analysis by assuming a rigid worst case occurrence scenario, may lead to inaccurate results. In this paper we first propose a stochastic fault and error model which has the capability of modeling error bursts in lieu of the commonly used simplistic error assumptions in processor scheduling. We then present a novel schedulability analysis that accounts for a range of worst case scenarios generated by stochastic error burst occurrences on the response times of tasks scheduled under the fixed priority scheduling (FPS) policy. Finally, we describe a methodology for the calculation of probabilistic schedulability guarantees as a weighted sum of the conditional probabilities of schedulability under specified error burst characteristics.

  • 8.
    Aysan, Hüseyin
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Task-Level Probabilistic Scheduling Guarantees for Dependable Real-Time Systems: A designer centric approach  2011In: Proceedings - 2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, ISORCW 2011, 2011, p. 281-287Conference paper (Refereed)
    Abstract [en]

    Dependable real-time systems typically consist of tasks of mixed-criticality levels with associated fault tolerance (FT) requirements and scheduling them in a fault-tolerant manner to efficiently satisfy these requirements is a challenging problem. From the designers' perspective, the most natural way to specify the task criticalities is by expressing the reliability requirements at task level, without having to deal with low level decisions, such as deciding on which FT method to use, where in the system to implement the FT and the amount of resources to be dedicated to the FT mechanism. Hence, it is extremely important to devise methods for translating the highlevel requirement specifications for each task into the low-level scheduling decisions needed for the FT mechanism to function efficiently and correctly. In this paper, we focus achieving FT by redundancy in the temporal domain, as it is the commonly preferred method in embedded applications to recover from transient and intermittent errors, mainly due to its relatively low cost and ease of implementation. We propose a method which allows the system designer to specify task-level reliability requirements and provides a priori probabilistic scheduling guarantees for real-time tasks with mixed-criticality levels in the context of preemptive fixed-priority scheduling. We illustrate the method on a running example.

  • 9.
    Aysan, Hüseyin
    et al.
    Mälardalen University, Department of Computer Science and Electronics.
    Dobrin, Radu
    Mälardalen University, Department of Computer Science and Electronics.
    Punnekkat, Sasikumar
    Mälardalen University, Department of Computer Science and Electronics.
    Towards an Error Modeling Framework for Dependable Component Based Systems2008In: DATE Workshop on Dependable Software Systems, 2008Conference paper (Refereed)
  • 10.
    Aysan, Hüseyin
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Bate, Iain
    Mälardalen University, School of Innovation, Design and Engineering.
    On Voting Strategies for Loosely Synchronized Dependable Real-Time Systems2012In: 7th IEEE International Symposium on Industrial Embedded Systems, 2012, p. 120-129Conference paper (Refereed)
    Abstract [en]

    Hard real-time applications typically have to satisfy high dependability requirements in terms of fault tolerance in both the value and the time domains. Loosely synchronized real-time systems, which represent many of the systems that are developed, make any form of voting difficult as each replica may provide different outputs independent of whether there has been an error or not. This can also lead to false positives and false negatives which makes achieving fault tolerance, and hence dependability, difficult. We have earlier proposed a majority voting technique, ”Voting on Time and Value” (VTV) that explicitly considers combinations of value and timing errors, targeting loosely synchronised systems. In this paper, we extend VTV to enable voter parameter tuning to obtain the desired user specified trade-offs between the false positive and false negative rates in the voter outputs. We evaluate the performance of VTV against Compare Majority Voting (CMV), which is a known voting approach applicable in similar contexts, through extensive simulation studies. The results clearly demonstrate that VTV outperforms CMV in all scenarios with lower false negative rates.

  • 11.
    Aysan, Hüseyin
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Johansson, R.
    SP Technical Research Institute of Sweden.
    Probabilistic schedulability guarantees for dependable real-time systems under error bursts2011In: Proc. 10th IEEE Int. Conf. on Trust, Security and Privacy in Computing and Communications, TrustCom 2011, 8th IEEE Int. Conf. on Embedded Software and Systems, ICESS 2011, 6th Int. Conf. on FCST 2011, 2011, p. 1154-1163Conference paper (Refereed)
    Abstract [en]

    The fundamental requirement for the design of effective and efficient fault-tolerance mechanisms in dependable real-time systems is a realistic and applicable model of potential faults, their manifestations and consequences. Fault and error models also need to be evolved based on the characteristics of the operational environments or even based on technological advances. In this paper we propose a probabilistic burst error model in lieu of the commonly used simplistic fault assumptions in the context of processor scheduling. We present a novel schedulability analysis that accounts for the worst case interference caused by error bursts on the response times of tasks scheduled under the fixed priority scheduling (FPS) policy. Further, we describe a methodology for the calculation of probabilistic schedulability guarantees as a weighted sum of the conditional probabilities of schedulability under specified error burst characteristics. Finally, we identify potential sources of pessimism in the worst case response time calculations and discuss potential means for circumventing these issues.

  • 12.
    Aysan, Hüseyin
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Proenza, Julian
    University of the Balearic Islands, Palma de Mallorca.
    Probabilistic Scheduling Guarantees in Distributed Real-Time Systems under Error Bursts2012In: IEEE Symposium on Emerging Technologies and Factory Automation, ETFA 2012, 2012, p. Article number: 6489644-Conference paper (Other academic)
    Abstract [en]

    Networked embedded systems used in many real-time (RT) applications rely on dependable communication. Controller Area Network (CAN) has gained wider acceptance as a standard in a large number of applications, mostly due to its cost effectiveness, predictable performance, and its fault-tolerance capability. Research so far has focused on rather simplistic error models which assume only singleton errors separated by a minimum inter-arrival time. However, these systems are often subject to faults that manifest as error bursts of various lengths which have an adverse effect on the message response times that needs to be accounted for. Furthermore, an important factor to be considered in this context is the random nature of occurrences of faults and errors, which, if addressed in the traditional schedulability analysis by assuming a rigid worst case occurrence scenario, may lead to inaccurate results. In this paper we first present a stochastic fault and error model which has the capability of modeling error bursts in lieu of the commonly used simplistic error assumptions. We then present a methodology which enables the provision of appropriate probabilistic RT guarantees in distributed RT systems for the particular case of message scheduling on CAN under the assumed error assumptions

  • 13.
    Aysan, Hüseyin
    et al.
    Mälardalen University, Department of Innovation, Design and Product Development.
    Punnekkat, Sasikumar
    Mälardalen University, Department of Innovation, Design and Product Development.
    Dobrin, Radu
    Mälardalen University, Department of Innovation, Design and Product Development.
    A Cascading Redundancy Approach for Dependable Real-Time Systems2009In: Proceedings - 15th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2009, 2009, p. 467-476Conference paper (Refereed)
    Abstract [en]

    Dependable real-time systems typically consist of tasks of multiple criticality levels and scheduling them in a fault-tolerantmanner is a challenging problem. Redundancy in the physical and temporal domains for achieving fault tolerance has been often dealt independently based on the types of errors one needs to tolerate. To our knowledge, there had been no work which tries to integrate fault tolerant scheduling and multiple redundancy mechanisms. In this paper we propose a novel cascading redundancy approach within a generic fault tolerant scheduling framework. The proposed approach is capable of tolerating errors with a wider coverage (with respect to error frequency and error types) than time and space redundancy in isolation, allows tasks with mixed criticality levels, is independent of the scheduling technique and, above all, ensures that every critical task instance can be feasibly replicated in both time and space. 

     

  • 14.
    Aysan, Hüseyin
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Adding the Time Dimension to Majority Voting Strategies2008In: Proceedings of the Work-In-Progress (WIP) session of the 14th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'08), St. Louis, MO, United States: University of Nebraska–Lincoln Technical Report TR-UNL-CSE-2008-0003, 2008, p. 69-73Conference paper (Refereed)
  • 15.
    Aysan, Hüseyin
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Error Modeling in Dependable Component-based Systems2008In: Proceedings - International Computer Software and Applications Conference, 2008, p. 1309-1314Conference paper (Refereed)
    Abstract [en]

    Component-Based Development (CBD) of software, with its successes in enterprise computing, has the promise of being a good development model due to its cost effectiveness and potential for achieving high quality of components by virtue of reuse. However, for systems with dependability concerns, such as real-time systems, a major challenge in using CBD consists of predicting dependability attributes, or providing dependability assertions, based on the individual component properties and architectural aspects. In this paper, we propose a framework which aims to address this challenge. Specifically, we present a revised error classification together with error propagation aspects, and briefly sketch how to compose errormodels within the context of Component-Based Systems (CBS). The ultimate goal is to perform the analysis on a given CBS, in order to find bottle-necks in achieving dependability requirements and to provide guidelines to the designer on the usage of appropriate error detection and fault tolerance mechanisms.

  • 16.
    Aysan, Hüseyin
    et al.
    Mälardalen University, Department of Innovation, Design and Product Development.
    Punnekkat, Sasikumar
    Mälardalen University, Department of Innovation, Design and Product Development.
    Dobrin, Radu
    Mälardalen University, Department of Innovation, Design and Product Development.
    VTV -- A Voting Strategy for Real-Time Systems2008In: Proceedings of the 14th IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2008, 2008, p. 56-63Conference paper (Refereed)
    Abstract [en]

     

    Real-time applications typically have to satisfy high dependability requirements and require fault tolerance in both value and time domains. A widely used approach to ensure fault tolerance in dependable systems is the N-modular redundancy (NMR) which typically uses a majority voting mechanism. However, NMR primarily focuses on producing the correct value, without taking into account the time dimension. In this paper, we propose a new approach, Voting on Time and Value (VTV), applicable to real-time systems, which extends the modular redundancy approach by explicitly considering both value and timing failures, such that correct value is produced at a correct time, under specified assumptions. We illustrate our voting approach by instantiating it in the context of the well-known triple modular redundancy (TMR) approach. Further, we present a generalized version targeting NMR that enables a high degree of customization from the user perspective.

     

  • 17.
    Aysan, Hüseyin
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Thekkilakattil, Abhilash
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Efficient Fault Tolerant Scheduling on Controller Area Network (CAN)2010In: Proceedings of the 15th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2010, Bilbao, Spain, 2010, p. Art.nr 5641318-Conference paper (Refereed)
    Abstract [en]

    Dependable communication is becoming a critical factor due to the pervasive usage of networked embedded systems that increasingly interact with human lives in many real-time applications. Controller Area Network (CAN) has gained wider acceptance as a standard in a large number of industrial applications, mostly due to its efficient bandwidth utilization, ability to provide real-time guarantees, as well as its fault-tolerant capability. However, the native CAN fault-tolerant mechanism assumes that all messages transmitted on the bus are equally critical, which has an adverse impact on the message latencies, results in the inability to meet user defined reliability requirements, and, in some cases, even leads to violation of timing requirements. As the network potentially needs to cater to messages of multiple criticality levels (and hence varied redundancy requirements), scheduling them in an efficient fault-tolerant manner becomes an important research issue. We propose a methodology which enables the provision of appropriate guarantees in CAN scheduling of messages with mixed criticalities. The proposed approach involves definition of fault-tolerant feasibility windows of execution for critical messages, and off-line derivation of optimal message priorities that fulfill the user specified level of fault-tolerance.

  • 18.
    Buiu, C
    et al.
    Mälardalen University, School of Innovation, Design and Engineering. Politehnica University of Bucharest, Bucharest, Romania .
    Illieva, S
    Sofia University St. Kliment Ohridski, Sofia, Bulgaria .
    Zagar, M
    University of Zagreb, Zagreb, Croatia .
    Salihbegovic, A
    University of Sarajevo.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Seceleanu, T
    University of Turku.
    GENESIS - A Framework for Global Engineering of Embedded Systems2008In: Proceedings - International Conference on Software Engineering, 2008, p. 87-93Conference paper (Refereed)
    Abstract [en]

    GENESIS is an European initiative involving institutions and persons

    from older and new EU members, and West Balkan countries. It aims at

    developing a global network of research and education in embedded

    systems. The related research will be coordinated in such a way to

    address hot topics at European and global levels and will

    concentrate on the fusion of embedded systems and distributed

    services over the Internet. One of the main objectives of GENESIS is

    to develop a distributed virtual laboratory to be used in embedded

    systems research and education and this is described in detail. This

    paper presents the rationale behind this initiative and the main

    actions that are proposed to fulfill the educational, and scientific

    objectives of GENESIS.

  • 19.
    Chandran, Senthil Kumar
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Pillay, Radhamani
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Efficient scheduling with adaptive fault tolerance in heterogeneous multiprocessor systems2010In: International Conference on Computer and Electrical Engineering (ICCEE), Chengdu, China, 2010Conference paper (Refereed)
    Abstract [en]

    Heterogeneous multiprocessor systems are becoming more common and scheduling real-time tasks on them is an extremely challenging research problem. While the stringent functional and timing requirements are to be met, this problem becomes even more difficult in dynamic environments, for example, caused by processor failures. Furthermore, in safety critical applications having tasks with mixed criticality levels, guaranteeing adaptive fault tolerance to meet the reliability requirements adds another complex dimension. The key contribution of our research is a framework for task allocation and scheduling in the above context, which has a generic task model enabling task-level redundancy, a range of reconfiguration/task migration options during processor failures and definition of a set of performance metrics. We have addressed the issues of both timeliness and reliability under three different allocation strategies for a multiprocessor system with the feasibility check being performed using the well-known Rate Monotonic (RM) schedulability test. The algorithm presented in this paper, ensures that all required deadlines are met with efficient processor utilization under normal conditions and guarantees essential operations even during processor failures. In real-time multiprocessor systems used in safety critical applications, the proposed approach is expected to provide better utilization of resources and guarantees with respect to the system reliability. We demonstrate as well as evaluate the performance of our approach by simulation studies on task scheduling in heterogeneous multiprocessor environments.

  • 20.
    Davis, Rob
    et al.
    University of York, UK.
    Gettings, Oliver
    University of York, UK.
    Thekkilakattil, Abhilash
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    What is the Exact Speedup Factor for Fixed Priority Pre-emptive versus Fixed Priority Non-pre-emptive Scheduling?2015In: Proceedings of the 6th Real-Time Scheduling Open Problems Seminar (RTSOPS): held in conjunction with the 27th Euromicro Conference on Real-Time Systems (ECRTS), Lund, Sweden, 2015, p. 23-24Conference paper (Refereed)
  • 21.
    Davis, Rob
    et al.
    University of York, York, UK.
    Thekilakkattil, Abhilash
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Gettings, Oliver
    University of York, York, UK.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Chen, Jian-Jia
    Technische Universität, Dortmund, Germany..
    Exact Speedup Factors and Sub-Optimality for Non-Preemptive Scheduling2018In: Real-time systems, ISSN 0922-6443, E-ISSN 1573-1383, p. 208-246Article in journal (Refereed)
    Abstract [en]

    Fixed priority scheduling is used in many real-time systems; however, both preemptive and non-preemptive variants (FP-P and FP-NP) are known to be sub-optimal when compared to an optimal uniprocessor scheduling algorithm such as preemptive Earliest Deadline First (EDF-P). In this paper, we investigate the sub-optimality of xed priority non-preemptive scheduling. Speci cally, we derive the exact processor speed-up factor required to guarantee the feasibility under FP-NP (i.e. schedulablability assuming an optimal priority assignment) of any task set that is feasible under EDF-P. As a consequence of this work, we also derive a lower bound on the sub-optimality of non-preemptive EDF (EDF-NP). As this lower bound matches a recently published upper bound for the same quantity, it closes the exact sub-optimality for EDF-NP. It is known that neither preemptive, nor non-preemptive xed priority scheduling dominates the other, in other words, there are task sets that are feasible on a processor of unit speed under FP-P that are not feasible under FP-NP and vice-versa. Hence comparing these two algorithms, there are non-trivial speedup factors in both directions. We derive the exact speed-up factor required to guarantee the FP-NP feasibility of any FP-P feasible task set. Further, we derive the exact speed-up factor required to guarantee FP-P feasibility of any constrained-deadline FP-NP feasible task set.

  • 22.
    Davis, Rob
    et al.
    University of York, UK.
    Thekkilakattil, Abhilash
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Gettings, Oliver
    University of York, UK.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Quantifying the Exact Sub-Optimality of Non-Preemptive Scheduling2015In: Proceedings - Real-Time Systems Symposium, 2015, p. 96-106Conference paper (Refereed)
    Abstract [en]

    Fixed priority scheduling is used in many real-time systems; however, both preemptive and non-preemptive variants (FP-P and FP-NP) are known to be sub-optimal when compared to an optimal uniprocessor scheduling algorithm such as preemptive Earliest Deadline First (EDF-P). In this paper, we investigate the sub-optimality of fixed priority non-preemptive scheduling. Specifically, we derive the exact processor speed-up factor required to guarantee the feasibility under FP-NP (i.e. schedulablability assuming an optimal priority assignment) of any task set that is feasible under EDF-P. As a consequence of this work, we also derive a lower bound on the sub-optimality of non-preemptive EDF (EDF-NP), which since it matches a recently published upper bound gives the exact sub-optimality for EDF-NP. It is known that neither preemptive, nor non-preemptive fixed priority scheduling dominates the other, i.e., there are task sets that are feasible on a processor of unit speed under FP-P that are not feasible under FP-NP and vice-versa. Hence comparing these two algorithms, there are non-trivial speedup factors in both directions. We derive the exact speed-up factor required to guarantee the FP-NP feasibility of any FP-P feasible task set. Further, we derive upper and lower bounds on the speed-up factor required to guarantee FP-P feasibility of any FP-NP feasible task set. Empirical evidence suggests that the lower bound may be tight, and hence equate to the exact speed-up factor in this case.

  • 23.
    Dobrin, Radu
    Mälardalen University, Department of Computer Science and Electronics.
    Combining Off-line Schedule Construction and Fixed Priority Scheduling in Real-Time Computer Systems2005Doctoral thesis, monograph (Other scientific)
    Abstract [sv]

    Datorer har blivit lika vanliga i samhället under de senaste 10 åren som vanliga mikrovågsugnar i hemmet. Förutom hem-PC som numera finns i nästan alla hushåll, är nästan all elekronik i hemmet (till exempel dvd-spelaren eller tv apparaten) eller i bilen, datorstyrt. I de enklaste fallen består dessa system av en dator och ett antal datorprogram som körs på den.

    I och med att dessa system blir allt mer avancerade så ökar kraven på datorns effektivitet också, till exempel hur många program kan köras på samma dator samtidigt, medan priserna på den färdiga produkten måste hållas så låga som möjligt för att kunna anpassas till marknaden.

    Vissa program i ett datorstyrt system är viktigare än andra att de utförs korrekt med avseende på både funktionalitet och tid. I bilar, till exempel, är det ytterst viktigt att datorprogrammen som styr airbagen eller bromsarna alltid fungerar som de ska, medan cd- äxlaren inte är så kritiskt för passagerarnas säkerhet. Både airbagen och cd-växlaren måste reagera på externa händelser (krock eller tryck på play knappen). Medan airbagen måste aktiveras inom en viss tidsintervall, dvs, inte före en krock, men inte för sent efter en krock heller, så spelar det ingen större roll om det tar en halv sekund extra mellan tiden man trycker på play knappen på cd:n och tiden när låten börjar spelas upp. Alla dessa system måste kunna koexistera utan att påverka varandra på ett negativt sätt, dvs, om cd-växlaren slutar fungera, får det inte påverka bromsarnas funktionalitet.

    I vissa system, är grunddesignen gjort på så sätt att det är svårt att lägga till ytterligare funktionalitet, oftast i form av nya datorprogram. Om man, till exempel, vill lägga till ett antisladd system i en bil, som kommer att styras av bil datorn, så måste man kunna vara säker på att resten av programmen som körs på samma dator, i synnerhet de kritiska delarna (till ex. airbag), fortfarande kommer att fungera felfritt. Å andra sidan, ju mera program man lägger till i systemet, desto svårare blir det för datorn att hantera dem. Detta leder oftast till behovet att förnya datorn till en kraftigare modell som ska lätt hantera de gamla programmen. Samtidigt så måste man fortfarande säkerställa att programmen fungerar korrekt. Att garantera att det nya systemet som består av en ny dator och de gamla programmen uppfyller kraven på korrekt funktionalitet, kan vara ett väldigt svår uppgift.

    I det här arbetet, vi förseslår metoder som gör det möjligt och lätt att utföra ovannämda uppgifter, dvs, att utöka funktionaliteten i befintliga datorsystem eller att uppgradera systemen medan den kritiska beteendet garanteras. Samtidigt, introducerar vi metoder for att förbättra efektiviteten i befintliga datorstyrda system som används i dagens läge i, till exempel, bil och flygindustrin.

  • 24.
    Dobrin, Radu
    Mälardalen University, Department of Computer Science and Engineering.
    Transformation methods for off-line schedules to attributes for fixed priority scheduling2003Licentiate thesis, comprehensive summary (Other scientific)
  • 25.
    Dobrin, Radu
    et al.
    Mälardalen University, Department of Innovation, Design and Product Development.
    Aysan, Hüseyin
    Mälardalen University, Department of Innovation, Design and Product Development.
    Punnekkat, Sasikumar
    Mälardalen University, Department of Innovation, Design and Product Development.
    Maximizing the Fault Tolerance Capability of Fixed Priority Schedules2008In: RTCSA 2008: 14TH IEEE INTERNATIONAL CONFERENCE ON EMBEDDED AND REAL-TIME COMPUTING SYSTEMS AND APPLICATIONS - PROCEEDINGS, 2008, p. 337-346Conference paper (Refereed)
    Abstract [en]

    Real-time systems typically have to satisfy complex requirements, mapped to the task attributes, eventually guaranteed by the underlying scheduler. These systems consist of a mix of hard and soft tasks with varying criticality as well as associated fault tolerance requirements. Additionally, the relative criticality of tasks could undergo changes during the evolution of the system. Time redundancy techniques are often preferred in many embedded applications and, hence, it is extremely important to devise appropriate methodologies for scheduling real-time tasks under error assumptions. In this paper, we propose a methodology to provide a priori guarantees in fixed priority scheduling (FPS) such that the system will be able to tolerate one error per every critical task instance. We do so by using Integer Linear Programming (ILP) to derive task attributes that guarantee re-execution of every critical task instance before its deadline, while keeping the associated costs minimized. We illustrate the effectiveness of our approach, in comparison with fault tolerant (FT) adaptations of the well-known rate monotonic (RM), by simulations.

  • 26.
    Dobrin, Radu
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Desai, Nitin
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    On Fault-tolerant Scheduling of Time Sensitive Networks2019In: 4th International Workshop on Security and Dependability of Critical Embedded Real-Time Systems CERTS 2019, 2019Conference paper (Refereed)
    Abstract [en]

    Time sensitive networking (TSN) is gaining attention in industrial automation networks since it brings essential real-time capabilities at the data link layer. Though it can provide deterministic latency under error free conditions, TSN still largely depends on space redundancy for improved reliability.In many scenarios, time redundancy could be an adequate as well as cost efficient alternative. Time redundancy in turn will have implications due to the need for over-provisions needed for timeliness guarantees. In this paper, we discuss how to embed fault-tolerance capability into TSN schedules and describe our approach using a simple example.

  • 27.
    Dobrin, Radu
    et al.
    Mälardalen University, Department of Computer Science and Electronics.
    Fohler, Gerhard
    Mälardalen University, Department of Computer Science and Electronics.
    Handling Non-periodic Events Together with Complex Constrained Tasks in Distributed Real-Time Systems2007Conference paper (Refereed)
    Abstract [en]

    In this paper we show how off-line scheduling and fixed priority

    scheduling (FPS) can be combined to get the advantages of both - the

    capability to cope with complex timing constraints while providing

    run-time flexibility. We present a method to take advantage of the

    flexibility provided by FPS while guaranteeing complex constraint

    satisfaction on periodic tasks. We provide mechanisms to include FPS

    servers to our previous work, to handle non-periodic events, while

    still fulfilling the original complex constraints on the periodic

    tasks.

    In some cases, e.g., when the complex constraints can not be

    expressed directly by FPS, we split tasks into instances (artifacts)

    to obtain a new task set with consistent FPS attributes. Our method

    is optimal in the sense that it keeps the number of artifacts

    minimized.

  • 28. Fohler, Gerhard
    et al.
    Lennvall, Tomas
    Dobrin, Radu
    A component based real-time scheduling architecture2003In: Lecture Notes in Computer Science, vol. 2677, Springer, 2003, p. 110-125Chapter in book (Refereed)
    Abstract [en]

    Functionality for various services of scheduling algorithms is typically provided as extensions to a basic paradigm, intertwined in the kernel architecture. Thus, scheduling services come in packages around single paradigms, fixed to a certain methodology and kernel architecture. Temporal constraints of applications are addressed by a combination of scheduler and system architecture. Consequently, changing system architecture results in a complete rescheduling of all tasks, calling for a new cycle of analysis and testing from scratch, although a schedule meeting all temporal constraints already existed. We propose a component based architecture for schedule reuse. Instead of tying temporal constraints, scheduler, and system architecture together, we provide methods which allow for the reuse of existing schedules on various system architectures. In particular, we show how a schedule developed for table driven, dynamic or static priority paradigm can be reused in the other schemes. We address an architecture to disentangle actual scheduling from dispatching and other kernel routines with a small interface, suited for a variety of scheduling schemes as components.

  • 29.
    Gardjeliyska, Anelyia
    et al.
    Sofia University,.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    A Successful Application of the Agile Manifesto to Resource Constrained Projects with Open Specifications2010In: Proceedings of International Conference on SOFTWARE, SERVICES & SEMANTIC TECHNOLOGIES, 2010, 2010, p. 187-Conference paper (Refereed)
    Abstract [en]

    In this paper we describe how agile manifesto can be applied when a specific software solution is needed in a resource, i.e., time- and manpower- constrained environment, while the specifications are not detailed, and are prone to changes. The case study, to which this method was put on test, was an online application framework for the EU-funded EURECA project, which deals with academic mobility at all levels (e.g., students,researchers, and staff) between 16 different universities from countries in Asia and Europe. The organization of this project turned out to be a herculean task during the first call for applications. Subsequently, we developed an on-line application management framework with limited resources within a short span of time following the principles and practices of the agile manifesto. The stages and processes that were used during development are discussed in this paper, both in general and for the actual application in the EURECA framework development.

  • 30.
    Gutiérrez, M.
    et al.
    TTTech Computertechnik AG, Austria.
    Steiner, W.
    TTTech Computertechnik AG, Austria.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Synchronization quality of IEEE 802.1AS in large-scale industrial automation networks.2017In: Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS, Institute of Electrical and Electronics Engineers Inc. , 2017, p. 273-282, article id 7939046Conference paper (Refereed)
    Abstract [en]

    Industry 4.0 and Industrial Internet of Things projects work towards adoption of standard IT technologies for real-time control networks in industrial automation. For this the IEEE 802.1 Time-Sensitive Networking (TSN) Task Group has developed and continues to develop a set of standards. One of these standards is the IEEE 802.1AS clock synchronization protocol. IEEE 802.1AS can be used to enable time-triggered communication as well as to coordinate distributed actions in industrial networks. In this paper we study the synchronization quality of IEEE 802.1AS and we are interested in whether the clocks can be synchronized with sufficiently low error such that the protocol can be used for demanding industrial automation applications. In particular, we study the protocol behavior in large-scale networks while considering critical implementation details. We report analytical worst-case results as well as probabilistic results based on simulations, that show that implementation details such as the PHY jitter and the clock granularity have a big impact on the time synchronization precision. 

  • 31.
    Gutiérrez, Marina
    et al.
    TTTech Computertechnik AG, Vienna, Austria.
    Ademaj, Astrit
    TTTech Computertechnik AG, Vienna, Austria.
    Steiner, Wilfried
    TTTech Computertechnik AG, Vienna, Austria.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Self-Configuration of IEEE 802.1 TSN Networks2017Conference paper (Refereed)
    Abstract [en]

    Configuration processes of real-time networks are costly both in terms of time and engineering effort and require the system to be shutdown during the reconfiguration phase thus resulting in significant down time as well. The convergence of IT/OT technologies is bringing a whole world of possibilities for the configuration and management of real-time networks for the automation industry. With software defined networking (SDN) features like the separation of the data and control plane and standards like IEEE 802.1 developed with the goal of adding deterministic capabilities to traditionally dynamic switched Ethernet networks, the plug and play paradigm is almost around the corner. In this paper, we go one step further and start looking into the self-configuration of real-time networks. To achieve that we propose to introduce a Configuration Agent in the network, an entity that continuously monitors the network to detect changes and automatically update the configuration to adapt to such changes while maintaining desired quality of service. We present here the complete framework for the Configuration Agent that will provide self-configuration capabilities to real-time networks. The proposed framework has IEEE 802.1 as its core, but also shows how the set of standards need to be extended in order to achieve the self-configuration requirements. Concretely we examine the role of existing communication protocols like NETCONF and OPC-UA and propose the essential ingredients (managed objects) for a YANG model for the learning aspects in the bridges, including different working modes.

  • 32.
    Gutiérrez, Marina
    et al.
    TTTech Computertechnik AG, Austria.
    Steiner, Wilfried
    TTTech Computertechnik AG, Austria.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A Configuration Agent based on the Time Triggered Paradigm for Real-Time Networks2015In: IEEE International Workshop on Factory Communication Systems - Proceedings, WFCS, 2015, Vol. Article number 7160584Conference paper (Refereed)
    Abstract [en]

    Distributed cyber-physical systems are growing in size and functionality and deterministic communication is an important requirement for those systems. The existing solutions based on the time-triggered paradigm pose certain limitations in regards to the configuration. Usually configuration is seen as a one-time event during the installation of the network. Future realtime networks need to be able to adapt more easily to changes in the network. Thus, the configuration becomes an ongoing service, e.g., as for network maintenance and re-configuration to add and remove new, respectively old, equipment. We postulate that configuration will emerge to a continued service that accompanies a real-time network throughout its different life-cycle phases. In this context of evolving and dynamic networks, we introduce the concept of a configuration agent for real-time networks and demonstrate the concept by a realization based on the time triggered paradigm.

  • 33.
    Gutiérrez, Marina
    et al.
    TTTech Computertechnik AG, Austria.
    Steiner, Wilfried
    TTTech Computertechnik AG, Austria.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Learning the Parameters of Periodic Traffic based on Network Measurements2015In: Measurements & Networking M&N 2015, 2015, p. 100-115Conference paper (Refereed)
    Abstract [en]

    The configuration of real-time networks is one of the most challenging demands of the Real-Time Internet-of-Things trend, where the network has to be deterministic and yet flexible enough to adapt to changes through its life-cycle. To achieve this we have outlined an approach that learns the necessary configuration parameters from network measurements, that way providing a continuous configuration service for the network. First, the network is monitored to obtain traffic measurements. Then traffic parameters are derived from those measurements. Finally, a new time-triggered schedule is produced with which the network will be reconfigured. In this paper we propose an analysis based on measurements to obtain the specific traffic parameters and we evaluate it through network simulations. The results show that the configuration parameters can be learned from the measurements with enough accuracy and that those measurements can be easily obtained through network monitoring.

  • 34.
    Isovic, Damir
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Mapping Complex Timing Constraints to Simple Real-Time Scheduling Parameters2010In: 15th International Conference on Emerging Technologies and Factory Automation, WiP, Bilbao, Spain, 2010Conference paper (Refereed)
    Abstract [en]

    In this paper, we propose a novel approach for flexible representation of complex timing constraints for scheduling real-time tasks under different scheduling paradigms. It allows different instantiations of the task attributes, depending on which underlying scheduling policy is used. Scheduling parameters are flexibly derived from original timing constrains, rather than using the same set of task attributes for all schedulers. For each real-time task in the system, temporal feasibility windows are identified, such that if the task executes and completes within its feasibility window, the original timing constraints will be met. Then, scheduler dependent parameters are derived to guarantee the tasks' execution and completion within their feasibility windows.

  • 35.
    Lisova, Elena
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Gutiérrez, Marina
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Steiner, Wilfried
    TTTech Computertechnik AG, Austria.
    Uhlemann, Elisabeth
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Åkerberg, Johan
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Björkman, Mats
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Protecting Clock Synchronization: Adversary Detection through Network Monitoring2016In: Journal of Electrical and Computer Engineering, ISSN 2090-0147, E-ISSN 2090-0155, article id 6297476Article in journal (Refereed)
    Abstract [en]

    Today, industrial networks are often used for safetycritical applications with real-time requirements. The architecture of such applications usually has a time-triggered nature that has message scheduling as a core property. Real-time scheduling can be applied only in networks where nodes share the same notion of time, i.e., they are synchronized. Therefore, clock synchronization is one of the fundamental assets of industrial networks with real-time requirements. However, standards for clock synchronization, i.e., IEEE 1588, do not provide the required level of security. This raises the question about clock synchronization protection. In this paper we identify a way to break synchronization based on the IEEE 1588 standard by conducting a man-in-the-middle (MIM) attack followed by a delay attack. MIM attack can be accomplished through e.g., Address Resolution Protocol (ARP) poisoning. Using AVISPA tool we evaluate the potential to perform an ARP poisoning attack. Next, an analysis of the consequences of introducing delays is made, showing both that the attack can, indeed, break clock synchronization and that some design choices, such as a relaxed synchronization condition mode, delay bounding and using knowledge of environmental conditions, can be made to make the network more robust/resilient against these kinds of attacks. Lastly, network monitoring is proposed as a technique to detect anomalies introduced by an adversary performing attacks targeting clock synchronization. The monitoring capabilities are added to the network using a Configuration Agent, which, based on data obtained from the network, is able to detect an attack. The main contribution of the paper is a detailed problem description and evaluation of a security vulnerability in IEEE 1588 against delay attacks together with an evaluation of several approaches as possible mitigation techniques for the attack.

  • 36.
    Markovic, Filip
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Carlson, Jan
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A Comparison of Partitioning Strategies for Fixed Points-based Limited Preemptive Scheduling2019In: IEEE Transactions on Industrial Informatics, ISSN 1551-3203, E-ISSN 1941-0050, Vol. 15, no 2, p. 1070-1081Article in journal (Refereed)
    Abstract [en]

    The increasing industrial demand for handling complex functionalities has influenced the design of hardware architectures for time critical embedded systems, during the past decade. Multi-core systems facilitate the inclusion of many complex functionalities, while, at the same time, inducing cache related overheads, as well as adding partitioning complexity to the overall system schedulability. One of the efficient paradigms for controlling and reducing the cache related costs in real-time systems is Limited Preemptive Scheduling (LPS), with its particular instance Fixed Preemption Points Scheduling (LP-FPPS), that has been shown to outperform other alternatives as well as has been supported by and investigated in the automotive domain. With respect to the partitioning constraints, Partitioned Scheduling has been widely used to pre-runtime allocate tasks to specific cores, resulting in a predictable cache-related preemption delays estimations. In this paper we propose to integrate LP-FPPS and Partitioned Scheduling on fixed-priority multicore real-time systems in order to increase the overall system schedulability.We define a new joint approach for task partitioning and preemption point selection, that is based on the computation of the maximum blocking tolerance upon each allocation, thus being able to quantify the schedulability of the taskset on each processor. Furthermore, we investigate partitioning strategies based on different heuristics, i.e. First Fit Decreasing and Worst Fit Decreasing, and priority and density taskset orderings. The evaluation performed on randomly generated tasksets shows that in the general case, no single partitioning strategy fully dominates the others. However, the evaluation results reveal that certain partitioning strategies perform significantly better with respect to the overall schedulability for specific taskset characteristics. The results also reveal that the proposed partitioning strategies outperform Fully Preemptive and Non-Preemptive partitioned scheduling in terms of successful partitioning.

  • 37.
    Markovic, Filip
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Carlson, Jan
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Improved Cache-Related Preemption Delay Estimation for Fixed Preemption Point Scheduling2018In: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Volume 10873, 2018, Vol. 10873, p. 87-101Conference paper (Refereed)
    Abstract [en]

    Cache-Related Preemption Delays (CRPD) can significantly increase tasks’ execution time in preemptive real-time scheduling, potentially jeopardising the system schedulability. In order to reduce the cumulative CRPD, Limited Preemptive Scheduling (LPS) has emerged as a scheduling approach which limits the maximum number of preemptions encountered by real-time tasks, thus decreasing CRPD compared to fully preemptive scheduling. Furthermore, an instance of LPS, called Fixed Preemption Point Scheduling (LP-FPP), defines the exact points where the preemptions are permitted within a task, which enables a more precise CRPD estimation. The majority of the research, in the domain of LP-FPP, estimates CRPD with pessimistic upper bounds, without considering the possible sources of over-approximation: 1) accounting for the infeasible preemption combinations, and 2) accounting for the infeasible cache block reloads. In this paper, we improve the analysis by accounting for those two cases towards a more precise estimation of the CRPD upper bounds. The evaluation of the approach on synthetic tasksets reveals a significant reduction of the pessimism in the calculation of the CRPD upper bounds, compared to the existing approaches.

  • 38.
    Markovic, Filip
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Carlson, Jan
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Preemption Point Selection in Limited Preemptive Scheduling using Probabilistic Preemption Costs2016In: 28th Euromicro Conference on Real-Time Systems ECRTS'16, 2016Conference paper (Refereed)
    Abstract [en]

    Limited Preemptive Scheduling is an attractive paradigm that enables controlling preemption related overheads, by appropriate preemption point selection. The selection of preemption points is essential to ensure schedulability and the associated analysis accounts for upper bounded preemption overheads, thus introducing a potentially high level of pessimism in the results. In this paper we propose a probabilistic distribution model of preemption related overhead and an accompanying method for preemption point selection based on quantiles, which provides controllable probabilistic relaxations. An experimental evaluation demonstrates the improvement of the extent to which this new approach facilitates finding solutions to the preemption point selection problem.

  • 39.
    Markovic, Filip
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Carlson, Jan
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Tightening the Bounds on Cache-Related Preemption Delay in Fixed Preemption Point Scheduling2017In: OpenAccess Series in Informatics, 2017, Vol. 57, p. 41-411Conference paper (Refereed)
    Abstract [en]

    Limited Preemptive Fixed Preemption Point scheduling (LP-FPP) has the ability to decrease and control the preemption-related overheads in the real-time task systems, compared to other limited or fully preemptive scheduling approaches. However, existing methods for computing the preemption overheads in LP-FPP systems rely on over-approximation of the evicting cache blocks (ECB) calculations, potentially leading to pessimistic schedulability analysis. In this paper, we propose a novel method for preemption cost calculation that exploits the benefits of the LP-FPP task model both at the scheduling and cache analysis level. The method identifies certain infeasible preemption combinations, based on analysis on the scheduling level, and combines it with cache analysis information into a constraint problem from which less pessimistic upper bounds on cache-related preemption delays (CRPD) can be derived. The evaluation results indicate that our proposed method has the potential to significantly reduce the upper bound on CRPD, by up to 50% in our experiments, compared to the existing over-approximating calculations of the eviction scenarios.

  • 40.
    Markovic, Filip
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Carlson, Jan
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Thekilakkattil, Abhilash
    Ericsson, Stockholm, Sweden.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lisper, Björn
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Probabilistic Response Time Analysis for Fixed Preemption Point Selection2018In: 13th International Symposium on Industrial Embedded Systems SIES '18, 2018, article id 8442099Conference paper (Refereed)
    Abstract [en]

    Preemption point selection has a significant impact on the schedulability of Real-Time tasks under the Fixed Preemption Point approach in Limited Preemptive Scheduling. Many real time systems can occasionally tolerate deadline misses as long as their occurrence does not exceed a specified probabilistic threshold. However, the existing approaches for preemption point selection are inappropriate for such systems, as they are mainly aiming to provide hard guarantees, considering worst case (upper bounded) preemption overheads. Additionally, the worst case preemption overheads typically occur with very low probabilities. In this paper, we propose a novel preemption point selection approach, and an associated probabilistic response time analysis, considering preemption related overheads modelled as probabilistic distributions. The method is suitable for providing solutions in systems that can occasionally tolerate deadline misses and can be interesting in the context of mixed criticality systems. Our method is able to find solutions, in terms of preemption point selections, in all cases where the existing approaches do. Moreover, it provides preemption point selections for additional tasksets that guarantees the overall taskset schedulability with a certain probability. The evaluation results show an improvement with respect to increasing the number of tasksets for which a preemption point selection is possible compared to existing, upper-bound based, selection approaches. The results show that the deadline miss probabilities of the tasksets and associated preemption point selections are considerably low.

  • 41.
    Ramaprasad, Harini
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Proceedings of the First International Workshop on Energy Aware Design and Analysis of Cyber Physical Systems (WEA-CPS'10)2010Other (Other academic)
    Abstract [en]

    Cyber-physical systems (CPS) take computation, communication, monitoring and control to a new level of complexity due to their inherent integration with each other and the physical world. Energy efficiency is paramount in such systems since high energy consuming hardware components are envisioned to be deeply embedded within the physical environment, thus calling for the need to incorporate energy awareness into the design and analysis of a CPS rather than as an afterthought. Solutions must reach beyond those for stand-alone real-time systems or homogeneous sensor-networks, to be able to reason about heterogeneous systems of systems integrated at multiple levels, while guaranteeing their safety-critical requirements. This workshop calls for papers that seek to rethink the notion of energy and power awareness, at the device, architectural or operating system (scheduling) levels, in the context of CPS design and analysis.

  • 42.
    Schmidt, Heinz
    et al.
    Computer Science and IT, RMIT University, Melbourne, AUSTRALIA.
    Peak, Ian
    Computer Science and IT, RMIT University, Melbourne, AUSTRALIA.
    Aysan, Hüseyin
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering. IS (Embedded Systems).
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Towards Probabilistic Mode Automata for Adaptable Resource-Aware Component-Based Systems Design2012In: Engineering for Success: The Future is Now!: Proceedings of the Improving Systems and Software Engineering Conference incorporating SEPGSMAsia-Pacific Conference 2012, 2012Conference paper (Refereed)
    Abstract [en]

    Embedded systems design, configuration, deployment and runtime management are extremely challenging. The pervasiveness of embedded systems, and their increasing parallelism and scale in number of networked and interacting hardwaresoftware components, has been coupled with increases in the number of functions and the variation in behaviour and characteristics of these functions. Adoption of new international safety standards and higher best practice levels in large manufacturer subcontracting policies however mandates strict quality and at times even stricter dependability and sustainability (in particular energy efficiency) requirements. In recent work we have extended our rich architecture definition language (RADL) and underlying theory to meet such industrial requirements. In this paper we describe a new approach and design model targeting hybrid designer- and operator-defined performance budgets for timing and energy consumption. We give a running example designing a sample embedded multi-media system, a modern digital camera. The model caters for true parallelism, probabilistic performance characterisation, parameterised architectural variation, compositionality, and runtime reconfiguration. The theory is based on hybrid, hierarchical, performance-annotated parallel automata and Petri nets. We also briefly summarise our tool set used to derive the example.

  • 43.
    Shah, M. B. N.
    et al.
    Universiti Teknikal Malaysia, Durian Tunggal, Malaysia .
    Husain, A. R.
    Universiti Teknologi Malaysia, Skudai, Malaysia .
    Aysan, Huseyin
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, S.
    Institute of Technology and Science, Pilani, India.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Bender, F. A.
    Universidade de Caxias do Sul, Caxias do Sul, Brazil .
    Error Handling Algorithm and Probabilistic Analysis Under Fault for CAN-Based Steer-by-Wire System2016In: IEEE Transactions on Industrial Informatics, ISSN 1551-3203, E-ISSN 1941-0050, Vol. 12, no 3, p. 1017-1034, article id 7435293Article in journal (Refereed)
    Abstract [en]

    This paper proposes an efficient way to handle fault in controller area network (CAN)-based networked control system (NCS). A fault in a bus line of CAN will induce a data error which will result in data dropout or time delay, and subsequently may lead to performance degradation or system instability. A strategy to handle fault occurrence in CAN bus is proposed to properly analyze the effect of the fault to CAN-based NCS performance. The fault occurrences are modeled based on fault interarrival time, fault bursts' duration, and Poisson law. Using fault and messages' attributes, response time analysis (RTA) is performed and the probability of control message missing its deadline is calculated. Utilizing the new error handling algorithm to replace the native error handling of CAN, the probability of a control message missing its deadline can be translated into the probability of data dropout for control message. This methodology is evaluated using steer-by-wire system of vehicle to analyze the effect of fault occurrences in CAN. It is found that the proposed error handling mechanism has resulted in better NCS performance and the range of data dropout probability for control message also could be obtained, which serves as crucial input for NCS controller design.

  • 44.
    Shah, M. B. N.
    et al.
    Universiti Teknikal Malaysia.
    Husain, A. R.
    Universiti Teknologi Malaysia.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    A new error handling algorithm for controller area network in networked control system2013In: Computers in industry (Print), ISSN 0166-3615, E-ISSN 1872-6194, Vol. 64, no 8, p. 984-997Article in journal (Refereed)
    Abstract [en]

    An effective error handling mechanism plays an important role to ensure the reliability and robustness of the application of controller area network (CAN) in controlling dynamic systems. This paper addresses a new online error handling approach or named per-sample-error-counting (PSeC) technique that tends to replace native error handling protocol in controller area network (CAN). The mechanism is designed to manage transmission errors of both sensor and control data in networked control system (NCS) used in controlling dynamic system such that the stability of the feedback system is preserved. A new parameter denoted as maximum allowable number of error burst (MAEB) is introduced in which MAEB is selected based on available bandwidth of the CAN network. MAEB serves as the maximum number of attempt of re-transmission of erroneous data per sample which allows the maximum transmission period to be known and guaranteed for time-critical control system. The efficacy of the proposed method is verified by applying the algorithm on the fourth order inverted pendulum system simulated on Matlab/Truetime simulator and the performance is benchmarked with the existing CAN error management protocol. The simulation run under various systems conditions demonstrate that the proposed method results in superior system performance in handling data transmission error as well as meeting control system requirement. © 2013 Elsevier B.V.

  • 45.
    Srinivasan, Jayakanth
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Lundqvist, Kristina
    Mälardalen University, School of Innovation, Design and Engineering.
    ‘State of the Art’ in Using Agile Methods for Embedded Systems Development2009In: Industrial Experience in Embedded Systems Design (IEESD 2009), 2009, p. 1195-1200Conference paper (Refereed)
    Abstract [en]

    Agile methods hold a significant promise to reduce cycle times and provide greater value to all key stakeholders involved in the software ecosystem. While these methods appear to be well suited for embedded systems development, their use has not become a widespread practice. In analyzing the state-of-the-art, as captured in published literature, we found that there are technical issues (requirements management, and testing), as well as organizational issues (process tailoring, knowledge sharing & transfer, culture change, and support infrastructure). In this paper, we build preliminary guidance for firms around these six areas and presented as a framework that will enable understanding the expected adoption trajectory.

  • 46.
    Thekilakkattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering.
    Aysan, Hüseyin
    Mälardalen University, School of Innovation, Design and Engineering.
    Optimizing the Fault Tolerance Capabilities of Distributed Real-Time Systems2009In: 14th International Conference on Emerging Technologies and Factory Automation, WiP, 2009Conference paper (Refereed)
    Abstract [en]

    Industrial real-time systems typically have to satisfy complex requirements, mapped to the task attributes, eventually guaranteed by a fixed priority scheduler in a distributed environment. These systems consist of a mix of hard and soft tasks with varying criticality, as well as associated fault tolerance requirements. Time redundancy techniques are often preferred in industrial applications and, hence, it is extremely important to devise resource efficient methodologies for scheduling real-time tasks under failure assumptions. In this paper, we propose a methodology to provide a priori guarantees in distributed real-time systems with redundancy requirements. We do so by identifying temporal feasibility windows for all task executions and re-executions, as well as allocating them on different processing nodes. We then use optimization theory to derive the optimal feasibility windows that maximize the utilization on each node, while avoiding overloads. Finally on each node, we use Integer Linear Programming (ILP) to derive fixed priority task attributes that guarantee the task executions within the derived feasibility windows, while keeping the associated costs minimized.

  • 47.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Baruah, Sanjoy
    University of North Carolina at Chapel Hill, USA.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    The Global Limited Preemptive Earliest Deadline First Feasibility of Sporadic Real-time Tasks2014In: Proceedings - Euromicro Conference on Real-Time Systems, 21 October 2014, 2014, p. 301-310Conference paper (Refereed)
    Abstract [en]

    The feasibility of preemptive and non-preemptivescheduling has been well investigated on uniprocessor and multiprocessor platforms under both Fixed Priority Scheduling(FPS) and Earliest Deadline First (EDF) paradigms. While feasibility of limited preemptive scheduling under FPS has been addressed on both uniprocssor and multiprocessor platforms,under EDF it has been investigated only on uniprocessors, and a similar analysis for multiprocessor platforms is still missing.In this paper, we introduce global Limited Preemptive Earliest Deadline First (g-LP-EDF) scheduling, and propose the associated feasibility analysis to complete the above described feasibility analysis spectrum. Specifically, we derive a sufficient condition that guarantees g-LP-EDF feasibility of sporadic real timetasks which directly provides a global Non-Preemptive Earliest Deadline First (g-NP-EDF) feasibility test. We then study the interplay between g-LP-EDF feasibility and processor speed, in order to quantify the sub-optimality of g-NP-EDF in terms of the minimum speed-up required to guarantee g-NP-EDF feasibility of all feasible tasksets. The results presented in this paper complement our previous results on uniprocessors, and provide a unified result on the sub-optimality of non-preemptive EDF on both uniprocessor and multiprocessor platforms.

  • 48.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Burns, Alan
    University of York, UK.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Birla Institute of Technology and Science, India.
    Mixed Criticality Systems: Beyond Transient Faults2015In: WMC 2015: Proceedings of the 3rd International Workshop on Mixed Criticality Systems, 2015Conference paper (Refereed)
    Abstract [en]

    Adopting mixed-criticality architectures enable safe sharing of computational resources between tasks of different criticalities consequently leading to reduced Size, Weight and Power (SWaP) requirements. A majority of the research in mixed-criticality systems focuses on scheduling tasks whose Worst Case Execution Times (WCETs) are certified to varying levels of assurances. If any given task overruns its WCET, the system switches to a higher criticality and all the lower criticality tasks are discarded to make time for the execution of higher criticality tasks. Task execution time overruns are transient faults that are typically tolerated by simply executing an alternate task before the original deadline, or, by discarding the failed task to prevent it from interfering with higher criticality tasks. However, permanent faults such as processor failures can render the system to be useless, many times leading to unsafe states. In this paper we present a taxonomy of fault tolerance techniques to tolerate permanent faults, as well as map it to real-time mixed-criticality requirements based on the extend of fault coverage that in turn influences the associated assurance.

  • 49.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Davis, Rob
    University of York, UK.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Birla Institute of Technology and Science, India.
    Bertogna, Marko
    University of Modena, Italy.
    Multiprocessor Fixed Priority Scheduling with Limited Preemptions2015In: ACM International Conference Proceeding Series, Volume 04-06, 2015, p. 13-22Conference paper (Refereed)
    Abstract [en]

    Challenges associated with allowing preemptions and migrations are compounded in multicore systems, particularly under global scheduling policies, because of the potentially high overheads. For example, multiple levels of cache greatly increase preemption and migration related overheads as well as the difficulty involved in accurately accounting for them, leading to substantially inflated worst-case execution times. Preemption and migrations related overheads can be significantly reduced, both in number and in size, by using fixed preemption points in the tasks' code; thus dividing each task into a series of non-preemptive regions. This leads to an additional consideration in the scheduling policy. When a high priority task is released and all of the processors are executing non-preemptive regions of lower priority tasks, then there is a choice to be made in terms of how to manage the next preemption. With an eager approach the first lower priority task to reach a preemption point is preempted even if it is not the lowest priority running task. Alternatively, with a lazy approach, preemption is delayed until the lowest priority currently running task reaches its next preemption point. In this paper, we show that under global fixed priority scheduling with eager preemptions each task suffers from at most a single priority inversion each time it resumes execution. Building on this observation, we derive a new response time based schedulability test for tasks with fixed preemption points. Experimental evaluations show that global fixed priority scheduling with eager preemptions is significantly more effective than with lazy preemption using link based scheduling in terms of task set schedulability.

  • 50.
    Thekkilakattil, Abhilash
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dobrin, Radu
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Punnekkat, Sasikumar
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Bounding the effectiveness of temporal redundancy in fault-tolerant real-time scheduling under error bursts2014In: 19th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2014, 2014, p. Article number 7005170-Conference paper (Refereed)
    Abstract [en]

    Reliability is a key requirement in many distributed real-time systems deployed in safety and mission critical applications, and temporal redundancy is a widely employed strategy towards guaranteeing it. The temporal redundancy approach is typically based on task re-executions in form of entire tasks, task alternates or, check-pointing blocks, and each of the re-execution strategies have different impacts on the Fault Tolerance feasibility (FT-feasibility) of the system, which is traditionally defined as the existence of a schedule that guarantees timeliness of all tasks under a specified fault hypothesis. In this paper, we propose the use of resource augmentation to quantify the FT-feasibility of real-time task sets and use it to derive limits on the effectiveness of temporal redundancy in fault-tolerant real-time scheduling under error bursts of bounded lengths. We derive the limits for the general case, and then show that for the specific case when the error burst length is no longer than half the shortest deadline, the lower limit on the effectiveness of temporal redundancy is given by the resource augmentation bound 2, while, the corresponding upper-limit is 6. Our proposed approach empowers a system designer to quantify the effectiveness of a particular implementation of temporal redundancy. 

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