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  • 1.
    Abbaneo, Chiara
    et al.
    Ansaldo STS, Italy.
    Flammini, Francesco
    Ansaldo STS, Italy ; University of Naples ”Federico II”, Italy.
    Lazzaro, Armando
    Ansaldo STS, Italy.
    Marmo, Pietro
    Ansaldo STS, Italy.
    Mazzocca, Nicola
    Université “Federico II” di Napoli, Italy.
    Sanseviero, Angela
    Ansaldo STS, Italy.
    UML based reverse engineering for the verification of railway control logics2007In: Proceedings of International Conference on Dependability of Computer Systems, DepCoS-RELCOMEX 2006, IEEE , 2007, p. 3-10Conference paper (Refereed)
    Abstract [en]

    The Unified Modeling Language (UML) is widely used as a high level object oriented specification language. In this paper we present a novel approach in which reverse engineering is performed using UML as the modelling language used to achieve a representation of the implemented system. The target is the core logic of a complex critical railway control system, which was written in an application specific legacy language. UML perfectly suited to represent the nature of the core logic, made up by concurrent and interacting processes, using a bottom-up approach and proper modeling rules. Each process, in fact, was strictly related to the management of a physically (resp. logically) well distinguished railway device (resp. functionality). The obtained model deeply facilitated the static analysis of the logic code, allowing for at a glance verification of correctness and compliance with higher-level specifications, and opened the way to refactoring and other formal analyses. © 2006 IEEE.

  • 2.
    Abbas, Muhammad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. RISE Research Institutes of Sweden.
    Requirements-Level Reuse Recommendation and Prioritization of Product Line Assets2021Licentiate thesis, comprehensive summary (Other academic)
    Abstract [en]

    Software systems often target a variety of different market segments. Targeting varying customer requirements requires a product-focused development process. Software Product Line (SPL) engineering is one possible approach based on reuse rationale to aid quick delivery of quality product variants at scale. SPLs reuse common features across derived products while still providing varying configuration options. The common features, in most cases, are realized by reusable assets. In practice, the assets are reused in a clone-and-own manner to reduce the upfront cost of systematic reuse. Besides, the assets are implemented in increments, and requirements prioritization also has to be done. In this context, the manual reuse analysis and prioritization process become impractical when the number of derived products grows. Besides, the manual reuse analysis process is time-consuming and heavily dependent on the experience of engineers.

    In this licentiate thesis, we study requirements-level reuse recommendation and prioritization for SPL assets in industrial settings. We first identify challenges and opportunities in SPLs where reuse is done in a clone-and-own manner.  We then focus on one of the identified challenges: requirements-based SPL assets reuse and provide automated support for identifying reuse opportunities for SPL assets based on requirements. Finally, we provide automated support for requirements prioritization in the presence of dependencies resulting from reuse.

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  • 3.
    Abbaspour Asadollah, Sara
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Concurrency Bugs: Characterization, Debugging and Runtime Verification2018Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    Concurrent software has been increasingly adopted in recent years, mainly due to the introduction of multicore platforms. However, concurrency bugs are still difficult to test and debug due to their complex interactions involving multiple threads (or tasks). Typically, real world concurrent software has huge state spaces. Thus, testing techniques and handling of concurrency bugs need to focus on exposing the bugs in this large space. However, existing solutions typically do not provide debugging information to developers (and testers) for understanding the bugs.

    Our work focuses on improving concurrent software reliability via three contributions: 1) An investigation of concurrent software challenges with the aim to help developers (and testers) to better understand concurrency bugs. We propose a classification of concurrency bugs and discuss observable properties of each type of bug. In addition, we identify a number of gaps in the body of knowledge on concurrent software bugs and their debugging. 2) Exploring concurrency related bugs in real-world software with respect to the reproducibility of bugs, severity of their consequence and effort required to fix them. Our findings here is that concurrency bugs are different from other bugs in terms of their fixing time and severity, while they are similar in terms of reproducibility. 3) A model for monitoring concurrency bugs and the implementation and evaluation of a related runtime verification tool to detect the bugs. In general, runtime verification techniques are used to (a) dynamically verify that the observed behaviour matches specified properties and (b) explicitly recognize understandable behaviors in the considered software. Our implemented tool is used to detect concurrency bugs in embedded software and is in its current form tailored for the FreeRTOS operating system. It helps developers and testers to automatically identify concurrency bugs and subsequently helps to reduce their finding and fixing time.

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  • 4.
    Abbaspour Asadollah, Sara
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sundmark, Daniel
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Eldh, S.
    Ericsson AB, Kista, Sweden.
    Hansson, Hans
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A Runtime Verification Tool for Detecting Concurrency Bugs in FreeRTOS Embedded Software2018In: Proceedings - 17th International Symposium on Parallel and Distributed Computing, ISPDC 2018, Institute of Electrical and Electronics Engineers Inc. , 2018, p. 172-179, article id 8452035Conference paper (Refereed)
    Abstract [en]

    This article presents a runtime verification tool for embedded software executing under the open source real-time operating system FreeRTOS. The tool detects and diagnoses concurrency bugs such as deadlock, starvation, and suspension based-locking. The tool finds concurrency bugs at runtime without debugging and tracing the source code. The tool uses the Tracealyzer tool for logging relevant events. Analysing the logs, our tool can detect the concurrency bugs by applying algorithms for diagnosing each concurrency bug type individually. In this paper, we present the implementation of the tool, as well as its functional architecture, together with illustration of its use. The tool can be used during program testing to gain interesting information about embedded software executions. We present initial results of running the tool on some classical bug examples running on an AVR 32-bit board SAM4S. 

  • 5.
    Abbaspour, Sara
    et al.
    Massachusetts Gen Hosp, Dept Neurol, Boston, MA 02114 USA.;Harvard Med Sch, Div Sleep Med, Boston, MA 02114 USA..
    Naber, Autumn
    Ctr Bion & Pain Res, S-43180 Molndal, Sweden.;Chalmers Univ Technol, Dept Elect Engn, S-41296 Gothenburg, Sweden..
    Ortiz-Catalan, Max
    Ctr Bion & Pain Res, S-43180 Molndal, Sweden.;Chalmers Univ Technol, Dept Elect Engn, S-41296 Gothenburg, Sweden.;Sahlgrens Univ Hosp, Operat Area 3, S-43180 Molndal, Sweden.;Univ Gothenburg, Sahlgrenska Acad, Inst Clin Sci, Dept Orthopaed, S-43180 Molndal, Sweden..
    GholamHosseini, Hamid
    Auckland Univ Technol, Dept Elect & Elect Engn, Auckland 1010, New Zealand..
    Lindén, Maria
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Real-Time and Offline Evaluation of Myoelectric Pattern Recognition for the Decoding of Hand Movements2021In: Sensors, E-ISSN 1424-8220, Vol. 21, no 16, article id 5677Article in journal (Refereed)
    Abstract [en]

    Pattern recognition algorithms have been widely used to map surface electromyographic signals to target movements as a source for prosthetic control. However, most investigations have been conducted offline by performing the analysis on pre-recorded datasets. While real-time data analysis (i.e., classification when new data becomes available, with limits on latency under 200-300 milliseconds) plays an important role in the control of prosthetics, less knowledge has been gained with respect to real-time performance. Recent literature has underscored the differences between offline classification accuracy, the most common performance metric, and the usability of upper limb prostheses. Therefore, a comparative offline and real-time performance analysis between common algorithms had yet to be performed. In this study, we investigated the offline and real-time performance of nine different classification algorithms, decoding ten individual hand and wrist movements. Surface myoelectric signals were recorded from fifteen able-bodied subjects while performing the ten movements. The offline decoding demonstrated that linear discriminant analysis (LDA) and maximum likelihood estimation (MLE) significantly (p < 0.05) outperformed other classifiers, with an average classification accuracy of above 97%. On the other hand, the real-time investigation revealed that, in addition to the LDA and MLE, multilayer perceptron also outperformed the other algorithms and achieved a classification accuracy and completion rate of above 68% and 69%, respectively.

  • 6.
    Afshar, Sara
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lock-Based Resource Sharing for Real-Time Multiprocessors2017Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    Embedded systems are widely used in the industry and are typically resource constrained, i.e., resources such as processors, I/O devices, shared buffers or shared memory might be limited in the system. Hence, techniques that can enable an efficient usage of processor bandwidths in such systems are of great importance. Locked-based resource sharing protocols are proposed as a solution to overcome resource limitation by allowing the available resources in the system to be safely shared. In recent years, due to a dramatic enhancement in the functionality of systems, a shift from single-core processors to multi-core processors has become inevitable from an industrial perspective to tackle the raised challenges due to increased system complexity. However, the resource sharing protocols are not fully mature for multi-core processors. The two classical multi-core processor resource sharing protocols, spin-based and suspension-based protocols, although providing mutually exclusive access to resources, can introduce long blocking delays to tasks, which may be unacceptable for many industrial applications. In this thesis we enhance the performance of resource sharing protocols for partitioned scheduling, which is the de-facto scheduling standard for industrial real-time multi-core processor systems such as in AUTOSAR, in terms of timing and memory requirements.

     

    A new scheduling approach uses a resource efficient hybrid approach combining both partitioned and global scheduling where the partitioned scheduling is used to schedule the major number of tasks in the system. In such a scheduling approach applications with critical task sets use partitioned scheduling to achieve higher level of predictability. Then the unused bandwidth on each core that is remained from partitioning is used to schedule less critical task sets using global scheduling to achieve higher system utilization. These scheduling schema however lacks a proper resource sharing protocol since the existing protocols designed for partitioned and global scheduling cannot be directly applied due to the complex hybrid structure of these scheduling frameworks. In this thesis we propose a resource sharing solution for such a complex structure. Further, we provide the blocking bounds incurred to tasks under the proposed protocols and enhance the schedulability analysis, which is an essential requirement for real-time systems, with the provided blocking bounds.

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  • 7.
    Agha Jafari Wolde, Bahareh
    Mälardalen University, School of Innovation, Design and Engineering.
    A systematic Mapping study of ADAS and Autonomous Driving2019Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Nowadays, autonomous driving revolution is getting closer to reality. To achieve the Autonomous driving the first step is to develop the Advanced Driver Assistance System (ADAS). Driver-assistance systems are one of the fastest-growing segments in automotive electronics since already there are many forms of ADAS available. To investigate state of art of development of ADAS towards Autonomous Driving, we develop Systematic Mapping Study (SMS). SMS methodology is used to collect, classify, and analyze the relevant publications. A classification is introduced based on the developments carried out in ADAS towards Autonomous driving. According to SMS methodology, we identified 894 relevant publications about ADAS and its developmental journey toward Autonomous Driving completed from 2012 to 2016. We classify the area of our research under three classifications: technical classifications, research types and research contributions. The related publications are classified under thirty-three technical classifications. This thesis sheds light on a better understanding of the achievements and shortcomings in this area. By evaluating collected results, we answer our seven research questions. The result specifies that most of the publications belong to the Models and Solution Proposal from the research type and contribution. The least number of the publications belong to the Automated…Autonomous driving from the technical classification which indicated the lack of publications in this area. 

  • 8.
    Ahlberg, Carl
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Leon, Miguel
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ekstrand, Fredrik
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Ekström, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    The Genetic Algorithm Census TransformManuscript (preprint) (Other academic)
  • 9.
    Aissani, D.
    et al.
    University of Bejaia, Algeria.
    Flammini, Francesco
    University of Maryland University College (UMUC) Europe, Germany.
    Editorial2017In: International Journal of Critical Computer-Based Systems, ISSN 1757-8779, E-ISSN 1757-8787, Vol. 7, no 1, p. 1-3Article in journal (Other academic)
  • 10.
    Akbari, N.
    et al.
    University of Tehran, Tehran, Iran.
    Modarressi, M.
    University of Tehran, Tehran, Iran.
    Daneshtalab, Masoud
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Royal Institute of Technology (KTH), Sweden.
    Loni, Mohammad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Royal Institute of Technology (KTH), Sweden.
    A Customized Processing-in-Memory Architecture for Biological Sequence Alignment2018In: Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors, Institute of Electrical and Electronics Engineers Inc. , 2018, article id 8445124Conference paper (Refereed)
    Abstract [en]

    Sequence alignment is the most widely used operation in bioinformatics. With the exponential growth of the biological sequence databases, searching a database to find the optimal alignment for a query sequence (that can be at the order of hundreds of millions of characters long) would require excessive processing power and memory bandwidth. Sequence alignment algorithms can potentially benefit from the processing power of massive parallel processors due their simple arithmetic operations, coupled with the inherent fine-grained and coarse-grained parallelism that they exhibit. However, the limited memory bandwidth in conventional computing systems prevents exploiting the maximum achievable speedup. In this paper, we propose a processing-in-memory architecture as a viable solution for the excessive memory bandwidth demand of bioinformatics applications. The design is composed of a set of simple and lightweight processing elements, customized to the sequence alignment algorithm, integrated at the logic layer of an emerging 3D DRAM architecture. Experimental results show that the proposed architecture results in up to 2.4x speedup and 41% reduction in power consumption, compared to a processor-side parallel implementation. 

  • 11.
    Alexander, Karlsson
    Mälardalen University, School of Innovation, Design and Engineering.
    Design and Development of a Wireless Multipoint E-stop System for Autonomous Haulers2018Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Safety-related functions are important in autonomous industrial applications and are featured in an extensive body of work contained within the standards. The implementation of safety-related systems is commonly done by an external company at a great cost and with limited flexibility. Thus, the objective of this thesis was to develop and implement a safety-related system using o-the-shelf products and to analyse how well it can comply with the established standards of safety-related functions. This work has sought to review the current standards for safety-functions, the eectsof harsh radio environments on safety-related systems, and how to validate the safety-function.The system development process was used to gain knowledge by rst building the concept based on pre-study. After the pre-study was nished, the process moved to the development of software, designed to maintain a wireless heartbeat as well as to prevent collisions between the autonomous and manual-driven vehicles at a quarry, and implementation of the system in real hardware. Finally, a set of software (simulations) and hardware (measurements in an open-pit mine) tests were performed to test the functionality of the system. The wireless tests showed that the system adhered to the functional requirements set by the company, however, the evaluated performance level according to ISO 13849-1 resulted in performance level B which is insucient for a safety-related function. This work demonstrates that it is not possible to develop a safety-related system using the off-the-shelf products chosen, without hardware redundancy.

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  • 12.
    Alibegović, Dalila
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Smajlović, Lejla
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Time Sensitive Network (TSN) Configurations on Network Performance in Real-Time Communication2022Independent thesis Advanced level (degree of Master (One Year)), 10 credits / 15 HE creditsStudent thesis
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  • 13.
    Andersson, Martin
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjöström, Emil
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    COMPARISON OF TIME- AND EVENT-TRIGGERED STRATEGIES FOR WIRELESS COMMUNICATION IN EMBEDDED SYSTEMS: Design of a lab assignment for university level course on data communication in embedded systems2016Independent thesis Basic level (degree of Bachelor), 180 HE creditsStudent thesis
    Abstract [en]

    Embedded systems (ESs) and wireless technologies are in constant rapid development and therefore it is important to educate people in these subjects. This thesis work has the goal of developing a lab assignment for a university level course on data communication in embedded systems. Embedded systems have reliability and timeliness requirements that have to be fulfilled. These criteria pose problems to be addressed while ESs are used in conjunction with communication over wireless medium, which has some underlying limitations. These limitations come in the form of interference, degradation of signal strength with the distance and possible unwanted delays. This thesis work starts with a literature study on medium access control (MAC) methods and their possibilities for adoption of time-triggered and event-driven strategies for ESs with time constraints and continues with the lab assignment design, implementation and testing. Taking into account timing requirements brought by ESs and the specifics of the lab, i.e., limited time given to the students to solve the problem and compulsory usage of available lab equipment, a design with two communicating raspberry Pis was proposed. The system consists of a sensor node sending its readings to a controller, which is responsible for analyzing the data and actuating a set of LED lights as a response to the input data. The communication is done over a WiFi network and three different programs, organizing the communication in time-triggered, eventdriven or a combination of the two fashions are developed. Each program is tested under three environmental conditions and the results from these tests clearly show the limitation of the underlying CSMA/CA MAC adopted in WiFi and give a greater understanding of the advantages and disadvantages of different strategies for communication design.

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  • 14.
    Anwar, Muhammad Waseem
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Shuaib, M. T. B.
    Department of Computer and Software Engineering, College of Electrical and Mechanical Engineering, National University of Sciences and Technology (NUST), Islamabad, Pakistan.
    Azam, F.
    Department of Computer and Software Engineering, College of Electrical and Mechanical Engineering, National University of Sciences and Technology (NUST), Islamabad, Pakistan.
    Safdar, A.
    Department of Computer and Software Engineering, College of Electrical and Mechanical Engineering, National University of Sciences and Technology (NUST), Islamabad, Pakistan.
    A Model-Driven Framework for Design and Analysis of Vehicle Suspension Systems2022In: Communications in Computer and Information Science, Springer Science and Business Media Deutschland GmbH , 2022, p. 197-208Conference paper (Refereed)
    Abstract [en]

    The design and implementation of vehicle suspension systems is complex and time-consuming process that usually leads to production delays. Although different Model Driven Engineering (MDE) technologies like EAST-ADL/AUTOSAR are frequently applied to expedite vehicle development process, a framework particularly dealing with design and analysis of vehicle suspension is hard to find in literature. This rises the need of a framework that not only supports the analysis of suspension system at higher abstraction level but also complements the existing standards like EAST-ADL. In this article, a Model driven framework for Vehicle Suspension System (MVSS) is proposed. Particularly, a meta-model containing major vehicle suspension aspects is introduced. Subsequently, a modeling editor is developed using Eclipse Sirius platform. This allows the modeling of both simple as well as complex vehicle suspension systems with simplicity. Moreover, Object Constraint Language (OCL) is utilized to perform early system analysis in modeling phase. Furthermore, the target MATLAB-Simulink models are generated from source models, using model-to-text transformations, to perform advanced system analysis. The application of proposed framework is demonstrated through real life Audi A6L Hydraulic active suspension use case. The initial results indicate that proposed framework is highly effective for the design and analysis of vehicle suspension systems. In addition to this, the analysis results could be propagated to EAST-ADL toolchains to support full vehicle development workflow. 

  • 15.
    Asadi, Nima
    Mälardalen University, School of Innovation, Design and Engineering.
    Enhancing the Monitoring of Real-Time Performance in Linux2014Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    There is a growing trend in applying Linux operating system in the domain of embeddedsystems. This is due to the important features that Linux benets from, such as beingopen source, its light weight compared to other major operating systems, its adaptabilityto dierent platforms, and its more stable performance speed. However, there are up-grades that still need to be done in order to use Linux for real-time purposes. A numberof dierent approaches have been suggested in order to improve Linux's performance inreal-time environment. Nevertheless, proposing a correct-by-construction system is verydicult in real-time environment, mainly due to the complexity and unpredictability ofthem. Thus, run-time monitoring can be a helpful approach in order to provide the userwith data regarding to the actual timing behavior of the system which can be used foranalysis and modication of it. In this thesis work, a design for run-time monitoringis suggested and implemented on a real-time scheduler module that assists Linux withreal-time tasks. Besides providing crucial data regarding the timing performance of thesystem, this monitor predicts violations of timing requirements based on the currenttrace of the system performance.

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    Nima-Asadi_Thesis-Report
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  • 16.
    Asghari, S. A.
    et al.
    Kharazmi Univ, Dept Elect & Comp Engn, Tehran, Iran.
    Marvasti, M.B
    Kharazmi Univ, Dept Elect & Comp Engn, Tehran, Iran.
    Daneshtalab, Masoud
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A software implemented comprehensive soft error detection method for embedded systems2020In: Microprocessors and microsystems, ISSN 0141-9331, E-ISSN 1872-9436, Vol. 77, article id 103161Article in journal (Refereed)
    Abstract [en]

    This paper presents a comprehensive software-based technique that is capable of detecting soft errors in embedded systems. Soft errors can be categorized into Control Flow Errors (CFEs) and data errors. The CFEs change the flow of the program erroneously and data errors also change the results. In this paper, a new comprehensive method is presented to detect both (based on combination of authors’ previous works). In order to evaluate the proposed method, a new factor is defined that considers three main parameters simultaneously; namely fault coverage, memory overhead, and performance overhead. Since these parameters are very important in safety critical applications, they should be improved concurrently. The experimental results on SPEC2000 benchmarks show that the Evaluation Factor of the proposed method is 50% better than the Relationship Signatures for Control Flow Checking with Data Validation (RSCFCDV) methods, which are suggested in the literature. 

  • 17.
    Ashjaei, Mohammad
    Mälardalen University, School of Innovation, Design and Engineering. Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Multi-Hop Real-Time Communication over Switched Ethernet Technology2014Licentiate thesis, comprehensive summary (Other academic)
    Abstract [en]

    Switched Ethernet technology has been introduced to be exploited in real-time communication systems due to its features such as its high throughput and wide availability, hence being a cost-effective solution. Many real-time switched Ethernet protocols have been developed, preserving the profits of traditional Ethernet technology, to overcome the limitations imposed by using commercially available (COTS) switches. These limitations mainly originate from the non-deterministic behavior of the Ethernet switches inherent in the use of FIFO queues and a limited number of priority levels.

     

    In our research we focus on two particular real-time communication technologies, one based on COTS Ethernet switches named the FTT-SE architecture and the other using a modified Ethernet switch called the HaRTES architecture. Both architectures are based on a master-slave technique supporting different and temporally isolated traffic types including real-time periodic, real-time sporadic and non-real-time traffic. Also, they provide mechanisms implementing adaptivity as a response to the requirements imposed by dynamic real-time applications. Nevertheless, the two mentioned architectures were originally developed for a simple network consisting of a single switch, and they were lacking support for multi-hop communication. In industrial applications, multi-hop communication is essential as the networks comprise a high number of nodes, that is far beyond the capability of a single switch.

     

    In this thesis, we study the challenges of building multi-hop communication using the FTT-SE and the HaRTES architectures. We propose different architectures to provide multi-hop communication while preserving the key characteristics of the single-switch architecture such as timeliness guarantee, resource efficiency, adaptivity and dynamicity. We develop a response time analysis for each proposed architecture and we compare them to assess their corresponding benefits and limitations. Further, we develop a simulation tool to evaluate the solutions.

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  • 18.
    Ashjaei, Mohammad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Real-Time Communication over Switched Ethernet with Resource Reservation2016Doctoral thesis, monograph (Other academic)
    Abstract [en]

    Due to the need for advanced computer-controlled functionality in distributed embedded systems the requirements on network communication are becoming overly intricate. This dissertation targets the requirements that are concerned with real-time guarantees, run-time adaptation, resource utilization and flexibility during the development. The Flexible Time-Triggered Switched Ethernet (FTT-SE) and Hard Real-Time Ethernet Switching (HaRTES) network architectures have emerged as two promising solutions that can cater for these requirements. However, these architectures do not support multi-hop communication as they are originally developed for single-switch networks. This dissertation presents a fundamental contribution in multi-hop real-time communication over the FTT-SE and HaRTES architectures targeting the above mentioned requirements. It proposes and evaluates various solutions for scheduling and forwarding the traffic through multiple switches in these architectures. These solutions preserve the ability of dynamic adaptation without jeopardizing real-time properties of the architectures. Moreover, the dissertation presents schedulability analyses for the timeliness verification and evaluation of the proposed solutions as well as several protocols to support run-time adaptation in the multi-hop communication. Finally, the work led to an end-to-end resource reservation framework, based on the proposed multi-hop architectures, to support flexibility during the development of the systems. The efficiency of the proposed solutions is evaluated on various case studies that are inspired from industrial systems.

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  • 19.
    Ashjaei, Mohammad
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    End-to-end Resource Reservation Model2016Manuscript (preprint) (Other academic)
  • 20.
    Ashjaei, Seyed Mohammad Hossein
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Lo Bello, L.
    University of Catania, Italy.
    Daneshtalab, Masoud
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Patti, G.
    University of Catania, Italy.
    Saponara, S.
    University of Pisa, Italy.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Time-Sensitive Networking in automotive embedded systems: State of the art and research opportunities2021In: Journal of systems architecture, ISSN 1383-7621, E-ISSN 1873-6165, Vol. 117, article id 102137Article in journal (Refereed)
    Abstract [en]

    The functionality advancements and novel customer features that are currently found in modern automotive systems require high-bandwidth and low-latency in-vehicle communications, which become even more compelling for autonomous vehicles. In a recent effort to meet these requirements, the IEEE Time-Sensitive Networking (TSN) task group has developed a set of standards that introduce novel features in Switched Ethernet. TSN standards offer, for example, a common notion of time through accurate and reliable clock synchronization, delay bounds for real-time traffic, time-driven transmissions, improved reliability, and much more. In order to fully utilize the potential of these novel protocols in the automotive domain, TSN should be seamlessly integrated into the state-of-the-art and state-of-practice model-based development processes for automotive embedded systems. Some of the core phases in these processes include software architecture modeling, timing predictability verification, simulation, and hardware realization and deployment. Moreover, throughout the development of automotive embedded systems, the safety and security requirements specified on these systems need to be duly taken into account. In this context, this work provides an overview of TSN in automotive applications and discusses the recent technological developments relevant to the adoption of TSN in automotive embedded systems. The work also points at the open challenges and future research directions. 

  • 21.
    Asplund, Lars
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Lundqvist, Kristina
    Mälardalen University, School of Innovation, Design and Engineering.
    Safety Critical Systems Based on Formal Models2000In: ACM SIGAda Letters, ISSN 1094-3641, Vol. XX, no 4, p. 32-39Article in journal (Refereed)
    Abstract [en]

    The Ravenscar profile for high integrity systems using Ada 95 is well defined in all real-time aspects. The complexity of the run-time system has been reduced to allow full utilization of formal methods for applications using the Ravenscar profile. In the Mana project a tool set is being developed including a formal model of a Ravenscar compliant run-time system, a gnat compatible run-time system, and an ASIS based tool to allow for the verification of a system including both COTS and code that is reused.

  • 22.
    Axelsson, Jakob
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. RISE Research Institute of Sweden, Sweden.
    What Systems Engineers Should Know About Emergence2022In: INCOSE International Symposium: Special Issue 32nd Annual INCOSE International Symposium, 2022, Vol. 32:1, p. 1070-1084Conference paper (Refereed)
    Abstract [en]

    The concept of emergence refers to phenomena that occur on a system level without being present at the level of elements in the system. Since a system is created to achieve certain emergent system-level behavior, while avoiding other emergent properties, a deeper understanding of emergence is crucial to further the field of systems engineering. It has also been identified as one of the key aspects of systems-of-systems. However, the concept has been the topic of much debate in philosophy, systems science, and complexity science for a long time, and there is yet no precise characterization on which there is general agreement. In this paper, a selection of the literature on emergence is reviewed to identify some key characteristics and disputes. The various philosophical points of view are analyzed from the perspective of systems engineering, to sort out what characteristics have practical implications, and which philosophical quiddities are merely of theoretical interest. The paper also relates emergence to systems engineering practices and suggests some tactics for dealing with emergence. Key results are that the inclusion of an explicit observer is essential for understanding and handling emergence, and that emergence is closely related to the amount of information required to describe the system which is also a defining characteristic of complexity.

  • 23.
    Ayerdi, J.
    et al.
    University of Mondragon, Spain.
    Garciandia, A.
    Ikerlan.
    Arrieta, A.
    University of Mondragon, Spain.
    Afzal, Wasif
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Enoiu, Eduard Paul
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Agirre, A.
    Ikerlan.
    Sagardui, G.
    University of Mondragon, Spain.
    Arratibel, M.
    Orona.
    Sellin, O.
    Bombardier Transportation.
    Towards a Taxonomy for Eliciting Design-Operation Continuum Requirements of Cyber-Physical Systems2020In: Proceedings of the IEEE International Conference on Requirements Engineering, IEEE Computer Society , 2020, p. 280-290Conference paper (Other academic)
    Abstract [en]

    Software systems that are embedded in autonomous Cyber-Physical Systems (CPSs) usually have a large life-cycle, both during its development and in maintenance. This software evolves during its life-cycle in order to incorporate new requirements, bug fixes, and to deal with hardware obsolescence. The current process for developing and maintaining this software is very fragmented, which makes developing new software versions and deploying them in the CPSs extremely expensive. In other domains, such as web engineering, the phases of development and operation are tightly connected, making it possible to easily perform software updates of the system, and to obtain operational data that can be analyzed by engineers at development time. However, in spite of the rise of new communication technologies (e.g., 5G) providing an opportunity to acquire Design-Operation Continuum Engineering methods in the context of CPSs, there are still many complex issues that need to be addressed, such as the ones related with hardware-software co-design. Therefore, the process of Design-Operation Continuum Engineering for CPSs requires substantial changes with respect to the current fragmented software development process. In this paper, we build a taxonomy for Design-Operation Continuum Engineering of CPSs based on case studies from two different industrial domains involving CPSs (elevation and railway). This taxonomy is later used to elicit requirements from these two case studies in order to present a blueprint on adopting Design-Operation Continuum Engineering in any organization developing CPSs.

  • 24.
    Azhar, Muhammad
    Mälardalen University, School of Innovation, Design and Engineering.
    A Stochastic Analysis Framework for Real-Time Systems under Preemptive Priority-Driven Scheduling2011Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    This thesis work describes how to apply the stochastic analysis framework, presented in [1] for general priority-driven periodic real-time systems. The proposed framework is applicable to compute the response time distribution, the worst-case response time, and the deadline miss probability of the task under analysis in the fixed-priority driven scheduling system. To be specific, we modeled the task execution time by using the beta distribution. Moreover, we have evaluated the existing stochastic framework on a wide range of periodic systems with the help of defined evaluation parameters.

    In addition we have refined the notations used in system model and also developed new mathematics in order to facilitate the understanding with the concept. We have also introduced new concepts to obtain and validate the exact probabilistic task response time distribution.   

    Another contribution of this thesis is that we have extended the existing system model in order to deal with stochastic release time of a job. Moreover, a new algorithm is developed and validated using our extended framework where the stochastic dependencies exist due to stochastic release time patterns.

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    A Master Thesis Report on the Stochastic Analysis of Complex Real-Time Embedded Systems, By Muhammad Azhar
  • 25.
    Bakhshi Valojerdi, Zeinab
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Persistent Fault-Tolerant Storage at the Fog Layer2021Licentiate thesis, comprehensive summary (Other academic)
    Abstract [en]

    Clouds are powerful computer centers that provide computing and storage facilities that can be remotely accessed. The flexibility and cost-efficiency offered by clouds have made them very popular for business and web applications. The use of clouds is now being extended to safety-critical applications such as factories. However, cloud services do not provide time predictability which creates a hassle for such time-sensitive applications. Moreover, delays in the data communication between clouds and the devices the clouds control are unpredictable. Therefore, to increase predictability an intermediate layer between devices and the cloud is introduced. This layer, the Fog layer, aims to provide computational resources closer to the edge of the network. However, the fog computing paradigm relies on resource-constrained nodes, creating new potential challenges in resource management, scalability, and reliability. Solutions such as lightweight virtualization technologies can be leveraged for solving the dichotomy between performance and reliability in fog computing. In this context, container-based virtualization is a key technology providing lightweight virtualization for cloud computing that can be applied in fog computing as well. Such container-based technologies provide fault tolerance mechanisms that improve the reliability and availability of application execution.  By the study of a robotic use-case, we have realized that persistent data storage for stateful applications at the fog layer is particularly important. In addition, we identified the need to enhance the current container orchestration solution to fit fog applications executing in container-based architectures. In this thesis, we identify open challenges in achieving dependable fog platforms. Among these, we focus particularly on scalable, lightweight virtualization, auto-recovery, and re-integration solutions after failures in fog applications and nodes. We implement a testbed to deploy our use-case on a container-based fog platform and investigate the fulfillment of key dependability requirements. We enhance the architecture and identify the lack of persistent storage for stateful applications as an important impediment for the execution of control applications. We propose a solution for persistent fault-tolerant storage at the fog layer, which dissociates storage from applications to reduce application load and separates the concern of distributed storage. Our solution includes a replicated data structure supported by a consensus protocol that ensures distributed data consistency and fault tolerance in case of node failures. Finally, we use the UPPAAL verification tool to model and verify the fault tolerance and consistency of our solution.

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  • 26.
    Bakhshi Valojerdi, Zeinab
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Rodriguez-Navas, Guillermo
    Nokia Bell Labs, Israel.
    Hansson, Hans
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dependable Fog Computing: A Systematic Literature Review2019In: Proceedings - 45th Euromicro Conference on Software Engineering and Advanced Applications, SEAA 2019, 2019, p. 395-403, article id 8906732Conference paper (Refereed)
    Abstract [en]

    Fog computing has been recently introduced to bridge the gap between cloud resources and the network edge. Fog enables low latency and location awareness, which is considered instrumental for the realization of IoT, but also faces reliability and dependability issues due to node mobility and resource constraints. This paper focuses on the latter, and surveys the state of the art concerning dependability and fog computing, by means of a systematic literature review. Our findings show the growing interest in the topic but the relative immaturity of the technology, without any leading research group. Two problems have attracted special interest: guaranteeing reliable data storage/collection in systems with unreliable and untrusted nodes, and guaranteeing efficient task allocation in the presence of varying computing load. Redundancy-based techniques, both static and dynamic, dominate the architectures of such systems. Reliability, availability and QoS are the most important dependability requirements for fog, whereas aspects such as safety and security, and their important interplay, have not been investigated in depth.

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  • 27.
    Bakhshi Valojerdi, Zeinab
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Rodriguez-Navas, Guillermo
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Hansson, Hans
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Using UPPAAL to Verify Recovery in a Fault-tolerant Mechanism Providing Persistent State at the Edge2021In: 26th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2021, Västerås: Institute of Electrical and Electronics Engineers (IEEE), 2021Conference paper (Refereed)
    Abstract [en]

    In our previous work we proposed a fault-tolerant persistent storage for container-based fog architecture. We leveraged the use of containerization to provide storage as a containerized application working along with other containers. As a fault-tolerance mechanism we introduced a replicated data structure and to solve consistency issue between the replicas distributed in the cluster of nodes, we used the RAFT consensus protocol. In this paper, we verify our proposed solution using the UPPAAL model checker. We explain how our solution is modeled in UPPAAL and present a formal verification of key properties related to persistent storage and data consistency between nodes.

  • 28.
    Bankarusamy, Sudhangathan
    Mälardalen University, School of Innovation, Design and Engineering.
    Towards hardware accelerated rectification of high speed stereo image streams2017Independent thesis Advanced level (degree of Master (Two Years)), 80 credits / 120 HE creditsStudent thesis
    Abstract [en]

    The process of combining two views of a scene in order to obtain depth information is called stereo vision. When the same is done using a computer it is then called computer stereo vision. Stereo vision is used in robotic application where depth of an object plays a role. Two cameras mounted on a rig is called a stereo camera system. Such a system is able to capture two views and enable robotic application to use the depth information to complete tasks. Anomalies are bound to occur in such a stereo rig, when both the cameras are not parallel to each other. Mounting of the cameras on a rig accurately has physical alignment limitations. Images taken from such a rig has inaccurate depth information and has to be rectified. Therefore rectification is a pre-requisite to computer stereo vision. One such a stereo rig used in this thesis is the GIMME2 stereo camera system. The system has two 10 mega-pixel cameras with on-board FPGA, RAM, processor running Linux operating system, multiple Ethernet ports and an SD card feature amongst others. Stereo rectification on memory constrained hardware is a challenging task as the process itself requires both the images to be stored in the memory. The FPGA on the GIMME2 systems must be used in order to achieve the best possible speed. Programming a system that does not have a display and for used for a specific purpose is called embedded programming. The purpose of this system is distance estimation and working with such a system falls in the Embedded Systems program. This thesis presents a method that makes rectification a step ahead for this particular system. The functionality of the algorithm is shown in MATLAB and using VHDL and is compared to available tools and systems.

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    Towards Rectification on GIMME2 Sudhangathan
  • 29.
    Barzegaran, Mohammadreza
    et al.
    Tech Univ Denmark, DTU Compute, Kongens Lyngby, Denmark..
    Desai, Nitin
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Qian, Jia
    Tech Univ Denmark, DTU Compute, Kongens Lyngby, Denmark..
    Pop, Paul
    Tech Univ Denmark, DTU Compute, Kongens Lyngby, Denmark..
    Electric drives as fog nodes in a fog computing-based industrial use case2021In: The Journal of Engineering, ISSN 1872-3284, E-ISSN 2051-3305, Vol. 2021, no 12, p. 745-761Article in journal (Refereed)
    Abstract [en]

    Electric drives, which are a main component in industrial applications, control electric motors and record vital information about their respective industrial processes. The development of electric drives as Fog nodes within a fog computing platform (FCP) leads to new abilities such as programmability, analytics, and connectivity, increasing their value. In this study, the FORA FCP reference architecture is used to implement electric drives as Fog nodes, which is called "fogification". The fogified drive architecture and its components are designed using Architecture Analysis and Design Language (AADL). The design process was driven by the high-level requirements that the authors elicited. Both the fogified drive architecture and the current drive architecture are used to implement a self baggage drop system in which electric drives are the key components. The fog-based design was then evaluated using several key performance indicators (KPIs), which reveal its advantages over the current drive architecture. The evaluation results show that safety-related isolation is enabled with only 9% overhead on the total Fog node utilization, control applications are virtualized with zero input-output jitter, the hardware cost is reduced by 44%, and machine learning at the edge is performed without interrupting the main drive functionalities and with an average 85% accuracy. The conclusion is that the fog-based design can successfully implement the required electric drive functionalities and can also enable innovative uses needed for realizing the vision of Industry 4.0.

  • 30.
    Baumgart, Stephan
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Volvo Construction Equipment.
    Incorporating Functional Safety in Model-based Development of Product Lines2016Licentiate thesis, comprehensive summary (Other academic)
    Abstract [en]

    Product lines in industry are often based on an engineer’s focus on fast and feasible product instantiation rather than a precise product line development method and process as described in literature. When considering functional safety, we need a precise model that includes evidence for the safety of each variant of the product.Functional safety standards provide guidance to develop safety critical products and require that evidence is collected to prove the safety of the product. But today’s functional safety standards do not provide guidance on how to achieve functional safety in product lines. At the same time arguments need to be collected during development so that each product configuration is safe and is fulfilling the requirements of the standards. Providing these arguments requires tracing safety-related requirements and dependencies through the development process taking the impact of variability in different development artifacts into consideration.

    In this thesis, we study the challenges of developing safety critical products in product lines. We explore industrial practices to achieve functional safety standard compliance in product lines by interviewing practitioners from different companies and by collecting the reported challenges and practices. This information helps us to identify improvement areas and we derive requirements that a product line engineering method needs to fulfill. Based on these findings we analyze variability management methods from the software product line engineering research domain to identify potential candidate solutions that can be adapted to support safety critical products. We provide an approach for capturing functional safety related characteristics in a model-based product line engineering method. We apply our method in an industrial case demonstrating the applicability.

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  • 31.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Consolidating Automotive Real-Time Applications on Many-Core Platforms2017Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    Automotive systems have transitioned from basic transportation utilities to sophisticated systems. The rapid increase in functionality comes along with a steep increase in software complexity. This manifests itself in a surge of the number of functionalities as well as the complexity of existing functions. To cope with this transition, current trends shift away from today’s distributed architectures towards integrated architectures, where previously distributed functionality is consolidated on fewer, more powerful, computers. This can ease the integration process, reduce the hardware complexity, and ultimately save costs.

    One promising hardware platform for these powerful embedded computers is the many-core processor. A many-core processor hosts a vast number of compute cores, that are partitioned on tiles which are connected by a Network-on-Chip. These natural partitions can provide exclusive execution spaces for different applications, since most resources are not shared among them. Hence, natural building blocks towards temporally and spatially separated execution spaces exist as a result of the hardware architecture.

    Additionally to the traditional task local deadlines, automotive applications are often subject to timing constraints on the data propagation through a chain of semantically related tasks. Such requirements pose challenges to the system designer as they are only able to verify them after the system synthesis (i.e. very late in the design process).

    In this thesis, we present methods that transform complex timing constraints on the data propagation delay to precedence constraints between individual jobs. An execution framework for the cluster of the many-core is proposed that allows access to cluster external memory while it avoids contention on shared resources by design. A partitioning and configuration of the Network-on-Chip provides isolation between the different applications and reduces the access time from the clusters to external memory. Moreover, methods that facilitate the verification of data propagation delays in each development step are provided. 

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  • 32.
    Becker, Matthias
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Efficient Resource Management for Many-Core based Industrial Real-Time Systems2015Licentiate thesis, comprehensive summary (Other academic)
    Abstract [en]

    The increased complexity of today’s industrial embedded systems stands inneed for more computational power while most systems must adhere to a restrictedenergy consumption, either to prolong the battery lifetime or to reduceoperational costs. The many-core processor is therefore a natural fit. Due tothe simple architecture of the compute cores, and therefore their good analyzability,such processors are additionally well suited for real-time applications.In our research, we focus on two particular problems which need to be addressedin order to pave the way into the many-core era. The first area is powerand thermal aware execution frameworks, where we present different energyaware extensions to well known load balancing algorithms, allowing them todynamically scale the number of active cores depending on their workload.In contrast, an additional framework is presented which balances workloadsto minimize temperature gradients on the die. The second line of works focuseson industrial standards in the face of massively parallel platforms, wherewe address the automotive and automation domain. We present an executionframework for IEC 61131-3 applications, allowing the consolidation of severalIEC 61131-3 applications on the same platform. Additionally, we discussseveral architectural options for the AUTOSAR software architecture on suchmassively parallel platforms.

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  • 33.
    Becker, Matthias
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dasari, Dakshina
    Robert Bosch GmbH, Renningen, Germany.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Arcticus Systems AB, Järfälla, Sweden.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    End-to-End Timing Analysis of Cause-Effect Chains in Automotive Embedded Systems2017In: Journal of systems architecture, ISSN 1383-7621, E-ISSN 1873-6165, Vol. 80, no Supplement C, p. 104-113Article in journal (Refereed)
    Abstract [en]

    Automotive embedded systems are subjected to stringent timing requirements that need to be verified. One of the most complex timing requirement in these systems is the data age constraint. This constraint is specified on cause- effect chains and restricts the maximum time for the propagation of data through the chain. Tasks in a cause-effect chain can have different activation patterns and different periods, that introduce over- and under-sampling effects, which additionally aggravate the end-to-end timing analysis of the chain. Furthermore, the level of timing information available at various development stages (from modeling of the software architecture to the software implementation) varies a lot, the complete timing information is available only at the implementation stage. This uncertainty and limited timing information can restrict the end-to-end timing analysis of these chains. In this paper, we present methods to compute end-to-end delays based on different levels of system information. The characteristics of different communication semantics are further taken into account, thereby enabling timing analysis throughout the development process of such heterogeneous software systems. The presented methods are evaluated with extensive experiments. As a proof of concept, an industrial case study demonstrates the applicability of the proposed methods following a state-of-the-practice development process.

  • 34.
    Becker, Matthias
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Dasari, Dakshina
    Research and Technology Centre, Robert Bosch, India.
    Nelis, Vincent
    CISTER/INESC-TEC, ISEP, Portugal.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Pinho, Luis Miguel
    CISTER/INESC-TEC, ISEP, Portugal.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Investigation on AUTOSAR-Compliant Solutionsfor Many-Core Architectures2015In: Proceedings of the 18th Euromicro Conference on Digital System Design (DSD 2015), 2015Conference paper (Refereed)
    Abstract [en]

    As of today, AUTOSAR is the de facto standard inthe automotive industry, providing a common software architectureand development process for automotive applications. Whilethis standard is originally written for singlecore operated ElectronicControl Units (ECU), new guidelines and recommendationshave been added recently to provide support for multicore architectures.This update came as a response to the steady increase ofthe number and complexity of the software functions embedded inmodern vehicles, which call for the computing power of multicoreexecution environments. In this paper, we enumerate and analyzethe design options and the challenges of porting AUTOSAR-basedautomotive applications onto multicore platforms. In particular,we investigate those options when considering the emerging manycorearchitectures that provide a more scalable environment thanthe traditional multicore systems. Such platforms are suitableto enable massive parallel execution, and their design is moresuitable for partitioning and isolating the software components.

  • 35.
    Becker, Matthias
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sandström, Kristian
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Behnam, Moris
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A Many-Core based Execution Framework for IEC 61131-32015In: IECON 2015 - 41st Annual Conference of the IEEE Industrial Electronics Society, 2015, p. 4525-4530, article id 7392805Conference paper (Refereed)
    Abstract [en]

    Programmable logic controllers are widely used for the control of automationsystems. The standard IEC 61131-3 defines the execution model as well as theprogramming languages for such systems. Nowadays, actuators and sensorsconnect to the programmable logic controller via automation buses. While suchbuses, as well as the sensors and actuators, become more and more powerful, ashift away from the current distributed operation of automation systems, closeto the field level, becomes possible. Instead, execution of complex controlfunctions can be relocated to more powerful hardware, and technologies. Thispaper presents an execution framework for IEC 61131-3, based on a many-coreprocessors. The presented execution model exploits the characteristics of theIEC 61131-3 applications as well as the characteristics of the many-core processor,yielding a predictable execution. We present the platform architectureand an algorithm to allocate a number of IEC 61131-3 conform applications.Experimental as well as simulation based evaluation is provided.

  • 36.
    Behnam, Moris
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Inam, Rafia
    Mälardalen University, School of Innovation, Design and Engineering.
    Nolte, Thomas
    Mälardalen University, School of Innovation, Design and Engineering.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering.
    Multi-core Composability in the Face of Memory Bus Contention2012Conference paper (Refereed)
    Abstract [en]

    In this paper we describe the problem of achieving composability of independently developed real-time subsystems to be executed on a multicore platform.We evaluate existing work for achieving real-time performance on multicores and illustrate their lack with respect to composability. To better address composability we present a multi-resource server-based scheduling technique to provide predictable performance when composing multiple subsystems on a multicore platform. To achieve composability also on multicore platforms, we propose to add memory-bandwidth as an additional server resource. Tasks within our multi-resource servers are guaranteed both CPU- and memory-bandwidth; thus the performance of a server will become independent of resource usage by tasks in other servers. We are currently implementing multi-resource servers for the Enea’s OSE operating system for a P4080 8-core processor to be tested with software for a 3G-basestation.

  • 37.
    Belogiannis, Theodoros
    Mälardalen University, School of Innovation, Design and Engineering.
    Individual Stress Diagnosis from Skin Conductance sensor signals2012Independent thesis Advanced level (degree of Master (One Year)), 10 credits / 15 HE creditsStudent thesis
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  • 38.
    Berg, Tobias
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Karlström, Lars
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    The construction of a Pan-Tilt unit with two digitalcameras and a PC interface2014Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
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  • 39.
    Bergström, Henning
    Mälardalen University, School of Innovation, Design and Engineering.
    A Study on Timed Base Choice Criteria for Testing Embedded Software2016Independent thesis Basic level (degree of Bachelor), 10 credits / 15 HE creditsStudent thesis
    Abstract [en]

    Programs for Programmable Logic Controller (PLC) are often written in graphical or textual languages. Control engineers design and use them in systems where safety is vital, such as avionics, nuclear power plants or transportation systems. Malfunction of such a computer could have severe consequences, therefore thorough testing of PLCs are important. The Base Choice (BC) combination strategy was proposed as a suitable technique for testing software. Test cases are created based on BC strategy by varying the values of one parameter at a time while keeping the values of the other parameters fixed on the values in the base choice. However, this strategy might not be as effective when used on embedded software where parameters need to be set for a certain amount of time in order to trigger a certain interesting behavior. By incorporating time as another parameter when generating the tests, the goal is to create a better strategy that will increase not only code coverage but also fault detection compared to base choice strategy. Timed Base Choice (TBC) coverage criteria is an improvement upon the regular Base Choice criteria with the inclusion of time. We define TBC as follows: The base test case in timed base choice criteria is determined by the tester of the program. A criterion suggested by Ammann and Offutt is the “most likely value” from the point of view of the user. In addition, a time choice T is determined by the tester as the most likely time for keeping the base test case to the same values. From the base test case, new test cases are created by varying the interesting values of one parameter at a time, keeping the values of the other parameters fixed on the base test case. Each new test case is executed with the input values set for a certain amount of time determined by the time choice T. The time choice is given in time units. The research questions stated in this thesis are as follows: Research Question 1 (RQ1) How does Timed Base Choice tests compare to Base Choice tests in terms of decision coverage? Research Question 2 (RQ2) How does Timed Base Choice tests compare to Base Choice tests in terms of fault detection? In order to answer these questions, an empirical study was made in which 11 programs was tested along with respective test cases generated by BC and TBC. Each program was executed on a PLC along with the belonging test cases and several faulty programs (mutants). From this testing we got the corresponding decision coverage for each program achieved by BC and TBC respectively as well as a mutation score measuring how many of the mutated programs was detected and killed. We found that TBC outperformed BC testing both in terms of decision coverage and fault detection. Using TBC testing we managed to achieve full decision coverage on several programs that we were unable to achieve using regular BC. This shows that TBC is an improvement upon the regular BC in both ways, thus answering our previously stated research questions.

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    A Study on Timed Base Choice Criteria for Testing Embedded Software
  • 40.
    Berisa, Aldin
    et al.
    Mälardalen University.
    Zhao, L.
    Beihang University, Beijing, China.
    Craciunas, S. S.
    TTTech Computertechnik Ag, Vienna, Austria.
    Ashjaei, Seyed Mohammad Hossein
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Daneshtalab, Masoud
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    AVB-aware Routing and Scheduling for Critical Traffic in Time-sensitive Networks with Preemption2022In: ACM International Conference Proceeding Series, Association for Computing Machinery , 2022, p. 207-218Conference paper (Refereed)
    Abstract [en]

    The Time-Sensitive Network (TSN) amendments and protocols add capabilities on top of standard 802.1 Ethernet for guaranteeing the timeliness of both (isochronous) scheduled traffic (ST) and shaped (audio-video) communication (AVB) in distributed applications. ST streams are guaranteed via an offline computed schedule controlling the time-aware gate mechanism of IEEE 802.1Qbv, while AVB real-time streams are shaped via a credit-based shaper (CBS) and scheduler with lower-priority than ST. Although the two traffic classes use different TSN mechanisms, they are interrelated as the ST traffic class schedule influences the latency of AVB traffic. In this paper, we propose a method for the integration of the ST schedule synthesis with an analysis for the AVB class featuring IEEE 802.1Qbu frame preemption under different configurations to reduce the interference between the two classes. We first present a new worst-case response-time (WCRT) analysis for the AVB traffic class in TSN networks with preemption, considering an arbitrary number of AVB queues and different configurations for the CBS credit behavior. Then, we integrate the creation of ST schedule tables with the schedulability analysis of AVB traffic using a heuristic algorithm featuring frame preemption and a novel routing mechanism aimed at maximizing AVB schedulability. Finally, we evaluate our approach using both real-world and synthetic use cases showing the efficiency both in terms of schedule creation runtime and in terms of increasing the schedulability of lower-priority AVB traffic.

  • 41.
    Bernardi, S.
    et al.
    Centro Universitario de la Defensa Academia General Militar, Spain.
    Flammini, Francesco
    AnsaldoSTS, Business Innovation Unit, Italy.
    Marrone, S.
    Seconda Università di Napoli, Italy.
    Mazzocca, N.
    Università di Napoli “Federico II”, Italy.
    Merseguer, J.
    Universidad de Zaragoza, Spain.
    Nardone, R.
    Università di Napoli “Federico II”, Italy.
    Vittorini, V.
    Università di Napoli “Federico II”, Italy.
    Enabling the usage of UML in the verification of railway systems: The DAM-rail approach2013In: Reliability Engineering & System Safety, ISSN 0951-8320, E-ISSN 1879-0836, Vol. 120, p. 112-126Article in journal (Refereed)
    Abstract [en]

    The need for integration of model-based verification into industrial processes has produced several attempts to define Model-Driven solutions implementing a unifying approach to system development. A recent trend is to implement tool chains supporting the developer both in the design phase and V&V activities. In this Model-Driven context, specific domains require proper modelling approaches, especially for what concerns RAM (Reliability, Availability, Maintainability) analysis and fulfillment of international standards. This paper specifically addresses the definition of a Model-Driven approach for the evaluation of RAM attributes in railway applications to automatically generate formal models. For this aim we extend the MARTE-DAM UML profile with concepts related to maintenance aspects and service degradation, and show that the MARTE-DAM framework can be successfully specialized for the railway domain. Model transformations are then defined to generate Repairable Fault Tree and Bayesian Network models from MARTE-DAM specifications. The whole process is applied to the railway domain in two different availability studies. © 2013 Elsevier Ltd.

  • 42.
    Bernardi, Simona
    et al.
    Academia General Militar, Spain.
    Flammini, Francesco
    AnsaldoSTS, Italy.
    Marrone, Stefano
    Seconda Università di Napoli, Italy.
    Merseguer, José
    Universidad de Zaragoza, Spain.
    Papa, Camilla
    Università di Napoli “Federico II”, Italy.
    Vittorini, Valeria
    Università di Napoli “Federico II”, Italy.
    Model-driven availability evaluation of railway control systems2011In: Computer Safety, Reliability, and Security. SAFECOMP 2011, Springer , 2011, p. 15-28Conference paper (Refereed)
    Abstract [en]

    Maintenance of real-world systems is a complex task involving several actors, procedures and technologies. Proper approaches are needed in order to evaluate the impact of different maintenance policies considering cost/benefit factors. To that aim, maintenance models may be used within availability, performability or safety models, the latter developed using formal languages according to the requirements of international standards. In this paper, a model-driven approach is described for the development of formal maintenance and reliability models for the availability evaluation of repairable systems. The approach facilitates the use of formal models which would be otherwise difficult to manage, and provides the basis for automated models construction. Starting from an extension to maintenance aspects of the MARTE-DAM profile for dependability analysis, an automated process based on model-to-model transformations is described. The process is applied to generate a Repairable Fault Trees model from the MARTE-DAM specification of the Radio Block Centre - a modern railway controller. © 2011 Springer-Verlag.

  • 43.
    Bilic, Damir
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Managing Variability in SysML Models of Automotive Systems2020Licentiate thesis, comprehensive summary (Other academic)
    Abstract [en]

    Organizations developing software-intensive systems inevitably face increasing complexity of developed products, mainly due to rapid advancements in all domains of technology. Many such organizations are considering model-based systems engineering (MBSE) practices to cope with the increasing complexity. The use of models, as a central role during product design, promises to provide benefits such as enhanced communication among system stakeholders, continuous verification, improved design integrity, traceability between requirements and system artifacts and many more. Additionally, products are often built in many variants. That is especially obvious in the automotive domain, where customers have the ability to configure vehicles with hundreds of configuration options. To deal with the variability, a product line engineering approach is often used. It allows the development of a family of similar software-intensive systems that share a common base while being adapted to individual customer requirements.

    In this thesis, the overall goal is to evaluate and facilitate the combination of the two mentioned approaches, model-based systems engineering and product line engineering, in an industrial environment. To achieve the main thesis goal, it was divided into three separate research goals.The first goal was to identify challenges when applying an annotation-based approach for variant management in SysML models on a use case provided by Volvo Construction Equipment. The aim was to identify and understand challenges when using existing tool support to manage variants in implementation artifacts of existing products. The second research goal was to identify reuse-related challenges in the ``clone-and-own'' based development process of Volvo CE. Moreover, we assess the effects of model-based product line engineering on the identified challenges. Lastly, the third research goal was to develop an approach for consistency checking between variability- and SysML system models. To achieve that, we develop an integrated tool chain for model-based product line engineering that allows the integration of variable artifacts, which are not documented in system models, into the development process. Secondly, we define and develop an approach for consistency checking between variability models that describe the system in terms of features and implementation models that describe how variability is implemented in the product itself, since such support does not exist in current state of the art tools.

    In conclusion, based on the results from the results of case studies at Volvo CE, it was shown that model-based product line engineering has the potential to improve communication and highlight implications of variability to stakeholders (e.g. to non-technical staff), improve traceability between variability in requirements and variability in design and implementation, improve consistency through constraints between variants and automate repetitive activities.In other words, it shows potential for improving product quality while reducing the development lead time. However, the evaluation and measurement of improvement will be left for future work as measuring the product quality and lead time requires an organizational roll out of model-based product-line engineering.

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  • 44.
    Bilic, Damir
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Brosse, E.
    Softeam, Paris, France.
    Sadovykh, A.
    Softeam, Paris, France; Innopolis University, Innopolis, Russian Federation.
    Truscan, D.
    Åbo Akademi University, Turku, Finland.
    Bruneliere, H.
    IMT Atlantique, LS2N (CNRS), ARMINES, Nantes, France.
    Ryssel, U.
    Pure-systems GmBH, Magdeburg, Germany.
    An integrated model-based tool chain for managing variability in complex system design2019In: Proceedings - 2019 ACM/IEEE 22nd International Conference on Model Driven Engineering Languages and Systems Companion, MODELS-C 2019, Institute of Electrical and Electronics Engineers Inc. , 2019, p. 288-293Conference paper (Refereed)
    Abstract [en]

    Software-intensive systems in the automotive domain are often built in different variants, notably in order to support different market segments and legislation regions. Model-based concepts are frequently applied to manage complexity in such variable systems. However, the considered approaches are often focused on single-product development. In order to support variable products in a model-based systems engineering environment, we describe a tool-supported approach that allows us to annotate SysML models with variability data. Such variability information is exchanged between the system modeling tool and variability management tools through the Variability Exchange Language. The contribution of the paper includes the introduction of the model-based product line engineering tool chain and its application on a practical case study at Volvo Construction Equipment. Initial results suggest an improved efficiency in developing such a variable system. 

  • 45.
    Björklund, Emil
    et al.
    Mälardalen University, School of Innovation, Design and Engineering.
    Hjorth, Johan
    Mälardalen University, School of Innovation, Design and Engineering.
    Towards Reliable Computer Vision in Aviation: An Evaluation of Sensor Fusion and Quality Assessment2020Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
    Abstract [en]

    Research conducted in the aviation industry includes two major areas, increased safety and a reduction of the environmental footprint. This thesis investigates the possibilities of increased situational awareness with computer vision in avionics systems. Image fusion methods are evaluated with appropriate pre-processing of three image sensors, one in the visual spectrum and two in the infra-red spectrum. The sensor setup is chosen to cope with the different weather and operational conditions of an aircraft, with a focus on the final approach and landing phases. Extensive image quality assessment metrics derived from a systematic review is applied to provide a precise evaluation of the image quality of the fusion methods. A total of four image fusion methods are evaluated, where two are convolutional network-based, using the networks for feature extraction in the detailed layers. Other approaches with visual saliency maps and sparse representation are also evaluated. With methods implemented in MATLAB, results show that a conventional method implementing a rolling guidance filter for layer separation and visual saliency map provides the best results. The results are further confirmed with a subjective ranking test, where the image quality of the fusion methods is evaluated further. 

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  • 46.
    Bocchetti, Giovanni
    et al.
    Ansaldo STS, Italy.
    Flammini, Francesco
    Ansaldo STS, Italy.
    Pragliola, Concetta
    Ansaldo STS, Italy.
    Pappalardo, Alfio
    CeRICT - Centro Regionale Information Communication Technology, Italy.
    Dependable integrated surveillance systems for the physical security of metro railways2009In: 3rd ACM/IEEE International Conference on Distributed Smart Cameras, ICDSC 2009, IEEE , 2009Conference paper (Refereed)
    Abstract [en]

    Rail-based mass transit systems are vulnerable to many criminal acts, ranging from vandalism to terrorism. In this paper, we present the architecture, the main functionalities and the dependability related issues of a security system specifically tailored to metro railways. Heterogeneous intrusion detection, access control, intelligent video-surveillance and sound detection devices are integrated in a cohesive Security Management System (SMS). In case of emergencies, the procedural actions required to the operators involved are orchestrated by the SMS. Redundancy both in sensor dislocation and hardware apparels (e.g. by local or geographical clustering) improve detection reliability, through alarm correlation, and overall system resiliency against both random and malicious threats. Video-analytics is essential, since a small number of operators would be unable to visually control a large number of cameras. Therefore, the visualization of video streams is activated automatically when an alarm is generated by smart-cameras or other sensors, according to an event-driven approach. The system is able to protect stations (accesses, technical rooms, platforms, etc.), tunnels (portals, ventilation shafts, etc.), trains and depots. Presently, the system is being installed in the Metrocampania underground regional railway. To the best of our knowledge, this is the first subway security system featuring artificial intelligence algorithms both for video and audio surveillance. The security system is highly heterogeneous in terms not only of detection technologies but also of embedded computing power and communication facilities. In fact, sensors can differ in their inner hardware-software architecture and thus in the capacity of providing information security and dependability. The focus of this paper is on the development of novel solutions to achieve a measurable level of dependability for the security system in order to fulfill the requirements of the specific application. © 2009 IEEE.

  • 47.
    Brahneborg, Daniel
    et al.
    Braxo AB, S-11864 Stockholm, Sweden..
    Duvignau, Romaric
    Chalmers Tekn Hgsk, Dept Comp Sci & Engn, S-41296 Gothenburg, Sweden..
    Afzal, Wasif
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    GeoRep-Resilient Storage for Wide Area Networks2022In: IEEE Access, E-ISSN 2169-3536, Vol. 10, p. 75772-75788Article in journal (Refereed)
    Abstract [en]

    Embedded systems typically have limited processing and storage capabilities, and may only intermittently be powered on. After sending data from its sensors upstream, the system must therefore be able to trust that the data, once acknowledged, is not lost. The purpose of this work is to propose a novel solution for replicating data between the upstream nodes in such systems, with a minimal effect on the software architecture. On the assumption that there is no relative order between replicated data tuples, we designed a new replication protocol based on partial replication. Our protocol uses only 2 communication steps per data tuple, instead of the 3 to 12 used by other solutions. We verified its failover mechanism in a proof-of-concept implementation of the protocol using simulated network failures, and evaluated the implementation on throughput and latency in several controlled experiments using up to 7 nodes in up to 5 geographically separated areas, with up to 1000 data producers per node. The recorded system throughput increased linearly relative to both the number of nodes and the number of data producers. For comparison, Paxos showed a performance similar to our protocol when using 3 nodes, but got slower as more nodes were added. The lack of a relative order, in combination with partial replication, enables our system to continue working during network partitions, not only in the part containing the majority of the nodes, but also in any sufficiently large minority partitions.

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  • 48.
    Bucaioni, Alessio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    A Model-driven Development Approach with Temporal Awareness for Vehicular Embedded Systems2017Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    Considering the ubiquitousness of software in modern vehicles, its increased value and development cost, an efficient software development became of paramount importance for the vehicular domain. It has been identified that early verification of non functional properties of  vehicular embedded software such as, timing, reliability and safety, is crucial to efficiency. However, early verification of non functional properties is hard to achieve with traditional software development approaches due to the abstraction and the lack of automation of these methodologies.

     

    This doctoral thesis aims at improving efficiency in vehicular embedded software development by minimising the need for late, expensive and time consuming software modifications with early design changes, identified through timing verification, which usually are cheaper and faster. To this end, we introduce a novel model-driven approach which exploits the interplay of two automotive-specific modelling languages for the representation of functional and execution models and defines a suite of model transformations for their automatic integration.

     

    Starting from a functional model (expressed by means of EAST-ADL), all the execution models (expressed by means of the Rubus Component Model) entailing unique timing configurations are derived. Schedulability analysis selects the set of the feasible execution models with respect to specified timing requirements. Eventually, a reference to the selected execution models along with their analysis results is automatically created in the related functional model to allow the engineer to investigate them.

     

    The main scientific contributions of this doctoral thesis are i) a metamodel definition for the Rubus Component Model, ii) an automatic mechanism for the generation of Rubus models from EAST-ADL, iii) an automatic mechanism for the selection and back-propagation of the analysis results and related Rubus models to design level and iv) a compact notation for visualising the selected Rubus models by means of a single execution model.

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  • 49.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Di Salle, A.
    European University of Rome, Rome, Italy.
    Iovino, L.
    Gran Sasso Science Institute, L'Aquila, Italy.
    Kugele, S.
    Technische Hochschule Ingolstadt, Ingolstadt, Germany.
    Dajsuren, Y.
    Eindhoven University of Technology, Eindhoven, Netherlands.
    Joint Workshop on Model-Driven Engineering for Software Architecture (MDE4SA) and International Workshop on Automotive System/Software Architectures (WASA)2023In: Proc. - IEEE Int. Conf. Softw. Archit. Companion, ICSA-C, Institute of Electrical and Electronics Engineers Inc. , 2023, p. 246-247Conference paper (Other academic)
    Abstract [en]

    Current society heavily relies on software and software systems. Due to its increasing complexity, the design and operation of software systems are becoming challenging. In the last decades, a great deal of effort has been put into addressing software systems design, development, and maintenance challenges. Empirical evidence shows that one of the most critical success factors when developing software systems is their Software Architecture (SA). A SA describes software systems in terms of software components, their interactions, and critical quality attributes. Among other benefits, SAs improve the overall communication among different stakeholders, are the carriers of significant design decisions, promote the use of different abstraction levels, and allow for the early assessment of the software under development.

  • 50.
    Bucaioni, Alessio
    et al.
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Arcticus Systems AB, Jarfalla, Sweden.
    Mubeen, Saad
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Arcticus Systems AB, Jarfalla, Sweden.
    Cicchetti, Antonio
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Sjödin, Mikael
    Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
    Exploring Timing Model Extractions at EAST-ADL Design-level Using Model Transformations2015In: Proceedings - 12th International Conference on Information Technology: New Generations, ITNG 2015, 2015, Vol. Article number 7113538, p. 596-600Conference paper (Refereed)
    Abstract [en]

    We discuss the problem of extracting control and data flows from vehicular distributed embedded systems at higher abstraction levels during their development. Unambiguous extraction of control and data flows is vital part of the end-to-end timing model which is used as input by the end-to end timinganalysis engines. The goal is to support end-to-end timing analysis at higher abstraction levels. In order to address the problem, we propose a two-phase methodology that exploits the principles of ModelDriven Engineering and Component Based Software Engineering. Using this methodology, the software architecture at a higher level is automatically transformed to all legal implementation-level models. The end-to-end timing analysis is performed on each generated implementation-level model and the analysis results are fed back to the design-level model. This activity supports design space exploration, modelrefinement and/or remodeling at higher abstraction levels for tuning the timing behavior of the system.

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