https://www.mdu.se/

In today's ever-automating world, businesses are increasingly focused on optimizing network operations, including configuration, management, and troubleshooting. This study scrutinizes the comparison between manual and automated methodologies within the framework of the cloud-based Cisco Meraki platform. Our objective is to establish decisive criteria for identifying the most advantageous circumstances for automation, particularly in network configuration. To achieve this, we constructed a network consisting of three Meraki devices. Automation of network configuration was facilitated through the development of Python scripts leveraging the Meraki API library in conjunction with configuration files. The configuration files were constructed in various file formats–Excel, CSV, JSON, and YAML– in order to assess their impact on automation effectiveness. Moreover, manual configuration tasks were undertaken by three network technicians with varying levels of Meraki proficiency. A comprehensive series of tests, encompassing both automated and manual methods, was subsequently conducted, focusing on metrics such as execution time and keystroke count. Through meticulous analysis, we provided valuable insights into the effectiveness of automation in network configuration processes. Results demonstrated that the use of JSON files in the automation process yielded the shortest completion time and required the fewest keystrokes compared to other automation methods. Moreover, manual configuration via the Meraki dashboard GUI exhibited comparable efficiency to automation methods in networks with a small number of devices. Nonetheless, owing to the capacity to reuse configuration files with minor adjustments for similar setups, the true advantage of automation over manual configuration becomes apparent as the device count increases.

The Internet traffic volume continues to grow at a great rate, now driven by video and TV distribution. For network operators it is important to avoid congestion in the network, and to meet service level agreements with their customers.  This thesis presents work on two methods operators can use to reduce links loads in their networks: traffic engineering and content caching.

This thesis studies access patterns for TV and video and the potential for caching.  The investigation is done both using simulation and by analysis of logs from a large TV-on-Demand system over four months.

The results show that there is a small set of programs that account for a large fraction of the requests and that a comparatively small local cache can be used to significantly reduce the peak link loads during prime time. The investigation also demonstrates how the popularity of programs changes over time and shows that the access pattern in a TV-on-Demand system very much depends on the content type.

For traffic engineering the objective is to avoid congestion in the network and to make better use of available resources by adapting the routing to the current traffic situation. The main challenge for traffic engineering in IP networks is to cope with the dynamics of Internet traffic demands.

This thesis proposes L-balanced routings that route the traffic on the shortest paths possible but make sure that no link is utilised to more than a given level L. L-balanced routing gives efficient routing of traffic and controlled spare capacity to handle unpredictable changes in traffic.  We present an L-balanced routing algorithm and a heuristic search method for finding L-balanced weight settings for the legacy routing protocols OSPF and IS-IS. We show that the search and the resulting weight settings work well in real network scenarios.

Today video and TV distribution dominate Internet traffic and the increasing demand for high-bandwidth multimedia services puts pressure on Internet service providers. In this paper we simulate TV distribution with time-shift and investigate the effect of introducing a local cache close to the viewers. We study what impact TV program popularity, program set size, cache replacement policy and other factors have on the caching efficiency. The simulation results show that introducing a local cache close to the viewers significantly reduces the network load from TV-on-Demand services. By caching 4% of the program volume we can decrease the peak load during prime time by almost 50%. We also show that the TV program type and how program popularity changes over time can have a big influence on cache hit ratios and the resulting link loads

IPTV, where television is distributed over the Internet Protocol in a single operator network, has become popular and widespread. Many telecom and broadband companies have become TV providers and distribute TV channels using multicast over their backbone networks. IPTV also means an evolution to time-shifted television where viewers now often can choose to watch the programs at any time. However, distributing individual TV streams to each viewer requires a lot of bandwidth and is a big challenge for TV operators. In this paper we present an empirical IPTV workload model, simulate IPTV distribution with time-shift, and show that local caching can limit the bandwidth requirements significantly.

Today increasingly large volumes of TV and video are distributed over IP-networks and over the Internet. It is therefore essential for traffic and cache management to understand TV program popularity and access patterns in real networks.

In this paper we study access patterns in a large TV-on-Demand system over four months. We study user behaviour and program popularity and its impact on caching. The demand varies a lot in daily and weekly cycles. There are large peaks in demand, especially on Friday and Saturday evenings, that need to be handled.

We see that the cacheability, the share of requests that are not first-time requests, is very high. Furthermore, there is a small set of programs that account for a large fraction of the requests. We also find that the share of requests for the top most popular programs grows during prime time, and the change rate among them decreases. This is important for caching. The cache hit ratio increases during prime time when the demand is the highest, and aching makes the biggest difference when it matters most.

We also study the popularity (in terms of number of requests and rank) of individual programs and how that changes over time. Also, we see that the type of programs offered determines what the access pattern will look like.

Resource efficient approaches are of great importance for resource constrained embedded systems. In this paper, we present an approach targeting systems where tasks of a critical application are partitioned on a multi-core platform and by using resource reservation techniques, the remaining bandwidth capacity on each core is utilized for one or a set of non-critical application(s). To provide a resource efficient solution and to exploit the potential parallelism of the extra applications on the multi-core processor, global scheduling is used to schedule the tasks of the non-critical applications. Recently a specific instantiation of such a system has been studied where tasks do not share resources other than the processor. In this paper, we enable semaphore-based resource sharing among tasks within critical and non-critical applications using a suspension-based synchronization protocol. Tasks of non-critical applications have partial access to the processor bandwidth. The paper provides the systems schedulability analysis where blocking due to resource sharing is bounded. Further, we perform experimental evaluations under balanced and unbalanced allocation of tasks of a critical application to cores.

In enterprise-scale companies, where processing complex test results is often a time-consuming task for testers and developers, the need for an Application Programming Interface (API) testing visualization tool is vital. Furthermore, as various stakeholders require insights into the API testing results, a clear dashboard can facilitate effective communication among them. 

This thesis aims to fulfill the need for a generic API testing visualization tool within the mobile network industry through the implementation of TestUp, a user-friendly solution. TestUp simplifies the analysis of complex API test results for various stakeholders, including testers, developers, managers, and product owners. To accomplish the objectives of this thesis, an industrial case study was conducted at Nokia, beginning with a pre-study phase to explore industry needs and challenges. TestUp was designed based on the Agile methodology, evolving through feedback from industry and academia. Additionally, a post-tool questionnaire was employed to gather data on the tool’s effectiveness and limitations. Subsequently, the data analysis was conducted using the thematic analysis approach. 

The thesis demonstrates that TestUp provides valuable benefits to stakeholders by effectively addressing critical issues found in existing tools. TestUp is compatible with a range of test automation frameworks and serves as a user-friendly tool for visualizing test coverage. These facts fulfill the company's requirements. All in all, this thesis improves the analysing of API testing results within the mobile network management sector. Additionally, future work can involve enhancing the tool by adding extra features, such as export functionality and the ability to indicate timeout requests. Also, integrating TestUp with the continuous integration pipelines is a potential area for future work.

Convolutional Neural Networks (CNNs) have become integral in safety-critical applications, thus raising concerns about their fault tolerance. Conventional hardwaredependent fault tolerance methods, such as Triple Modular Redundancy (TMR), are computationally expensive, imposing a remarkable overhead on CNNs. Whereas fault tolerance techniques can be applied either at the hardware level or at the model levels, the latter provides more flexibility without sacrificing generality. This paper introduces a model-level hardening approach for CNNs by integrating error correction directly into the neural networks. The approach is hardwareagnostic and does not require any changes to the underlying accelerator device. Analyzing the vulnerability of parameters enables the duplication of selective filters/neurons so that their output channels are effectively corrected with an efficient and robust correction layer. The proposed method demonstrates fault resilience nearly equivalent to TMR-based correction but with significantly reduced overhead. Nevertheless, there exists an inherent overhead to the baseline CNNs. To tackle this issue, a cost-effective parameter vulnerability based pruning technique is proposed that outperforms the conventional pruning method, yielding smaller networks with a negligible accuracy loss. Remarkably, the hardened pruned CNNs perform up to 24% faster than the hardened un-pruned ones.

Industrial Internet of Things (IIoT) is an emerging domain, converting common objects into connecting objects with ubiquitous internet access to automate industry. Due to different vendors, supporting different infrastructures, a set of communication protocols such as Zigbee, 6LowPAN, Wireless Fidelity (Wi-Fi), Hyper Text Transfer Protocol (HTTP), etc. are introduced for IIoT. Thus, a closed ecosystem for smart devices is created. Particularly, when two or more industrial IoT applications are developed using different application-layer protocols such as Constrained Application Protocol (CoAP), Advanced Message Queuing Protocol (AMQP), or MQ Telemetry Transport (MQTT), devices are called heterogeneous devices and interoperability becomes a major challenge. In the existing literature, device-level interoperability using different application-layer protocols is enhanced with the help of intermediators at the network layer which includes servers, brokers, or gateways/adapters to route communication. However, these intermediators lead to several other issues such as dependency on network layer components, load balancing, single point of failure, and scalability. Therefore, the interoperability issue needs to be addressed at the application layer using a device intermediator instead of utilizing network layer components. For this purpose, Model Driven Engineering (MDE) is selected because less attention is paid to IIoT interoperable solutions development using MDE. To bridge this gap, a Model Driven Architecture (MDA) based approach is proposed that reduces the processing time and effort to develop these IIoT interoperable systems. For this purpose, (i) a metamodel, (ii) a UML profile, and (iii) transformation rules are developed to make heterogenous application-layer protocols interoperable using devices as intermediator. The initial feasibility of the proposed solution is demonstrated through a real-world case study i.e., a smart city. Results show that a complete solution for interoperability at the application layer for industrial IoT is provided using MDA. It will help the practitioners to automate industry 4.0 using model-driven based system development.

A new approach for detecting security attacks on software systems by monitoring the software system performance signatures is introduced. We present a proposed architecture for security intrusion detection using off-the-shelf security monitoring tools and performance signatures. Our approach relies on the assumption that the performance signature of the well-behaved system can be measured and that the performancesignature of several types of attacks can be identified. This assumption has been validated for operations support systems that are used to monitor large infrastructures and receive aggregated traffic that is periodic in nature. Examples of such infrastructures include telecommunications systems, transportation systems and power generation systems. In addition, significant deviation from well-behaved system performance signatures can be used to trigger alerts about new types of security attacks. We used a custom performance benchmark and five types of security attacks to deriveperformance signatures for the normal mode of operation and the security attack mode of operation. We observed that one of the types of thesecurity attacks went undetected by the off-the-shelf security monitoring tools but was detected by our approach of monitoring performance signatures. We conclude that an architecture for security intrusion detection can be effectively complemented by monitoring of performance signatures.

Container-based architectures are widely used for cloud computing and can have an important role in the implementation of fog computing infrastructures. However, there are some crucial dependability aspects that must be addressed to make containerization suitable for critical fog applications, e.g., in automation and robotics. This paper discusses challenges in applying containerization at the fog layer and focuses on one of those challenges: provision of fault-tolerant permanent storage. The paper also presents a container-based fog architecture utilizing so-called storage containers, which combine built-in fault-tolerance mechanisms of containers with a distributed consensus protocol to achieve data consistency.

Cooperative Cyber-Physical Systems (Co-CPSs) can be enabled using wireless communication technologies, which in principle should address reliability and safety challenges. Safety for Co-CPS enabled by wireless communication technologies is a crucial aspect and requires new dedicated design approaches. In this paper, we provide an overview of five Co-CPS use cases, as introduced in our SafeCOP EU project, and analyze their safety design requirements. Next, we provide a comprehensive analysis of the main existing wireless communication technologies giving details about the protocols developed within particular standardization bodies. We also investigate to what extent they address the non-functional requirements in terms of safety, security and real time, in the different application domains of each use case. Finally, we discuss general recommendations about the use of different wireless communication technologies showing their potentials in the selected real-world use cases. The discussion is provided under consideration in the 5G standardization process within 3GPP, whose current efforts are inline to current gaps in wireless communications protocols for Co-CPSs including many future use cases.

The Hierarchical Scheduling Framework (HSF) has been introduced to enable compositional schedulability analysis and execution of embedded software systems with real-time constraints. In this thesis, we consider a system consisting of a number of semi-independent components called subsystems, and these subsystems are allowed to share logical resources. The HSF provides CPU-time to the subsystems and it guarantees that the individual subsystems respect their allocated CPU budgets. However, if subsystems are allowed to share logical resources, extra complexity with respect to analysis and run-time mechanisms is introduced. In this thesis we address three issues related to hierarchical scheduling of semi-independent subsystems. In the first part, we investigate the feasibility of implementing the hierarchical scheduling framework in a commercial operating system, and we present the detailed figures of various key properties with respect to the overhead of the implementation.

In the second part, we studied the problem of supporting shared resources in a hierarchical scheduling framework and we propose two different solutions to support resource sharing. The first proposed solution is called SIRAP, a synchronization protocol for resource sharing in hierarchically scheduled open real-time systems, and the second solution is an enhanced overrun mechanism.

In the third part, we present a resource efficient approach to minimize system load (i.e., the collective CPU requirements to guarantee the schedulability of hierarchically scheduled subsystems). Our work is motivated from a tradeoff between reducing resource locking times and reducing system load. We formulate an optimization problem that determines the resource locking times of each individual subsystem with the goal of minimizing the system load subject to system schedulability. We present linear complexity algorithms to find an optimal solution to the problem, and we prove their correctness

Over the years, we have worked on hierarchical schedulingframeworks from a theoretical point of view. In thispaper we present our initial results of the implementationof our hierarchical scheduling framework in a commercialoperating system VxWorks. The purpose of the implementationis twofold: (1) we would like to demonstrate feasibilityof its implementation in a commercial operating system,without having to modify the kernel source code, and (2) wewould like to present detailed figures of various key propertieswith respect to the overhead of the implementation.During the implementation of the hierarchical scheduler,we have also developed a number of simple task schedulers.We present details of the implementation of Rate-Monotonic(RM) and Earliest Deadline First (EDF) schedulers. Finally,we present the design of our hierarchical schedulingframework, and we discuss our current status in the project.

The Hierarchical Scheduling Framework (HSF) has been introduced as a design-time framework enabling compositional schedulability analysis of embedded software systems with real-time properties. In this paper a system consists of a number of semi-independent components called subsystems. Subsystems are developed independently and later integrated to form a system. To support this design process, our proposed methods allow nonintrusive configuration and tuning of subsystem timing behaviour via subsystem interfaces for selecting scheduling parameters. This paper considers two methods to handle overruns due to resource sharing between subsystems in the HSF. We present the scheduling algorithms for overruns and their associated schedulability analysis, together with analysis that shows under what circumstances one or the other overrun method is preferred. Furthermore, we show how to calculate resource-holding times within our framework.

Nätverkssäkerheten har blivit viktigare än någonsin med tanke på de allt mer sofistikeradecyberattackerna. Bristande nätverkssäkerhet kan leda till förödande konsekvenser såsomdataförluster, läckage av konfidentiella dokument eller total systemnedgång. Det är en allmänfakta mellan nätverksingenjörer att VLAN är en teknik för att höja säkerheten i nätverk genomatt segmentera det. Men hur effektivt kan det skydda mot verkliga cyberattacker? Det härarbetet bidrar till att öka kunskapen om vilken förmåga VLAN har för att skydda mot olikacyberattacker. I arbetet används programvaran GNS3 för att bygga två likadana nätverk där enaär segmenterat med VLAN och andra är inte segmenterat. Nätverken bestod av bland annat tvåklientdatorer där ena var offret med operativsystemet Windows 10 och andra var angriparenmed Kali Linux. I nätverken fanns även en switch och en router. Med hjälp av verktygenEttercap, Dsniff och Hping3 utfördes attackerna ARP spoofing, MAC flooding och Pingflooding. Syftet med detta är att jämföra attackernas skadeeffekt med och utan VLAN.Resultaten visade att VLAN-tekniken kunde mildra skadeeffekterna mot Ping flooding,blockera ARP spoofing, men hade ingen effekt mot MAC flooding-attacken. Slutsatsen vikunde dra av arbetet är att VLAN kan vara ett bra skydd mot vissa typer av attacker, men äringet skydd mot andra. Därför bör nätverksingenjörer inte förlita sig enbart på VLAN somsäkerhetsåtgärd för sina nätverk.

Wireless Sensor Networks (WSNs) are key elements of Internet of Things (IoT) networks which provide sensing and wireless connectivity. Disaster management in smart cities is classified as a safety-critical application. Thus, it is important to ensure system availability by increasing the lifetime of WSNs. Clustering is one of the routing techniques that benefits energy efficiency in WSNs. This paper provides an evolutionary clustering and routing method which is capable of managing the energy consumption of nodes while considering the characteristics of a disaster area. The proposed method consists of two phases. First, we present a model with improved hybrid Particle Swarm Optimization (PSO) and Harmony Search Algorithm (HSA) for cluster head (CH) selection. Second, we design a PSO-based multi-hop routing system with enhanced tree encoding and a modified data packet format. The simulation results for disaster scenarios prove the efficiency of the proposed method in comparison with the state-of-the-art approaches in terms of the overall residual energy, number of live nodes, network coverage, and the packet delivery ratio. © 2020 by the authors. Licensee MDPI, Basel, Switzerland.

Realtidssystem ställer hårda krav på dess ingående mjukvaras temporala beteende. Programmen måste bete sig deterministiskt och ge svar inom satta tidsgränser. Med hårda krav följer större behov av verktyg att testa koden med. WCET (Worst Case Execution Time)-analys har som mål att finna en övre gräns för ett programs exekveringstid. SWEET (SWEdish Execution Time) är ett verktyg för WCET-analys utvecklat av en forskargrupp vid Mälardalens Högskola.

PowerPC är en klassisk processorarkitektur som utvecklades av Apple, Motorola och IBM och släpptes 1991. Den har bland annat använts av Apple i äldre versioner av deras Macintosh-datorer och i TV-spelskonsoler såsom Nintendo GameCube och är stor inom inbyggda system.

Tidigare har endast analys av källkod, C, varit möjlig i SWEET. Målet för detta examensarbete var att möjliggöra analys av körbara program för vilka källkoden ej är tillgänglig, Detta gjordes genom att konstruera en översättare från PowerPC-binärer till det programformat som SWEET använder för sina statiska analyser, ALF, med hjälp av tredjepartsverktyget aiT från AbsInt GmbH.

Resultatet blev en med undantag för flyttalsinstruktioner komplett översättare av PowerPC-program till ALF-kod. De flesta genererade programfiler som har testats i SWEET har gett lyckat resultat. 

The new generation networks and systems are increasingly demanded to present higher capacities such as flexibility, adaptability, or real-time capabilities. In this context, Time-Sensitive Networking (TSN) standards provide Ethernet with functionalities capable of meeting these new demands. However, the adoption of TSN by the industry has been limited due to the high complexity of configuring and analyzing its various mechanisms. This thesis aims to address this issue by developing tools to facilitate the adoption of TSN in the industry. To this end, we have created tools to enable efficient and semi-automatic TSN configuration and analysis. These tools can efficiently configure TSN networks based on traffic characteristics while supporting legacy devices in case of migration or integration of legacy systems to TSN. Additionally, the analysis tools enable guaranteeing the compliance of the TSN configuration with the network requirements with reduced waste of resources.

Specifically, we have devised a mapping tool called LETRA to distribute the Ethernet-based traffic among the three basic types of TSN traffic, i.e. Scheduled Traffic (ST), Audio-Video Bridging Traffic (AVB), and Best-Effort Traffic (BE). Since ST requires traffic scheduling, we developed HERMES, a heuristic scheduler that generates efficient schedules in a fast manner. For AVB traffic, which requires some previous schedulability analysis to guarantee it meets its time requirements, we propose a new Worst-Case Response Time Analysis (WCRTA) which reduces the pessimism of previous approaches. Finally, regarding the support for the integration of legacy devices in TSN systems, we have developed mechanisms to avoid adverse consequences resulting from the lack of synchronization between legacy devices and TSN.

Advancements in the Industrial Internet of Things (IIoT) and cyber-physical systems have driven the development of Industry 4.0, which has led to the emergence of advanced cloud-based applications. The web applications connect the field IIoT devices to 'the Internet'. The adequate performance of web applications depends on how seamlessly devices communicate and synchronize. The IIoT devices prominently use Message Queueing Telemetry Transport (MQTT) for machine to machine (M2M) communication. MQTT implements publish-subscribe-based broker architecture that distributes a common timebase to client devices. Such one-way time transfer methods are less accurate and often introduce synchronization errors. While existing time synchronization methods for field IIoT end devices, e.g., Simple Network Time Protocol (SNTP), provide adequate synchronization based on two-way delay transfer methods, their performance degrades significantly with deteriorating network conditions. To address these synchronization challenges, we propose SMQTT, a scalable, software-based, lightweight clock synchronization method for IIoT end devices utilizing MQTT-based M2M communication. The proposed method effectively leverages the broker architecture to implement a two-way delay-based synchronization algorithm. We conducted measurements in network deployments to evaluate the performance of the proposed algorithm. The results demonstrate that SMQTT surpasses both SNTP and state-of-the-art methods in terms of accuracy. Specifically, in our measurements under poor network conditions, SMQTT achieves synchronization performance improvements of 94% and 73% compared to SNTP and the state-of-the-art method, respectively. 

The ever increasing computational demands with size, weight, energy, power and time guidelines necessitates innovative energy efficient techniques in multi-core mixed criticality applications. Energy efficient design considerations include energy optimization techniques such as dynamic-voltage-and-frequency-scaling (DVFS) and dynamic-power-management (DPM). DPM techniques of procrastination and power shutdown reduce static and dynamic energy consumption efficiently. This work presents pmcEDF, a procrastination technique that extends the Earliest Deadline First with Virtual Deadlines (EDF-VD) scheduler to support both non-shutdown and shutdown cores. pmcEDF aims to reduce static and dynamic energy consumption by ensuring high criticality job deadlines without hampering quality of service by accommodating feasible low criticality jobs. Experimental evaluation shows that the proposed algorithm provides a total energy saving of 3.61%, 4.76% and 39.16% over existing EDF/EDF-VD based techniques. 

In the Internet of today there is a demand for both high bandwidth and low delays. Bandwidth-heavy applications such as large downloads or video streaming compete with more delay-sensitive applications; web-browsing, VoIP and video games. These applications represent a growing share of Internet traffic.

Buffers are an essential part of network equipment. They prevent packet loss and help maintain hight throughput. As bandwidths have increased so have the buffer sizes. In some cases way to much. This, and the fact that Active Queue Management (AQM) is seldom implemented, has given rise to a phenomenon called Bufferbloat.

Bufferbloat is manifested at the bottleneck of the network path by large flows creating standing queues that choke out smaller, and usually delay-sensitive, flows. Since the bottleneck is often located at the consumer edge, this is where the focus of this thesis lies.

This work evaluates three different AQM solutions that lower delays without requiring complicated configuration; CoDel, FQ_CoDel and PIE. FQ_CoDel had the best performance in the tests, with the lowest consistent delays and high throughput. This thesis recommends that AQM is implemented at the network edge, preferably FQ_CoDel.

Ramsta Robotics är ett företag som ligger i Uppsala. Företaget grundades 1999 av tre uppfinnare. Man har utvecklat en robot, som används för att göra rent i djurstallar. Tvättarbetet har hittills gjorts helt manuellt med högtryckstvätt. I framför allt svinhus är

arbetsmiljön direkt hälsovådlig – bland annat på grund av alla de kväveföreningar som löses ut när vattnet blöter upp anläggningen. Principen för roboten är att man lär den genom att med en styrpanel styra en arm så att alla ytor i boxen blir besprutad med högtryckstvätten minst en gång. Hela förloppet spelas in, och sedan kan roboten spela upp programmet flera gånger, och på det sättet kan roboten på egen hand göra rent i ett antal boxar, som står efter varandra.

Affärsidén har varit att utveckla en prisvärd robot där datastödet utgörs av ett enkelt styr- och reglersystem för industrin, en s.k. PLC. Den styr via ett drivkort 5-6 motorer, dock bara en motor i taget. Den traditionella robotteknikens komplexa mekanik och höga prisnivåer gör det direkt omöjligt att sätta in denna teknikplattform i jordbrukssammanhang. Kraven på en tvättrobot när det gäller mikrometerprecision och hastighet är heller inte lika hög som hos mer traditionella robotar.

Idag säljs detta system i ett flertal länder i Europa och också i Kanada. Hittills har c:a 150 robotar sålts, de flesta för att användas i svinproduktion men även fågel produktion och annan

industri har visat sig vara en marknad. C:a 100 maskiner är sålda i Sverige som representerar c:a 0,3 % av världens produktion av fläskkött. Eftersom Sverige är en så liten marknad i agrara sammanhang är verksamheten idag främst inriktad på export. Verksamheten är expanderande och företaget sysselsätter idag 4 personer på kontoret i Uppsala förutom tillverkning och service som köps externt. Omsättningen 2005 var c:a 8 milj. kronor och beräknas för 2006 närma sig 15 milj.

I samarbete med Robotdalen kommer fem olika examensarbeten på Mälardalens högskola att ge ett ökat tekniskt innehåll i företagets olika lösningar.

Projektbeskrivning:

Med individuella styrkort på respektive motor är det möjligt att använda en helt annan teknik för styrningen av motorerna på robotarmen. Man kan gå från att styra respektive led till att

utnyttja invers kinematik, och användaren styr var munstycket ska vara beläget, och styrprogrammet omvandlar den önskade positionen till vinklar och lägen för respektive led.

Att bygga ett komplett styrsystem kan vara ganska omfattande, men avsikten med detta examensarbete är att göra en första version av styrprogram, där användaren kanske kör fram armen till en punkt på en yta som ska tvättas, och sedan till en andra punkt, till en tredje.

Dessa tre punkter definierar en triangel på samma sätt som man bygger upp ytor i OpenGL.

En fjärde punkt ger med punkterna två och tre ytterligare en triangel. När sedan en hel yta har ’ritats upp’ (för en rak rektangel är det endast två trianglar) ska programmet kunna styra ut

robotarmens rörelsemönster.

We describe two small and portable TCP/IP implementations fulfilling the subset of RFC1122 requirements needed for full host-to-host interoperability. Our TCP/IP implementations do not sacrifice any of TCP's mechanisms such as urgent data or congestion control. They support IP fragment reassembly and the number of multiple simultaneous connections is limited only by the available RAM. Despite being small and simple, our implementations do not require their peers to have complex, full-size stacks, but can communicate with peers running a similarly light-weight stack. The code size is on the order of 10 kilobytes and RAM usage can be configured to be as low as a few hundred bytes.

The TCP/IP protocol suite, which has proven itself highly successful in wired networks, is often claimed to be unsuited for wireless micro-sensor networks. In this work, we question this conventional wisdom and present a number of mechanisms that are intended to enable the use of TCP/IP for wireless sensor networks: spatial IP address assignment, shared context header compression, application overlay routing, and distributed TCP caching (DTC). Sensor networks based on TCP/IP have the advantage of being able to directly communicate with an infrastructure consisting either of a wired IP network or of IP-based wireless technology such as GPRS. We have implemented parts of our mechanisms both in a simulator environment and on actual sensor nodes. Our preliminary results are promising.

This thesis aims to define a secure system design for reducing the security classification of a document. A reduced security classification makes it possible for the document to traverse an intermediate system with lower security measures before reaching a system with sufficient security measures to manage the original document.

A pressing requirement for companies and governments to secure their digital assets arises with the digitization of societal functions and the continuously escalating tensions in world politics. Digital security as a software implementation is no longer sufficient due to the ongoing race between digital offense and defense. It has become imperative for security to be an integral consideration at every stage of system design, such that it is implemented in a manner that prevents software from being transformed into a liability.

In Sweden, actors in both the private and public sectors that are deemed of national importance are required to comply with several laws and regulations if they possess an IT system. A key principle in most of these regulations is the requirement for military-approved signal protection if an actor intends to transmit classified information through an intermediary system that does not conform with the system´s implemented security measures.

Our design proposes using an information manager and a secret sharing scheme, the contents of the original document are encrypted in such a way that no decryption key is required while still achieving information-theoretic security. We can ensure integrity and confidentiality by using a dual-diode configuration for import- and export systems. This implies that as long as an antagonist does not have the resources to eavesdrop on all communication, the integrity and confidentiality of the sending and the receiving systems, as well as the transported document, can be ensured.

With the Industry 4.0 revolution, the inclusion of wireless communications with real-time requirements has been gaining popularity in industrial applications. As existing wireless technologies do not fully satisfy the stringent requirements of the most critical industrial applications, wired, centralized networks are often used. However, when the application requires mobility, there is no other way than to use wireless communications. Further, in applications where the topology changes dynamically and a large number of devices are mobile, centralized protocols are less suitable. Unfortunately, most decentralized medium access protocols are not predictable, and thereby not able to fulfil the real-time requirements. To address these challenges, in this paper Self-Organizing Time Division Multiple Access (STDMA) is analysed to assess its suitability for use in industrial applications. The analysis has been carried out through simulations under a multipath dispersed time-variant industrial channel while subject to a variable Doppler shift. To this end, several metrics such as channel access delay, slot occupation distribution (SOD), packet losses and packet inter-arrival time (PIAT) have been evaluated, using OMNeT++ in combination with the VEINS framework. 

We present a model, task automata, for real time systems with non-uniformly recurring computation tasks. It is an extended version of timed automata with asynchronous processes that are computation tasks generated (or triggered) by timed events. Compared with classical task models for real time systems, task automata may be used to describe tasks (1) that are generated non-deterministically according to timing constraints in timed automata, (2) that may have interval execution times representing the best case and the worst case execution times, and (3) whose completion times may influence the releases of task instances. We generalize the classical notion of schedulability to task automata. A task automaton is schedulable if there exists a scheduling strategy such that all possible sequences of events generated by the automaton are schedulable in the sense that all associated tasks can be computed within their deadlines. Our first technical result is that the schedulability for a given scheduling strategy can be checked algorithmically for the class of task automata when the best case and the worst case execution times of tasks are equal. The proof is based on a decidable class of suspension automata: timed automata with bounded subtraction in which clocks may be updated by subtractions within a bounded zone. We shall also study the borderline between decidable and undecidable cases. Our second technical result shows that the schedulability checking problem will be undecidable if the following three conditions hold: (1) the execution times of tasks are intervals, (2) the precise finishing time of a task instance may influence new task releases, and (3) a task is allowed to preempt another running task.

In classic scheduling theory, real-time tasks are usually assumed to be periodic, i.e. tasks are released and computed with fixed rates periodically. To relax the stringent constraints on task arrival times, we propose to use timed automata to describe task arrival patterns. In a previous work, it is shown that the general schedulability checking problem for such models is a reachability problem for a decidable class of timed automata extended with subtraction. Unfortunately, the number of clocks needed in the analysis is proportional to the maximal number of schedulable task instances associated with a model, which is in many cases huge. In this paper, we show that for fixed-priority scheduling strategy, the schedulability checking problem can be solved using standard timed automata with two extra clocks in addition to the clocks used in the original model to describe task arrival times. The analysis can be done in a similar manner to response time analysis in classic Rate-Monotonic Analysis (RMA). The result is further extended to systems with data-dependent control, in which the release time of a task may depend on the time-point at which other tasks finish their execution. For the case when the execution times of tasks are constants, we show that the schedulability problem can be solved using n+1 extra clocks, where n is the number of tasks. The presented analysis techniques have been implemented in the Times tool. For systems with only periodic tasks, the performance of the tool is comparable with tools implementing the classic RMA technique based on equation-solving, without suffering from the exponential explosion in the number of tasks.

Since the 90ies a bunch of problems and flaws in the old Internet Protocol version four has occurred.The biggest problem is the extinction of addresses which will come soon, soon in the matter of theclassic “wolf is coming” matter, but as in the fairy tale the wolf will finally come. When this will happenis unknown, but not many believes it won’t. Carl-Henrik Swanberg CEO for Ericsson once said that year2020 there will be 50 billion mobile units connected to internet. Considering there is maximum 4 billionaddresses in IPv4 the needs for more addresses will be significant. The solution of this is the version sixof Internet Protocol released in middle of the 90ies. This thesis mentions a lot of the problems with theold version and tries to make a good explanation of the benefits and possibilities that lies within thenew. It also contains a larger amount of information on the protocols that lies within this, like newversion of OSPF, the extensions of BGPv4 called multiprotocol BGP (MP-BGP) and new things likenetwork discovery protocol (NDP). The later chapter is about the planning of an implementation atMälarenergi City Network and the implementation at the internet service provider MDFnet whichnowadays runs IPv6 in their core and office network.

Denna rapport beskriver ett examensarbete som gjordes på företaget Motion Control i Västerås AB. Rapporten följer projektets utvecklingssteg och beskriver hur arbetet med att ta fram elektronik och inbyggd programvara för en kommunikationsmodul har framskridit. Kommunikationsmodulen ska fungera som en länk mellan en styrenhet och en I/O-enhet.

De inledande delarna av rapporten tar upp undersökningar på kommunikationsprotokollen PROFIBUS och PROFINET som är vanliga kommunikationsmetoder inom industrin. Undersökningarna låg till grund för vilket protokoll som skulle användas i modulen. PROFIBUS valdes och en sådan modul togs fram utifrån de krav som ställdes. Vidare beskriver rapporten hur hårdvara samt den inbyggda programvaran har utvecklats. Vid testerna av modulen verifierades om alla krav och önskemål var uppfyllda.

Projektet som helhet var lyckat och efter några mindre hårdvaruförändringar skulle modulen kunna användas i produkter som företaget säljer där PROFIBUS-kommunikation önskas.

Time-Sensitive Networking (TSN) is a set of ongoing projects within the IEEE standardization to guarantee timeliness and low-latency communication based on switched Ethernet for industrial applications. The huge demand is mainly coming from industries where intensive data transmission is required, such as in the modern vehicles where cameras, lidars and high-bandwidth modern sensors are connected. The TSN standards are evolving over time, hence the hardware needs to change depending upon the modifications. In addition, high performance hardware is required to obtain a full benefit from the standards. In this paper, we present a research plan for developing novel techniques to support a parameterized and modular hardware IP core of the multi-stage TSN switch fabric in VHSIC (Very High Speed Integrated Circuit) Hardware Description Language (VHDL), which can be deployed in any Field-Programmable-Gate-Array (FPGA) devices. We present the challenges on the way towards the mentioned goal. 

Industrial networks can benefit significantly from introduction of wireless communication. However, wireless systems suffer from much higher packet error rates than wired networks do, making it difficult to obtain sufficient reliability within application deadlines. One promising approach to increase the reliability of wireless communication systems without causing excessive additional delays is to exploit spatial diversity. However, often in industrial networks it is not possible to place the relay nodes optimally. Due to this not even relay nodes located close to the source are able to receive the source packets missing at the destination correctly and consequently they cannot assist by relaying. Therefore, to benefit even further from relaying, additional measures should be taken both to increase the number of the correct packets at the relay nodes and to allow the destination to recover more correct packets. Consequently, the focus of this work is schemes enabling relaying, forward-error-correction (FEC) and packet combining without causing additional delays or complexity such that it is possible to use off the shelf transceivers. The results show that the introduction of FEC and packet combining does improve performance by enabling relay nodes to help more often. However, the exact gain depends on the specific FEC scheme used and, in particular, the size of the preamble and other fields that must be left uncoded, but still be received correctly, to be able to use FEC on the received packet.

In this paper we investigate the usefulness of enforcing a minimum separation distance between cluster heads in a cluster based sensor network, thereby prolonging network lifetime by spreading the cluster heads, thus lowering the average communication energy consumption.

We have performed initial simulations in order to determine how much we can lower the energy consumption in the sensor network by separating the cluster heads. We have also investigated how the number of clusters affect the energy consumption for a given minimum separation distance.

The results show that our sensor network performs up to 150% better when introducing a minimum separation distance between cluster heads, comparing the number of messages received at the base station.

The simulations also show that the minimum separation distance resulting in the lowest energy consumption in our network varies with the number of clusters.

Relaying can increase reliability, range, or throughput. In many cyber-physical systems (CPS), relaying is used to maximize reliability before a given deadline. Since concurrent transmissions are not supported by most CPS, time-division multiple access (TDMA) is typically used. However, a major drawback of relaying in TDMA is that pre-allocated time-slots are wasted if their respective transmitters do not have any correctly received packet to relay. Therefore, in this letter, we propose a novel relay grouping scheme to overcome this drawback. Numerical results show that the proposed scheme significantly enhances the reliability while guaranteeing the deadline for each message. 

Performance aspects such as travel time, punctuality, and robustness are conflicting goals of utmost importance for railway transports. To successfully plan railway traffic, it is therefore important to strike a balance between planned travel times and expected delays. In railway operations research, a lot of attention has been given to construct models and methods to generate robust timetables-that is, timetables with the potential to withstand design errors, incorrect data, and minor everyday disturbances. Despite this, the current state of practice in railway planning is to construct timetables manually, possibly with support of microsimulation for robustness evaluation. This paper aims to narrow the gap between the state-of-the-art optimization-based research approaches and the current state of practice to construct timetables by combining simulation and optimization. The paper proposes a combined simulation-optimization approach for double-track lines, which generalizes previous work to allow full flexibility in the order of trains by including a new and more generic model to predict delays. By utilizing delay data from simulation, the approach can make socioeconomically optimal modifications of a given timetable by minimizing predicted disutility-the weighted sum of scheduled travel time and total predicted delay. In a large simulation experiment on the heavily congested Swedish Western Main Line, it is demonstrated that compared with a real-life, manually constructed timetable, large reductions of delays as well as improvements in punctuality could be obtained for a small cost of marginally longer travel times. The cost of scheduled in-vehicle travel time and mean delay was reduced by 5% on average, representing a large improvement for a highly utilized railway line. Furthermore, a separate scaling experiment indicates that the approach can also be suitable for larger problems.

The purpose of this master thesis is to improve the quality of software testing in a large company developing real-time embedded systems. Software testing is a very important part of software development. By performing comprehensive software testing the quality and validity of a software system can be assured. One of the main issues with software testing is to be sure that the tests are correct. Knowing what to test, but also how to perform testing, is of utmost importance.

In this thesis, we explore different ways to increase the quality of real-time testing by introducing new techniques in several stages of the software development model. Four complementary methods are suggested. The proposed methods are validated by implementing them in an existing and completed project on a subset of the software development process. The original output from the completed project is compared with the new output.

The presented results from the validation are positive in the sense that it is shown that the test stage was more qualitative, mostly due to a higher level of quality on input from earlier stages.

The rapid development, updating, and maintenance of industrial software systems have increased the necessity for software artifact testing. Some medium and large industries are forced to automate the test analysis process due to the proliferation of test data. The examination of test results can be automated by grouping them into subsets comprised of comparable test outcomes and their batch analysis. In this instance, the first step is to identify a precise and reliable categorization mechanism based on structural similarities and error categories. In addition, since errors and the number of subgroups are not specified, a method that does not require prior knowledge of the target subsets should be implemented. Clustering is one of the appropriate methods for separating test results, given this description. This work presents an appropriate approach for grouping test results and accelerating the test analysis process by implementing multiple clustering algorithms (K-means, Agglomerative, DBSCAN, Fuzzy-c-means, and Spectral) on test results from industrial contexts and comparing their time and efficiency in outputs. The lack of organization and textual character of the test findings is one of the primary obstacles in this study, necessitating the implementation of feature selection methods.

Consequently, this study employs three distinct approaches to feature selection (TF-IDF, FastText, and Bert). This research was conducted by implementing a series of trials in a controlled and isolated environment, with the assistance of Westermo Technologies AB's test process results, as part of the AIDOaRT Project, in order to establish an acceptable way for clustering industrial test results. The conclusion of this thesis shows that K-means and Agglomerative yield the highest performance and evaluation scores; however, the K-means is superior in terms of execution time and speed. In addition, by organizing a Focus Group meeting to qualitatively examine the results from the perspective of engineers and experts, it can be determined that, from their perspective, clustering results increases the speed of test analysis and decreases the review workload.

Cooperative communications in which relays assist the transmission of signals from source to destination offer extended radio coverage and improved link reliable. However, transmitting signals with the help of a relay network may also open additional avenues for eavesdropper to overhear confidential information. Further, as jammers and eavesdroppers may cooperate to attack the relay network, offering secure communications becomes a challenging problem. To cope and reduce the effect of such cooperative attacks, we propose a proactive attack scheme in which the legitimate users generate jamming signals in an attempt to counteract such hostile cooperative attacks. In order to assess the security performance of the proactive attack scheme compared to a non-protection scheme, an analytical expression of the secrecy outage probability is derived. Numerical results for different system settings are provided showing that the proactive attack scheme can indeed significantly improve the security performance of the considered relay networks.

Today's computer games have thousands of agents moving at the same time in areas inhabited by a large number of obstacles. In such an environment it is important to be able to calculate multiple shortest paths concurrently in an efficient manner. The highly parallel nature of the graphics processor suits this scenario perfectly. We have implemented a graphics processor based version of the A* path finding algorithm together with three algorithmic improvements that allow it to work faster and on bigger maps. The first makes use of pre-calculated paths for commonly used paths. The second use multiple threads that work concurrently on the same path. The third improvement makes use of a scheme that hierarchically breaks down large search spaces. In the latter the algorithm first calculates the path on a high level abstraction of the map, lowering the amount of nodes that needs to be visited. This algorithmic technique makes it possible to calculate more paths concurrently on large map settings compared to what was possible using the standard A* algorithm. Experimental results comparing the efficiency of the algorithmic techniques on a NVIDIA GeForce GTX 260 with 24 multi-processors are also presented in the paper.

The rapid advancements in large language models (LLMs) have led to the generation of highlyfluent and coherent text, posing significant challenges in distinguishing between human-writtenand machine-generated content. This thesis introduces Entll, a novel approach for detecting AIgenerated text by combining negative log-likelihood (NLL), ranks, and logit entropy analysis. Entlluses a compact 1.8B parameter model for feature extraction and aims to capture distinctive patternsthat differentiate AI-generated text from human-written text. The proposed method is evaluated ondiverse datasets spanning various domains and compared against state-of-the-art zero-shot detectors, namely Binoculars and Fast-DetectGPT. Experimental results demonstrate Entll’s competitiveaccuracy and low false positive rates across different datasets and domains. Moreover, Entll exhibits significant computational efficiency, being 4.9 s faster than Fast-DetectGPT and 108.1 s fasterthan Binoculars. The results indicate that Entll is a promising solution for the reliable and rapiddetection of AI-generated text, although challenges such as memorization and robustness againstadversarial attacks remain areas for future research.

More complex and intricate Computer Vision algorithms combined with higher resolution image streams put bigger and bigger demands on processing power. CPU clock frequencies are now pushing the limits of possible speeds, and have instead started growing in number of cores. Most Computer Vision algorithms' performance respond well to parallel solutions. Dividing the algorithm over 4-8 CPU cores can give a good speed-up, but using chips with Programmable Logic (PL) such as FPGA's can give even more.

An interesting recent addition to the FPGA family is a System on Chip (SoC) that combines a CPU and an FPGA in one chip, such as the Zynq-7000 series from Xilinx. This tight integration between the Programmable Logic and Processing System (PS) opens up for designs where C programs can use the programmable logic to accelerate selected parts of the algorithm, while still behaving like a C program.

On that subject, Xilinx has introduced a new High-Level Synthesis Tool (HLST) called Vivado HLS, which has the power to accelerate C code by synthesizing it to Hardware Description Language (HDL) code. This potentially bridges two otherwise very separate worlds; the ever popular OpenCV library and FPGAs.

This thesis will focus on evaluating Vivado HLS from Xilinx primarily with image processing in mind for potential use on GIMME-2; a system with a Zynq-7020 SoC and two high resolution image sensors, tailored for stereo vision.