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A dependency-graph based priority assignment algorithm for real-time traffic over NoCs with shared virtual-channels
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0002-1276-3609
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0002-1687-930X
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0002-5823-1472
2016 (English)In: IEEE International Workshop on Factory Communication Systems - Proceedings, WFCS, 2016, Article number 7496504Conference paper, Published paper (Refereed)
Resource type
Text
Abstract [en]

The Network-on-Chip (NoC) is the on-chip interconnection medium of choice for modern massively parallel processors and System-on-Chip (SoC) in general. Fixed-priority based preemptive scheduling using virtual-channels is a solution to support real-time communications in on-chip networks. Targeting the priority assignment problem in the context of NoCs, heuristic based priority assignment algorithms are more practical, due to the exponentially increased search space as the number of flows goes up. In our previous work, we have proposed a graph-based heuristic priority assignment algorithm (called GHSA) for NoC communications, where we show that taking the dependencies between flows into account can significantly reduce the search space. However, GHSA only works for NoCs with distinct priorities. Routers in such type of platforms may have a large amount of buffer cost when the number of flows is high. The applicability can thus be limited in reality. One solution to reduce the buffer cost is to allow priority sharing of different flows. In this paper, we propose a dependency-graph based priority assignment algorithm (called eGHSA) targeting NoCs with shared virtual-channels. A number of experiments as well as a case study based on an automotive application are generated, which clearly show that eGHSA improves the efficiency compared to the existing solution in the literature. 

Place, publisher, year, edition, pages
2016. Article number 7496504
Keyword [en]
Algorithms, Combinatorial optimization, Distributed computer systems, Flow graphs, Graphic methods, Heuristic algorithms, Program processors, Programmable logic controllers, Routers, System-on-chip, Automotive applications, Massively parallel processors, Network-on-chip(NoC), On-chip interconnection, Pre-emptive scheduling, Priority assignment, Real-time communication, System on chips (SoC), Network-on-chip
National Category
Computer Systems
Identifiers
URN: urn:nbn:se:mdh:diva-32521DOI: 10.1109/WFCS.2016.7496504ISI: 000382857300010Scopus ID: 2-s2.0-84980445834ISBN: 9781509023394 (print)OAI: oai:DiVA.org:mdh-32521DiVA: diva2:953672
Conference
12th IEEE World Conference on Factory Communication Systems, WFCS 2016, 3 May 2016 through 6 May 2016
Available from: 2016-08-18 Created: 2016-08-18 Last updated: 2017-05-12Bibliographically approved
In thesis
1. Real-Time Communication over Wormhole-Switched On-Chip Networks
Open this publication in new window or tab >>Real-Time Communication over Wormhole-Switched On-Chip Networks
2017 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

In a modern industrial system, the requirement on computational capacity has increased dramatically, in order to support a higher number of functionalities, to process a larger amount of data or to make faster and safer run-time decisions. Instead of using a traditional single-core processor where threads can only be executed sequentially, multi-core and many-core processors are gaining more and more attentions nowadays. In a multi-core processor, software programs can be executed in parallel, which can thus boost the computational performance. Many-core processors are specialized multi-core processors with a larger number of cores which are designed to achieve a higher degree of parallel processing. An on-chip communication bus is a central intersection used for data-exchange between cores, memory and I/O in most multi-core processors. As the number of cores increases, more contention can occur on the communication bus which raises a bottleneck of the overall performance. Therefore, in order to reduce contention incurred on the communication bus, a many-core processor typically employs a Network-on-Chip (NoC) to achieve data-exchange. Real-time embedded systems have been widely utilized for decades. In addition to the correctness of functionalities, timeliness is also an important factor in such systems. Violation of specific timing requirements can result in performance degradation or even fatal problems. While executing real-time applications on many-core processors, the timeliness of a NoC, as a communication subsystem, is essential as well. Unfortunately, many real-time system designs over-provision resources to guarantee the fulfillment of timing requirements, which can lead to significant resource waste. For example, analysis of a NoC design yields that the network is already saturated (i.e. accepting more traffic can incur requirement violation), however, in reality the network actually has the capacity to admit more traffic. In this thesis, we target such resource wasting problems related to design and analysis of NoCs that are used in real-time systems. We propose a number of solutions to improve the schedulability of real-time traffic over wormhole-switched NoCs in order to further improve the resource utilization of the whole system. The solutions focus mainly on two aspects: (1) providing more accurate and efficient time analyses; (2) proposing more cost-effective scheduling methods.

Place, publisher, year, edition, pages
Västerås: Malardalen University Press, 2017
Series
Mälardalen University Press Dissertations, ISSN 1651-4238 ; 232
Keyword
real-time system, network-on-chips
National Category
Embedded Systems
Research subject
Computer Science
Identifiers
urn:nbn:se:mdh:diva-35316 (URN)978-91-7485-332-2 (ISBN)
Public defence
2017-06-20, Gamma, Västerås, 09:15 (English)
Opponent
Supervisors
Available from: 2017-05-15 Created: 2017-05-12 Last updated: 2017-07-10Bibliographically approved

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Liu, MengBecker, MatthiasBehnam, MorisNolte, Thomas

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