mdh.sePublications
Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
A hardware and software monitor for high-level system-on-chip verification
Mälardalen University, Department of Computer Science and Engineering.
Mälardalen University, Department of Computer Science and Engineering.
2001 (English)In: Proceedings - International Symposium on Quality Electronic Design, ISQED, 2001, 56-61 p.Conference paper, Published paper (Refereed)
Resource type
Text
Abstract [en]

Verification of today's Systems-on-Chip (SoC) occur at low abstraction-levels, typically at register-transfer level (RTL). As the complexity of SoC designs grows, it is increasingly important to move verification to higher abstraction levels. Hardware/software co-simulation is a step in this direction, but is not sufficient due to inaccurate processor models, and slow hardware simulation speeds. System level monitoring, commonly used for event-based software debugging, provides information about task scheduling events, inter-task communication and synchronisation, semaphores/resources, I/O interrupts, etc. We present MAMon, a monitoring system that can both monitor the logic-level and the system-level in single/multiprocessor SoCs. A small hardware probe-unit is integrated in the SoC design and connects via a parallel port link to a host-based monitoring tool environment. The probe-unit collects all events in the target system in runtime, and timestamps them with a resolution of J ps. The events are then stored in a database on the host for further processing. The paper will describe MAMon and how it works for software and hardware monitoring. The paper also describe how system-level monitoring can be achieved non-instrusively by using a hardware-based Real-Time Kernel. 

Place, publisher, year, edition, pages
2001. 56-61 p.
Keyword [en]
Abstracting, Application specific integrated circuits, Design, Distributed computer systems, Hardware, Level measurement, Microprocessor chips, Probes, Program debugging, Programmable logic controllers, Semiconductor device manufacture, System-on-chip, Verification, Abstraction level, Hardware and software, Hardware simulation, High-level systems, Monitoring system, Register transfer level, Software and hardwares, Software debugging, Monitoring
National Category
Computer Systems
Identifiers
URN: urn:nbn:se:mdh:diva-30660DOI: 10.1109/ISQED.2001.915206ISI: 000168102000005Scopus ID: 2-s2.0-84949970286ISBN: 0769510256 (print)OAI: oai:DiVA.org:mdh-30660DiVA: diva2:890023
Conference
2nd IEEE International Symposium on Quality Electronic Design, ISQED 2001, 26 March 2001 through 28 March 2001
Available from: 2015-12-30 Created: 2015-12-30 Last updated: 2016-10-31Bibliographically approved

Open Access in DiVA

No full text

Other links

Publisher's full textScopus
By organisation
Department of Computer Science and Engineering
Computer Systems

Search outside of DiVA

GoogleGoogle Scholar

doi
isbn
urn-nbn

Altmetric score

doi
isbn
urn-nbn
Total: 16 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf