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Analysing switch-case code with abstract execution
Tidorum Ltd., Helsinki, Finland.
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0001-6571-0175
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0002-6969-6793
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0001-5297-6548
2015 (English)In: OpenAccess Series in Informatics, 2015, p. 85-94Conference paper, Published paper (Refereed)
Abstract [en]

Constructing the control-flow graph (CFG) of machine code is made difficult by dynamic transfers of control (DTC), where the address of the next instruction is computed at run-time. Switchcase statements make compilers generate a large variety of machine-code forms with DTC. Two analysis approaches are commonly used: pattern-matching methods identify predefined instruction patterns to extract the target addresses, while analytical methods try to compute the set of target addresses using a general value-Analysis. We tested the abstract execution method of the SWEET tool as a value analysis for switch-case code. SWEET is here used as a plugin to the Bound-T tool: thus our work can also be seen as an experiment in modular tool design, where a general value-Analysis tool is used to aid the CFG construction in a WCET analysis tool. We find that the abstract-execution analysis works at least as well as the switch-case analyses in Bound-T itself, which are mostly based on pattern-matching. However, there are still some weaknesses: the abstract domains available in SWEET are not well suited to representing sets of DTC target addresses, which are small but sparse and irregular. Also, in some cases the abstract-execution analysis fails because the used domain is not relational, that is, does not model arithmetic relationships between the values of different variables. Future work will be directed towards the design of abstract domains eliminating these weaknesses.

Place, publisher, year, edition, pages
2015. p. 85-94
Keywords [en]
Dynamic control flow, Indexed branch, Machine-code analysis, WCET analysis, Data flow analysis, Embedded systems, Flow graphs, Pattern matching, Value engineering, Abstract executions, Analysis approach, Analytical method, Control flow graphs, Dynamic controls, Machine codes, Codes (symbols)
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:mdh:diva-28721DOI: 10.4230/OASIcs.WCET.2015.85Scopus ID: 2-s2.0-84938521325ISBN: 9783939897958 (print)OAI: oai:DiVA.org:mdh-28721DiVA, id: diva2:847842
Conference
15th International Workshop on Worst-Case Execution Time Analysis, WCET 2015, 7 July 2015
Available from: 2015-08-21 Created: 2015-08-21 Last updated: 2015-08-21Bibliographically approved

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Gustafsson, JanKällberg, LinusLisper, Björn

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