mdh.sePublications
Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
PASA: Framework for partitioning and scheduling automation applications on multicore controllers
ABB Corporate Research.
ABB Corporate Research, Västerås, Sweden .ORCID iD: 0000-0003-2383-7981
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0002-1687-930X
2014 (English)In: 19th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2014, 2014, Article number 7005153- p.Conference paper, Published paper (Refereed)
Abstract [en]

With multicore controllers becoming available for industrial automation applications, new tools and algorithms to compute efficient partitioning and scheduling solutions for control applications need to be developed. Optimizing the deployment and the schedule of a set of Function Block Diagrams on a parallel architecture are both NP hard. Additionally, control engineers need help to shift from the single core towards the multicore paradigm. By taking advantage of the parallelism inside the control applications it is effectively possible to decrease the finish times of the applications which enables to decrease their cycle times and improve the quality of service of the controller processes. This paper presents a practical solution to this problem that consists in a framework, called PASA, designed for partitioning and scheduling control applications modeled as function block diagrams. It enables new algorithms tailored to solve these optimization problems. This paper presents an extension of list-based DAG scheduling algorithms designed to compute a deployment and schedule for several control applications with different cycle times. The different variants of this algorithm are compared against each other as well as against some other existing solutions on a set of randomly generated examples.

Place, publisher, year, edition, pages
2014. Article number 7005153- p.
Keyword [en]
control applications, directed acyclic graphs, framework, heuristics, multicore processors, partitioning, scheduling, Algorithms, Automation, Controllers, Directed graphs, Factory automation, Industrial plants, Optimization, Parallel architectures, Quality control, Quality of service, Scheduling algorithms, Directed acyclic graph (DAG), Multi-core processor
National Category
Electrical Engineering, Electronic Engineering, Information Engineering Computer and Information Science
Identifiers
URN: urn:nbn:se:mdh:diva-27929DOI: 10.1109/ETFA.2014.7005153ISI: 000360999100104Scopus ID: 2-s2.0-84946687886ISBN: 9781479948468 (print)OAI: oai:DiVA.org:mdh-27929DiVA: diva2:809173
Conference
19th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2014, 16 September 2014 through 19 September 2014
Available from: 2015-04-30 Created: 2015-04-30 Last updated: 2016-12-27Bibliographically approved

Open Access in DiVA

No full text

Other links

Publisher's full textScopus

Authority records BETA

Behnam, Moris

Search in DiVA

By author/editor
Vulgarakis, AnetaBehnam, Moris
By organisation
Embedded Systems
Electrical Engineering, Electronic Engineering, Information EngineeringComputer and Information Science

Search outside of DiVA

GoogleGoogle Scholar

doi
isbn
urn-nbn

Altmetric score

doi
isbn
urn-nbn
Total: 15 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf