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A communication-aware solution framework for mapping AUTOSAR runnables on multi-core systems
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0002-1384-5323
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0001-5297-6548
ABB Corporate Research, Västeräs, Sweden.
ABB Corporate Research, Västerås, Sweden.ORCID iD: 0000-0001-6132-7945
2014 (English)In: 19th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2014, 2014, Article number 7005244- p.Conference paper, Published paper (Refereed)
Abstract [en]

An AUTOSAR-based software application contains a set of software components, each of which encapsulates a set of runnable entities. In fact, the mission of the system is fulfilled as result of the collaboration between the runnables. Several trends have recently emerged to utilize multi-core technology to run AUTOSAR-based software. Not only the overhead of communication between the runnables is one of the major performance bottlenecks in multi-core processors but it is also the main source of unpredictability in the system. Appropriate mapping of the runnables onto a set of tasks (called mapping process) along with proper allocation of the tasks to processing cores (called task allocation process) can significantly reduce the communication overhead. In this paper, three solutions are suggested, each of which comprises both the mapping and the allocation processes. The goal is to maximize key performance aspects by reducing the overall inter-runnable communication time besides satisfying given timing and precedence constraints. A large number of randomly generated experiments are carried out to demonstrate the efficiency of the proposed solutions.

Place, publisher, year, edition, pages
2014. Article number 7005244- p.
Keyword [en]
Ant System, AUTOSAR, feedback-based search, mapping, multi-core, runnable, Simulated Annealing, Application programs, Factory automation, Ant systems, Feed-back based, Multi core, Microprocessor chips
National Category
Computer and Information Science Computer Science
Identifiers
URN: urn:nbn:se:mdh:diva-27937DOI: 10.1109/ETFA.2014.7005244ISI: 000360999100195Scopus ID: 2-s2.0-84946692528ISBN: 9781479948468 (print)OAI: oai:DiVA.org:mdh-27937DiVA: diva2:809133
Conference
19th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2014, 16 September 2014 through 19 September 2014
Available from: 2015-04-30 Created: 2015-04-30 Last updated: 2017-09-18Bibliographically approved
In thesis
1. Resource Optimization in Multi-processor Real-time Systems
Open this publication in new window or tab >>Resource Optimization in Multi-processor Real-time Systems
2017 (English)Licentiate thesis, comprehensive summary (Other academic)
Abstract [en]

This thesis addresses the topic of resource efficiency in multiprocessor systems in the presence of timing constraints. 

 Nowadays, almost wherever you look, you find a computing system. Most computing systems employ a multiprocessor platform. Multiprocessor systems can be found in a broad spectrum of computing systems ranging from a tiny chip hosting multiple cores to large geographically-distributed cloud data centers connected by the Internet. In multiprocessor systems, efficient use of computing resources is a substantial element when it comes to achieving a desirable performance for running software applications. 

 Most industrial applications, e.g., automotive and avionics applications, are subject to a set of real-time constraints that must be met. Such kinds of applications, along with the underlying hardware and software components running the application, constitute a real-time system. In real-time systems, the first and major concern of the system designer is to provide a solution where all timing constraints are met. Therefore, in multiprocessor real-time systems, not only resource efficiency, but also meeting all the timing requirements, is a major concern. 

 Industrie 4.0 is the current trend in automation and manufacturing when it comes to creating next generation of smart factories. Two categories of multiprocessor systems play a significant role in the realization of such a smart factory: 1) multi-core processors which are the key computing element of embedded systems, 2) cloud computing data centers as the supplier of a massive data storage and a large computational power. Both these categories are considered in the thesis, i.e., 1) the efficient use of embedded multi-core processors where multiple processors are located on the same chip, applied to execute a real-time application, and 2) the efficient use of multi-processors within a cloud computing data center. We address these two categories of multi-processor systems separately. 

 For each of them, we identify the key challenges to achieve a resource-efficient design of the system. We then formulate the problem and propose optimization solutions to optimize the efficiency of the system, while satisfying all timing constraints. Introducing a resource efficient solution for those two categories of multi-processor systems facilitates deployment of Industrie 4.0 in smart manufacturing factories where multi-core embedded processors and cloud computing data centers are two central cornerstones.

Place, publisher, year, edition, pages
Västerås: Mälardalen University, 2017
Series
Mälardalen University Press Licentiate Theses, ISSN 1651-9256 ; 263
National Category
Computer Science
Identifiers
urn:nbn:se:mdh:diva-35387 (URN)978-91-7485-336-0 (ISBN)
Presentation
2017-10-05, Paros, Mälardalens högskola, Västerås, 13:30 (English)
Opponent
Supervisors
Available from: 2017-09-14 Created: 2017-05-24 Last updated: 2017-09-18Bibliographically approved

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