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Hierarchical scheduling for predictable execution of real-time software components and legacy systems
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. (Model-Based Engineering of Embedded Systems (MBEES))ORCID iD: 0000-0001-7448-3381
2014 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

This dissertation presents techniques to achieve predictable execution of coarse-grained software components and for preservation of temporal properties of components during their integration and reuse.

The dissertation presents a novel concept runnable virtual node (RVN) which interaction with the environment is bounded both by a functional and a temporal interface, and the validity of its internal temporal behaviour is preserved when integrated with other components or when reused in a new environment. The realization of RVN exploits techniques for hierarchical scheduling to achieve temporal isolation, and the principles from component-based software-engineering to achieve functional isolation. The proof-of-concept case studies executed on a micro-controller demonstrate the preserving of real-time properties within software components for predictable integration and reusability in a new environment, in both hierarchical scheduling and RVN contexts.

Further, a multi-resource server (MRS) is proposed and implemented to enable predictable execution when composing multiple real-time components on a COTS multicore platform. MRS uses resource reservation for both CPU-bandwidth and memory-bus bandwidth to bound the interferences between tasks running on the same core, as well as, between tasks running on different cores. The later could, without MRS, interfere with each other due to contention on a shared memory-bus and memory. The results indicated that MRS can be used to "encapsulate" legacy systems and to give them enough resources to fulfill their purpose. In the dissertation, the compositional schedulability analysis for MRS is also provided and an experimental study is performed to bring insight on the correlation between the server budgets.

We believe that the proposed approaches enable a faster software integration and support legacy reuse and that this work transcend the boundaries of software engineering and real-time systems.

Place, publisher, year, edition, pages
Västerås: Mälardalen University , 2014.
Series
Mälardalen University Press Dissertations, ISSN 1651-4238 ; 169
Keyword [en]
real-time systems, component integration and reuse, hierarchical scheduling, multicore
National Category
Embedded Systems Computer Systems
Research subject
Computer Science
Identifiers
URN: urn:nbn:se:mdh:diva-26548ISBN: 978-91-7485-179-3 (print)OAI: oai:DiVA.org:mdh-26548DiVA: diva2:762814
Public defence
2014-12-17, R3-151, Mälardalens högskola, Västerås, 10:00 (English)
Opponent
Supervisors
Projects
PPMSchedPROGRESS
Available from: 2014-11-13 Created: 2014-11-13 Last updated: 2014-12-03Bibliographically approved
List of papers
1. Support for Hierarchical Scheduling in FreeRTOS
Open this publication in new window or tab >>Support for Hierarchical Scheduling in FreeRTOS
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2011 (English)In: 2011 IEEE 16TH CONFERENCE ON EMERGING TECHNOLOGIES AND FACTORY AUTOMATION (ETFA) / [ed] IEEE Industrial Electronic Society, IEEE conference proceedings, 2011, 1-10 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents the implementation of a HierarchicalScheduling Framework (HSF) on an open sourcereal-time operating system (FreeRTOS) to support the temporalisolation between a number of applications, on a single processor.The goal is to achieve predictable integration and reusability ofindependently developed components or applications. We presentthe initial results of the HSF implementation by running it onan AVR 32-bit board EVK1100.

The paper addresses the fixed-priority preemptive schedulingat both global and local scheduling levels. It describes the detaileddesign of HSF with the emphasis of doing minimal changes tothe underlying FreeRTOS kernel and keeping its API intact.Finally it provides (and compares) the results for the performancemeasures of idling and deferrable servers with respect to theoverhead of the implementation.

Place, publisher, year, edition, pages
IEEE conference proceedings, 2011
Keyword
Real-time systems; hierarchical scheduling framework; fixed-priority scheduling
National Category
Embedded Systems Computer Systems
Research subject
Computer Science
Identifiers
urn:nbn:se:mdh:diva-13421 (URN)10.1109/ETFA.2011.6059016 (DOI)2-s2.0-80655128588 (Scopus ID)978-1-4577-0018-7 (ISBN)
Conference
16th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA) Location: Toulouse, FRANCE Date: SEP 05-09, 2011
Note

Submitted to 16th IEEE International Conference on Emerging Technologies and Factory automation (ETFA'11) ©2011 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE."

Available from: 2011-12-14 Created: 2011-12-09 Last updated: 2017-09-27Bibliographically approved
2. Support for Legacy Real-Time Applications in an HSF-Enabled FreeRTOS - a technical report
Open this publication in new window or tab >>Support for Legacy Real-Time Applications in an HSF-Enabled FreeRTOS - a technical report
2014 (English)Report (Refereed)
Abstract [en]

This paper presents a runtime support to consolidate legacy together with other real-time applications, running a single instance of a real-time operating system (RTOS), and sharing system resources. In this context, we resort to the hierarchical scheduling framework (HSF) to provide tem- poral partitions for dierent applications, supporting their independent development and real-time analysis, thus resulting on a predictable inte- gration. In particular, the paper focuses on a constructive element, the legacy server that allows executing code that is unaware of the temporal partition within which it is deployed. Furthermore, we discuss the chal- lenges that need to be addressed to execute a legacy application in an HSF without modications to the original code. We focus on the chal- lenge of enabling sharing system resources, both hardware and software, as typically found in most industrial software systems. We propose a novel solution based on wrappers for the required RTOS system calls. We implement our ideas in a concrete implementation on FreeRTOS OS, taking advantage of a prior HSF implementation. The validation is performed by a proof-of-concept case study that shows a successful integration of a legacy application that uses shared resources in a system that executes other applications. 

Place, publisher, year, edition, pages
Sweden: Mälardalen University, 2014
Keyword
real-time systems, hierarchical scheduling, legacy application reuse, applications integration
National Category
Embedded Systems Computer Systems
Research subject
Computer Science
Identifiers
urn:nbn:se:mdh:diva-26547 (URN)MDH-MRTC-295/2014-1-SE (ISRN)
Available from: 2014-11-13 Created: 2014-11-13 Last updated: 2015-02-18Bibliographically approved
3. Predictable integration and reuse of executable real-time components
Open this publication in new window or tab >>Predictable integration and reuse of executable real-time components
2014 (English)In: Journal of Systems and Software, ISSN 0164-1212, Vol. 91, 147-162 p.Article in journal (Refereed) Published
Abstract [en]

We present the concept of runnable virtual node (RVN) as a means to achieve predictable integration and reuse of executable real-time components in embedded systems. A runnable virtual node is a coarse-grained software component that provides functional and temporal isolation with respect to its environment. Its interaction with the environment is bounded both by a functional and a temporal interface, and the validity of its internal temporal behaviour is preserved when integrated with other components or when reused in a new environment. Our realization of RVN exploits the latest techniques for hierarchical scheduling to achieve temporal isolation, and the principles from component-based software-engineering to achieve functional isolation. It uses a two-level deployment process, i.e. deploying functional entities to RVNs and then deploying RVNs to physical nodes, and thus also gives development benefits with respect to composability, system integration, testing, and validation. In addition, we have implemented a server-based inter-RVN communication strategy to not only support the predictable integration and reuse properties of RVNs by keeping the communication code in a separate server, but also increasing the maintainability and flexibility to change the communication code without affecting the timing properties of RVNs. We have applied our approach to a case study, implemented in the ProCom component technology executing on top of a FreeRTOS-based hierarchical scheduling framework and present the results as a proof-of-concept.

National Category
Engineering and Technology
Identifiers
urn:nbn:se:mdh:diva-24980 (URN)10.1016/j.jss.2013.12.040 (DOI)000334001600011 ()2-s2.0-84900676128 (Scopus ID)
Available from: 2014-05-09 Created: 2014-05-09 Last updated: 2015-02-06Bibliographically approved
4. The Multi-Resource Server for Predictable Execution on Multi-core Platforms
Open this publication in new window or tab >>The Multi-Resource Server for Predictable Execution on Multi-core Platforms
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2014 (English)In: Real-Time Technology and Applications - Proceedings, 2014, Vol. October, 1-11 p.Conference paper, Published paper (Refereed)
Abstract [en]

In this paper we present an implementation and demonstration of the Multi-Resource Server (MRS) which enables predictable execution of real-time applications on multi-core platforms. The MRS provides temporal isolation both between tasks running on the same core, as well as, between tasks running on different cores. The latter could, without MRS, interfere with each other due to contention on a shared memory bus. We demonstrate that MRS can be used to ”encapsulate” legacy systems and to give them enough resources to fulfill their purpose. In our case study a legacy media-player is integrated with several resource-hungry tasks running at a different core. We show that without MRS the media-player starts to drop frames due to the interference from other tasks; while introduction of MRS alleviates this problem. Another part of our demonstration shows how traditional periodic real-time tasks can be kept schedulable even when tasks with high memory-demand are added to the system.

Keyword
hierarchical scheduling, CPU resource, memoryresource, memory bandwidth, Linux, kernel, real-time systems
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:mdh:diva-25145 (URN)10.1109/RTAS.2014.6925986 (DOI)2-s2.0-84937573142 (Scopus ID)
Conference
2014 20th IEEE Real Time and Embedded Technology and Applications Symposium, RTAS 2014; Berlin; Germany; 15 April 2014 through 17 April 2014; Category numberCFP14044-PRT; Code 112776
Projects
PPMsched - Performance Preserving Multicore Scheduling
Available from: 2014-06-09 Created: 2014-06-05 Last updated: 2015-08-21Bibliographically approved
5. Worst Case Delay Analysis of a DRAM Memory Request for COTS Multicore Architectures
Open this publication in new window or tab >>Worst Case Delay Analysis of a DRAM Memory Request for COTS Multicore Architectures
2014 (English)Conference paper, Published paper (Refereed)
Abstract [en]

Dynamic RAM (DRAM) is a source of memory contention and interference problems on commercial of the shelf (COTS) multicore architectures. Due to its variable access time, it can greatly influence the task's WCET and can lead to unpredictability. In this paper, we provide a worst case delay analysis for a DRAM memory request to safely bound memory contention on multicore architectures. We derive a worst-case service time for a single memory request and then combine it with the per-request memory interference that can be generated by the tasks executing on same or different cores in order to generate the delay bound.

National Category
Embedded Systems Computer Systems
Research subject
Computer Science
Identifiers
urn:nbn:se:mdh:diva-26540 (URN)
Conference
MCC14, Seventh Swedish Workshop on Multicore Computing, Lund, Nov. 27-28, 2014
Available from: 2014-11-12 Created: 2014-11-12 Last updated: 2015-01-08Bibliographically approved
6. Compositional analysis for the multi-resource server - a technical report.
Open this publication in new window or tab >>Compositional analysis for the multi-resource server - a technical report.
2014 (English)Report (Refereed)
Abstract [en]

The Multi-Resource Server (MRS) technique has been proposed toenable predictable execution of memory intensive real-time applicationson COTS multi-core platforms. It uses resource reservationapproaches in the context of CPU-bandwidth and memory-busbandwidth reservations to bound the interferences between the applicationsrunning on the same core as well as between the applicationsrunning on different cores. In this paper we present a completecompositional schedulability analysis for the Multi-ResourceServer technique. Based on the proposed analysis, we further providean experimental study that investigates the behaviour of theMRS and identify the factors that contribute mostly on the overallsystem performance.

Place, publisher, year, edition, pages
Västerås: Mälardalen University, 2014
National Category
Embedded Systems Computer Systems
Research subject
Computer Science
Identifiers
urn:nbn:se:mdh:diva-26541 (URN)MDH-MRTC-283/2014-1-SE (ISRN)
Available from: 2014-11-12 Created: 2014-11-12 Last updated: 2014-11-26Bibliographically approved

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