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Efficient Task Allocation to FPGAs in the Safety Critical Domain
University of York.
Mälardalen University, School of Innovation, Design and Engineering. (Mälardalen Real-Time Research Centre)ORCID iD: 0000-0003-2415-8219
2011 (English)In: Proceedings of IEEE Pacific Rim International Symposium on Dependable Computing, PRDC, 2011, p. 119-128Conference paper, Published paper (Refereed)
Abstract [en]

Field Programmable Gate Arrays (FPGAs) are highly configurable programmable logic devices. They offer many benefits over traditional micro-processors such as the ability to efficiently run tasks in parallel and also highly predictable timing performance. They are becoming increasingly popular for use in the safety critical domain where predictability is essential. However, concerns about their dependability, principally their reliability and difficulties in assessing the impact of an internal failure means that current designs are inefficient and conservative. This paper discusses these issues in depth. It also presents an FPGA taskallocation method using simulated annealing to balance efficiency and reliability requirements. This can be used to improve designs of safety critical FPGA based systems.

Place, publisher, year, edition, pages
2011. p. 119-128
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:mdh:diva-23831DOI: 10.1109/PRDC.2011.23Scopus ID: 2-s2.0-84857758867ISBN: 978-076954590-5 (print)OAI: oai:DiVA.org:mdh-23831DiVA, id: diva2:682484
Conference
17th IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2011; Pasadena, CA; United States; 12 December 2011 through 14 December 2011
Available from: 2013-12-27 Created: 2013-12-19 Last updated: 2014-02-13Bibliographically approved

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Bate, Iain

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  • nn-NB
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More languages
Output format
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  • asciidoc
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