The UML profile MARTE includes CCSL (Clock Constraint Specification Language) for specifying logical (synchronous/asynchronous) as well as chronometric timing constraints. A reference semantics for CCSL has been defined and transformation techniques proposed e.g. CCSL to Promela. In this paper, we present transformation of CCSL into timed automata, to enable verification with UPPAAL modelchecker. Further, we discuss how the transformation approach supports modeling multiple timebases, timebase relationships and corresponding timing constraints.