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Toward Static Timing Analysis of Parallel Software
Mälardalen University, School of Innovation, Design and Engineering. (IS)ORCID iD: 0000-0001-8882-2292
Mälardalen University, School of Innovation, Design and Engineering. (IS)ORCID iD: 0000-0001-6571-0175
Mälardalen University, School of Innovation, Design and Engineering. (IS)ORCID iD: 0000-0001-5297-6548
2012 (English)In: Proc. 12th International Workshop on Worst-Case Execution-Time Analysis (WCET'12), 2012, p. 38-47Conference paper, Published paper (Refereed)
Abstract [en]

The current trend within computer, and even real-time, systems is to incorporate parallel hardware, e.g., multicore processors, and parallel software. Thus, the ability to safely analyse such parallel systems, e.g., regarding the timing behaviour, becomes necessary. Static timing analysis is an approach to mathematically derive safe bounds on the execution time of a program, when executed on a given hardware platform. This paper presents an algorithm that statically analyses the timing of parallel software, with threads communicating through shared memory, using abstract interpretation. It also gives an extensive example to clarify how the algorithm works.

Place, publisher, year, edition, pages
2012. p. 38-47
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:mdh:diva-17264DOI: 10.4230/OASIcs.WCET.2012.iScopus ID: 2-s2.0-84880129837ISBN: 978-3-939897-41-5 (print)OAI: oai:DiVA.org:mdh-17264DiVA, id: diva2:579595
Conference
12th International Workshop on Worst-Case Execution-Time Analysis, July 10, 2012, Pisa, Italy
Available from: 2012-12-20 Created: 2012-12-20 Last updated: 2016-06-02Bibliographically approved

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Gustavsson, AndreasGustafsson, JanLisper, Björn

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  • apa
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  • de-DE
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  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
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  • Other locale
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  • asciidoc
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