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Bounding the number of self-blocking occurrences of SIRAP
Mälardalen University, School of Innovation, Design and Engineering.ORCID iD: 0000-0002-1687-930X
Mälardalen University, School of Innovation, Design and Engineering.ORCID iD: 0000-0001-6132-7945
Eindhoven University of Technology, The Netherlands.ORCID iD: 0000-0001-6234-5117
2010 (English)In: Proceedings - Real-Time Systems Symposium, 2010, 61-72 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents a new schedulability analysis for hierarchically scheduled real-time systems executing on a single processor using SIRAP; a synchronization protocol for inter subsystem task synchronization. We show that it is possible to bound the number of self-blocking occurrences that should be taken into consideration in the schedulability analysis of subsystems. Correspondingly, we present two novel schedulability analysis approaches with proof of correctness for SIRAP. An evaluation suggests that this new schedulability analysis can decrease the analytical subsystem utilization significantly

Place, publisher, year, edition, pages
2010. 61-72 p.
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:mdh:diva-10444DOI: 10.1109/RTSS.2010.20ISI: 000287965300006Scopus ID: 2-s2.0-79951779466ISBN: 978-076954298-0 (print)OAI: oai:DiVA.org:mdh-10444DiVA: diva2:357517
Conference
31st IEEE Real-Time Systems Symposium, RTSS 2010;San Diego, CA;30 November 2010through3 December 2010
Available from: 2010-10-18 Created: 2010-10-18 Last updated: 2014-01-09Bibliographically approved
In thesis
1. Synchronization Protocols for a Compositional Real-Time Scheduling Framework
Open this publication in new window or tab >>Synchronization Protocols for a Compositional Real-Time Scheduling Framework
2010 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

In this thesis we propose techniques to simplify the integration of subsystems while minimizing the overall amount of CPU resources needed to guarantee the schedulability of real-time tasks. In addition, we provide solutions to the problem of allowing for the use of logical resources requiring mutual exclusion.

The contribution of the thesis is presented in three parts. In the first part, we propose a synchronization protocol, called SIRAP, to facilitate sharing of logical resources in a hierarchical scheduling framework. In addition, we extend an existing synchronization protocol, called HSRP, such that each subsystem can be developed independently. The performance of the proposed protocols is evaluated by extensive simulations. In the second part, we present an efficient schedulability analysis that exploits the lower scheduling overhead introduced by each of the proposed protocols. Finally, in the third part, we propose new methods and algorithms that find the optimal system parameters (e.g., optimal resource ceiling), that minimize the amount of CPU resources required to ensure schedulability, when using the proposed synchronization protocols in a hierarchical scheduling framework.

The motivation of this work comes from an emerging industrial trend in embedded software systems development to integrate multiple applications (subsystems) on a small number of processors. The purpose of this integration is to reduce the hardware related costs as well as the communication complexity between processors. In this setting a large number of industrial applications face the problem of preserving their real-time properties after their integration onto a single processor. In addition, temporal isolation between the applications during runtime may be required to prevent failure propagation between different applications.

Specifically, we propose a hierarchical scheduling framework that allows for a simplified integration of subsystems. The framework preserves the essential temporal characteristics of the subsystems, both when running in isolation as well as when they are integrated with other subsystems. In this thesis, we assume a model where a system consists of a number of subsystems. The subsystems can interact with each other using shared logical resources. The framework ensures that the individual subsystem respects its allocated share of the processor. The difficulty lies in allowing two or more subsystems to share logical resources, which introduces an additional complexity in the schedulability analysis and also increases the system load.

Place, publisher, year, edition, pages
Västerås: Mälardalen University, 2010
Series
Mälardalen University Press Dissertations, ISSN 1651-4238 ; 91
Research subject
Computer Science
Identifiers
urn:nbn:se:mdh:diva-10447 (URN)978-91-86135-95-9 (ISBN)
Public defence
2010-11-22, Delta, Mälardalens högskola, Västerås, 10:00 (English)
Opponent
Supervisors
Available from: 2010-10-29 Created: 2010-10-18 Last updated: 2014-05-26Bibliographically approved

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