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Component-Based Design and Analysis of Embedded Systems with UPPAAL PORT
Uppsala University.
Mälardalen University, School of Innovation, Design and Engineering.ORCID iD: 0000-0002-8461-0230
Ecole des Mines, Nancy, France .
Mälardalen University, School of Innovation, Design and Engineering.ORCID iD: 0000-0003-4040-3480
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2008 (English)In: Lecture Notes in Computer Science,  Volume 5311, Springer, 2008, p. 252-257Chapter in book (Refereed)
Abstract [en]

UPPAAL PORT is a new tool for component-based design and analysis

of embedded systems. It operates on the hierarchically structured continuous time component modeling language SaveCCM and provides efficient model-checking

by using partial-order reduction techniques that exploits the structure and the component behavior of the model. UPPAAL PORT is implemented as an extension of the verification engine in the UPPAAL tool. The tool can be used as back-end in to the Eclipse based SaveCCM integrated development environment, which

supports user friendly editing, simulation, and verification of models.

Place, publisher, year, edition, pages
Springer, 2008. p. 252-257
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:mdh:diva-7215DOI: 10.1007/978-3-540-88387-6-23ISI: 000261873000022Scopus ID: 2-s2.0-56749091117ISBN: 9783540883869 (print)OAI: oai:DiVA.org:mdh-7215DiVA, id: diva2:237225
Note

6th International Symposium on Automated Technology for Verification and Analysis, ATVA 2008; Seoul; South Korea; 20 October 2008 through 23 October 2008

Available from: 2009-09-25 Created: 2009-09-25 Last updated: 2018-08-21Bibliographically approved

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Carlson, JanPettersson, Paul

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