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Minimizing the clock drift in partially synchronized heterogeneous TSN networks
Mälardalen University, School of Innovation, Design and Engineering.
2023 (English)Independent thesis Basic level (professional degree), 10 credits / 15 HE creditsStudent thesis
Abstract [en]

The new generation of embedded systems will increase interaction between the environment, people, and autonomous devices. This will increase their need for communication, particularly in meeting real-time requirements. To address the real-time requirements of embedded systems, a communication network capable of providing high bandwidth, low latency, and deterministic behaviour is necessary. Time-Sensitive Networking (TSN) was developed by the IEEE 802.1 TSN Task Group and is a set of standards providing deterministic service over standard Ethernet and is an attractive option for achieving this. TSN leverages the advantages of IEEE Ethernet standards, including low hardware cost, high bandwidth, and deterministic behaviour. TSN uses time synchronization, traffic shaping, strict priority, and resource reservation mechanisms to provide a reliable and deterministic network environment suitable for real-time applications. However, for these mechanisms to work and TSN to achieve high performance, the network must be fully synchronized. In this thesis, we aim to integrate existing legacy devices into a TSN network without incorporating TSN functionality into them, as implementing all TSN standards requires significant investments in time, financial resources, and infrastructure upgrades. However, as the legacy devices don’t have TSN capabilities and cannot implement TSN synchronization protocols, they cannot synchronize with the TSN switches, which causes negative adverse such as clock drift between the TSN switches and the legacy end-stations. In this thesis, we aim to minimize the clock drift in the partially synchronized heterogeneous network, allowing researchers and organizations to take advantage of the benefits of adopting TSN into a legacy network without facing those issues. To solve the clock drift that occurs between the legacy end-stations and the TSN switches, we implemented one solution by combining those proposed solutions in the previous work [9] by using the Drift Detector (DD) and the Centralised Network Configuration element (CNC). This will be resolved by DD measuring and calculating the difference between the expected and actual reception of the messages from the receiver end-station. The CNC later uses the variation values detected by the DD to modify the TSN schedule and updates the network with the new period. In this way, we could minimize the negative consequences caused by partial synchronization in the network.

Place, publisher, year, edition, pages
2023. , p. 53
National Category
Computer Systems Communication Systems Telecommunications Computer Engineering
Identifiers
URN: urn:nbn:se:mdh:diva-63330OAI: oai:DiVA.org:mdh-63330DiVA, id: diva2:1769169
Subject / course
Computer Science
Supervisors
Examiners
Available from: 2023-06-21 Created: 2023-06-16 Last updated: 2023-06-21Bibliographically approved

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