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High-level synthesis (HLS) is now widely used to implement heterogeneous systems. It was invented to enable designers to use high-level languages such as C or C++. It makes it possible for the software developers to move their implementations to an FPGA or ASIC without having to know the hardware details. HLS tools only convert a high-level software program to a hardware implementation, and reliability and performance measures must be taken by the designer prior to feeding the program to the tool. In this thesis, we propose methods to improve the reliability and performance aspects of heterogeneous systems generated with the help of an HLS. We first propose methods to improve the reliability of the generated circuit either through utilizing pre-existing assertion statements for high-speed design testing and post-synthesis monitoring or by defining a generic redundancy method for self-healing hardware modules. Then, we propose an automatic toolchain to guide the HLS tool to generate a high-performance circuit. 

Deep Neural Networks (DNNs) are widely adopted to solve different problems ranging from speech recognition to image classification. DNNs demand a large amount of processing power, and their implementation on hardware, i.e., FPGA or ASIC, has received much attention. However, it is impossible to implement a DNN on hardware directly from its DNN descriptions, usually in Python language, libraries, and APIs. Therefore, it should be either implemented from scratch at Register Transfer Level (RTL), e.g., in VHDL or Verilog, or be transformed to a lower level implementation. One idea that has been recently considered is converting a DNN to C and then using High-Level Synthesis (HLS) to synthesize it on an FPGA. Nevertheless, there are various aspects to take into consideration during the transformation. In this thesis, we propose a multistage framework, DeepKit, that generates a synthesizable C implementation based on an input DNN architecture in a DNN description (Keras). Then, moving through the stages, various explorations and optimizations are performed with regard to accuracy, latency, resource utilization, and reliability. The framework is also implemented as a toolchain consisting of DeepHLS, AutoDeepHLS, DeepAxe, and DeepFlexiHLS, and results are provided for DNNs of various types and sizes.