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Schedule reparability: Enhancing time-triggered network recovery upon link failures
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0002-1228-5176
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0002-4987-7669
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0002-7235-6888
2019 (English)In: Proceedings - 2018 IEEE 24th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2018, Institute of Electrical and Electronics Engineers Inc. , 2019, p. 147-156Conference paper, Published paper (Refereed)
Abstract [en]

The time-triggered communication paradigm has been shown to satisfy temporal isolation while providing end to end delay guarantees through the synthesis of an offline schedule. However, this paradigm has severe flexibility limitations as any unpredicted change not anticipated by the schedule, such as a component failure, might result in a loss of frames. A typical solution is to use redundancy or replace and update the schedule offline anew. With the ever increase in size of networks and the need to reduce costs, supplementary solutions that enhance the reliability of such networks are also desired. In this paper, we introduce a repair algorithm capable of reacting to unpredicted link failures. The algorithm quickly modifies the schedule such that all frames are transmitted again within their timing guarantees. We found that the success of our algorithm increases significantly with the existence of empty slots spread over the schedule, an opposite approach compared to packing frames, commonly used in the literature. We propose a new ILP formulation that includes a maximization of frame and link intermissions to stretch empty slots over the schedule. Our results show that we can repair with 90% success rate within milliseconds to a valid schedule compared to a few minutes needed to re-schedule the whole network. 

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc. , 2019. p. 147-156
National Category
Computer Systems
Identifiers
URN: urn:nbn:se:mdh:diva-42810DOI: 10.1109/RTCSA.2018.00026ISI: 000458980300017Scopus ID: 2-s2.0-85061771050ISBN: 9781538677599 (print)OAI: oai:DiVA.org:mdh-42810DiVA, id: diva2:1292444
Conference
24th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2018; Hakodate; Japan; 29 August 2018 through 31 August 2018
Available from: 2019-02-28 Created: 2019-02-28 Last updated: 2019-03-07Bibliographically approved

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Pozo Pérez, Francisco ManuelRodriguez-Navas, GuillermoHansson, Hans

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