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Architectural engineering of embedded computer systems comprehensively affects both the development processes and the abilities of the systems. Rigorous and holistic verification of architectural engineering is consequently essential in the development of safety-critical and mission-critical embedded systems, such as computer systems within aviation, automotive, and railway transportation, where even minor architectural defects may cause substantial cost and devastating harm. The increasing complexity of embedded systems renders this challenge unmanageable without the support of automated methods of verification, to reduce the cost of labor and the risk of human error.

The contribution of this thesis is an Architecture Quality Assurance Framework (AQAF) and a corresponding tool support, the Architecture Quality Assurance Tool (AQAT). AQAF provides a rigorous, holistic, and automated solution to the verification of critical embedded systems architectural engineering, from requirements analysis and design to implementation and maintenance. A rigorous and automated verification across the development process is achieved through the adaption and integration of formal methods to architectural engineering. The framework includes an architectural model checking technique for the detection of design faults, an architectural model-based test suite generation technique for the detection of implementation faults, and an architectural selective regression verification technique for an efficient detection of faults introduced by maintenance modifications.

An integrated solution provides traceability and coherency between the verification processes and the different artifacts under analysis, which is essential for obtaining reliable results, for meeting certification provisions, and for performing impact analyses of maintenance modifications. The Architecture Quality Assurance Tool (AQAT) implements the theory of AQAF and enables an effortless adoption into industrial practices. Empirical results from an industrial study present a high fault detection rate at both the design level and the implementation level as well as an efficient selective regression verification process. Furthermore, the results of a scalability evaluation show that the solution is scalable to complex many-core embedded systems with multithreading.