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Cache-Partitioning for COTS Multi-coreArchitecture
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
2017 (English)Independent thesis Advanced level (degree of Master (Two Years)), 80 credits / 120 HE creditsStudent thesis
Abstract [en]

Multi-core architectures present challenges to execute real-time applications. Concurrently executing real-time tasks on different cores, can produce negative impact on each others execution times due to the shared resources e.g. shared last-level cache, shared memory bus etc. Shared last-level cache is a resource of cache pollution that negatively impacts the execution times of tasks. In this thesis project we provided support for last-level cache partitioning through the mechanism of page coloring. Using page coloring, the last level cache is divided in multiple partitions. Tasks are allowed to access their own partition only, thus achieving cache isolation. The implementation is done in Linux OS. The aim of the thesis is to incorporate this work with the previous implementation of Multi-Resource Server to achieve task isolation.

Place, publisher, year, edition, pages
2017. , 69 p.
National Category
Embedded Systems
Identifiers
URN: urn:nbn:se:mdh:diva-34844OAI: oai:DiVA.org:mdh-34844DiVA: diva2:1073275
Supervisors
Available from: 2017-02-17 Created: 2017-02-10 Last updated: 2017-02-17Bibliographically approved

Open Access in DiVA

fulltext(816 kB)64 downloads
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File name FULLTEXT01.pdfFile size 816 kBChecksum SHA-512
a303cd0883c6c55c0f46c543669bdcb93c61ad5ac19aeec73fe409e07e869b11fa281e18c5772046b6c12e842c09f135f3e66a964dcbc9734ade48cc1c3897f6
Type fulltextMimetype application/pdf

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CiteExportLink to record
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Citation style
  • apa
  • harvard1
  • ieee
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Language
  • de-DE
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  • fi-FI
  • nn-NO
  • nn-NB
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  • Other locale
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Output format
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