mdh.sePublications
Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Reliability-aware task scheduling using clustered replication for multi-core real-time systems
Department of Electrical and Computer Engineering, University of Tehran, Tehran, Iran.
Department of Electrical and Computer Engineering, University of Tehran, Tehran, Iran.
Department of Electrical and Computer Engineering, University of Tehran, Tehran, Iran.
Department of Electrical and Computer Engineering, University of Tehran, Tehran, Iran.
Show others and affiliations
2016 (English)In: Proceedings of the 9th International Workshop on Network on Chip Architectures, 2016, 45-50 p.Conference paper (Refereed)
Abstract [en]

This paper proposes a model for a new reliability-aware task scheduling method for hard real-time multi-core systems. The proposed method is based on a novel clustered replication which maintains the desired reliability threshold, minimizing both inter-core communication and redundancy overhead in multi-core network-on-chip based platforms. Both single and multiple errors are considered in this method. Experimental results show that the proposed method can schedule hard real-time tasks with relatively lower latency and better communication overhead in comparison with the conventional replication method. The proposed method can reduce the execution latency and communication volume about 29.4% and 30.1% in comparison with conventional replication, respectively. Results show that the redundancy increase of the proposed method is about 60% less than conventional replication and depends on the defined reliability threshold of the system.

Place, publisher, year, edition, pages
2016. 45-50 p.
Keyword [en]
Network-on-chip, Reliability, Replication, Task scheduling, Computer architecture, Interactive computer systems, Multitasking, Network architecture, Redundancy, Scheduling algorithms, Servers, Communication overheads, Hard real-time task, Inter-core communications, Multi-core systems, Reliability threshold, Replication method, Task-scheduling, Real time systems
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:mdh:diva-34026DOI: 10.1145/2994133.2994138ScopusID: 2-s2.0-84995466904ISBN: 9781450347921 (print)OAI: oai:DiVA.org:mdh-34026DiVA: diva2:1051490
Conference
9th International Workshop on Network on Chip Architectures, NoCArc 2016, 15 October 2016
Available from: 2016-12-02 Created: 2016-12-02 Last updated: 2016-12-02Bibliographically approved

Open Access in DiVA

No full text

Other links

Publisher's full textScopus

Search in DiVA

By author/editor
Daneshtalab, Masoud
By organisation
Embedded Systems
Electrical Engineering, Electronic Engineering, Information Engineering

Search outside of DiVA

GoogleGoogle Scholar

Altmetric score

Total: 4 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf