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Contention-Free Execution of Automotive Applications on a Clustered Many-Core Platform
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0002-1276-3609
Research and Technology Centre, Robert Bosch, India.
CISTER, INESC-TEC, ISEP, Portugal .
CISTER, INESC-TEC, ISEP, Portugal .
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2016 (English)In: 28th Euromicro Conference on Real-Time Systems ECRTS'16, Toulouse, France, 2016, p. 14-24Conference paper, Published paper (Refereed)
Abstract [en]

Next generations of compute-intensive real-time applications in automotive systems will require more powerful computing platforms. One promising power-efficient solution for such applications is to use clustered many-core architectures. However, ensuring that real-time requirements are satisfied in the presence of contention in shared resources, such as memories, remains an open issue. This work presents a novel contention-free execution framework to execute automotive applications on such platforms. Privatization of memory banks together with defined access phases to shared memory resources is the backbone of the framework. An Integer Linear Programming (ILP) formulation is presented to find the optimal time-triggered schedule for the on-core execution as well as for the access to shared memory. Additionally a heuristic solution is presented that generates the schedule in a fraction of the time required by the ILP. Extensive evaluations show that the proposed heuristic performs only 0.5% away from the optimal solution while it outperforms a baseline heuristic by 67%. The applicability of the approach to industrially sized problems is demonstrated in a case study of a software for Engine Management Systems.

Place, publisher, year, edition, pages
Toulouse, France, 2016. p. 14-24
Keywords [en]
Many-CoreExecution FrameworkAutomotiveClustered ArchitectureTime Triggered Scheduling
National Category
Computer Systems
Identifiers
URN: urn:nbn:se:mdh:diva-32844DOI: 10.1109/ECRTS.2016.14ISI: 000389463400002Scopus ID: 2-s2.0-84989911785ISBN: 978-1-5090-2811-5 (print)OAI: oai:DiVA.org:mdh-32844DiVA, id: diva2:1010080
Conference
28th Euromicro Conference on Real-Time Systems ECRTS'16, 05 Jul 2016, Toulouse, France
Projects
PREMISE - Predictable Multicore SystemsAvailable from: 2016-09-30 Created: 2016-08-24 Last updated: 2017-11-02Bibliographically approved
In thesis
1. Consolidating Automotive Real-Time Applications on Many-Core Platforms
Open this publication in new window or tab >>Consolidating Automotive Real-Time Applications on Many-Core Platforms
2017 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

Automotive systems have transitioned from basic transportation utilities to sophisticated systems. The rapid increase in functionality comes along with a steep increase in software complexity. This manifests itself in a surge of the number of functionalities as well as the complexity of existing functions. To cope with this transition, current trends shift away from today’s distributed architectures towards integrated architectures, where previously distributed functionality is consolidated on fewer, more powerful, computers. This can ease the integration process, reduce the hardware complexity, and ultimately save costs.

One promising hardware platform for these powerful embedded computers is the many-core processor. A many-core processor hosts a vast number of compute cores, that are partitioned on tiles which are connected by a Network-on-Chip. These natural partitions can provide exclusive execution spaces for different applications, since most resources are not shared among them. Hence, natural building blocks towards temporally and spatially separated execution spaces exist as a result of the hardware architecture.

Additionally to the traditional task local deadlines, automotive applications are often subject to timing constraints on the data propagation through a chain of semantically related tasks. Such requirements pose challenges to the system designer as they are only able to verify them after the system synthesis (i.e. very late in the design process).

In this thesis, we present methods that transform complex timing constraints on the data propagation delay to precedence constraints between individual jobs. An execution framework for the cluster of the many-core is proposed that allows access to cluster external memory while it avoids contention on shared resources by design. A partitioning and configuration of the Network-on-Chip provides isolation between the different applications and reduces the access time from the clusters to external memory. Moreover, methods that facilitate the verification of data propagation delays in each development step are provided. 

Place, publisher, year, edition, pages
Västerås: Malardalen University, 2017
Series
Mälardalen University Press Dissertations, ISSN 1651-4238 ; 246
Keywords
Many-Core, Automotive, Network-on-Chip, Real-Time, Timing analysis
National Category
Embedded Systems
Research subject
Computer Science
Identifiers
urn:nbn:se:mdh:diva-37182 (URN)978-91-7485-359-9 (ISBN)
Public defence
2017-12-19, Kappa, Mälardalens högskola, Västerås, 09:00 (English)
Opponent
Supervisors
Available from: 2017-11-06 Created: 2017-11-02 Last updated: 2017-11-27Bibliographically approved

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