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Predicting Cache Behaviour of Concurrent Applications
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0002-1687-930X
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0002-2558-5354
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0002-8461-0230
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2024 (English)In: IEEE International Conference on Emerging Technologies and Factory Automation, ETFA, Institute of Electrical and Electronics Engineers Inc. , 2024Conference paper, Published paper (Refereed)
Abstract [en]

Modern digital solutions are built around a variety of applications. The continuous integration of these applications brings advancements in technology. Therefore, it is essential to understand how these applications will behave when they run together. However, this can be challenging to interpret due to the increasing complexity of the execution details. One such fundamental detail is the utilization of shared cache as it goes hand in hand with the computation capacity of computer systems. Since cache utilization behavior is not simple enough to translate with few assumptions we have investigated if this complex behavior can be predicted with the help of machine learning. We trained the deep neural network with enough examples that represent the cache behavior when applications were running alone and when they were running concurrently on the same core. The Long Short-Term Memory (LSTM) network learns the entire execution period of each application in the training set. As a result, without running two applications together in reality, provided with the L1 cache misses of two applications (running alone), it can predict how the cache will look like if two applications wish to run together. The model returns a time series that reflects the cache behavior in concurrency. 

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc. , 2024.
Keywords [en]
L1 Cache, Long Short-Term Memory Network, Machine Learning, Performance monitoring counters, Cache memory, Deep neural networks, Cache behavior, Continuous integrations, Digital solutions, L1 caches, Machine-learning, Memory network, Performance monitoring counter, Performance-monitoring, Short term memory, Long short-term memory
National Category
Computer Systems
Identifiers
URN: urn:nbn:se:mdh:diva-69003DOI: 10.1109/ETFA61755.2024.10710908Scopus ID: 2-s2.0-85207838536ISBN: 9798350361230 (print)OAI: oai:DiVA.org:mdh-69003DiVA, id: diva2:1912943
Conference
29th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2024, Padova, 10 September 2024 through 13 September 2024
Available from: 2024-11-13 Created: 2024-11-13 Last updated: 2024-11-13Bibliographically approved

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Imtiaz, ShamoonaBehnam, MorisCapannini, GabrieleCarlson, Jan

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Citation style
  • apa
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