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Network-on-ReRAM for Scalable Processing-in-Memory Architecture Design
College of Engineering University of Tehran, Tehran, Iran.
College of Engineering University of Tehran and School of Computor Science, IPM, Tehran, Iran.
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. Tallinn University of Technology, Estonia.
2021 (English)In: Proceedings - 2021 24th Euromicro Conference on Digital System Design, DSD 2021, 2021, p. 143-149Conference paper, Published paper (Refereed)
Abstract [en]

The non-volatile metal-oxide resistive random access memory (ReRAM) is an emerging alternative for the current memory technologies. The unique capability of ReRAM to perform analog and digital arithmetic and logic operations has enabled this technology to incorporate both computation and memory capabilities on the same unit. Due to this interesting property, there is a growing trend in recent years to implement emerging data-intensive applications on ReRAM structures. A typical ReRAM-based processing-in-memory architecture may consist tens to hundreds of ReRAM units (mats) that can either store or process data. To support such large-scale ReRAM structure, this paper proposes a scalable network-on-ReRAM architecture. The proposed network employs a novel associative router architecture, designed based on the ReRAM-based content-addressable memories. With the in-memory packet processing capability, this router yields higher throughput and resource utilization levels than a conventional router. This router is technology compatible with ReRAM and as our evaluations show, employing it to build a network-on-ReRAM makes the emerging ReRAM-based processing-in-memory architectures more scalable and performance-efficient.

Place, publisher, year, edition, pages
2021. p. 143-149
Keywords [en]
Microarchitecture;Nonvolatile memory;Digital systems;Resistive RAM;Computer architecture;Switches;Throughput;ReRAM;Processing-in-memory;Network-on-ReRAM
National Category
Computer Sciences
Identifiers
URN: urn:nbn:se:mdh:diva-56422DOI: 10.1109/DSD53832.2021.00031ISI: 000728394500022Scopus ID: 2-s2.0-85125793865ISBN: 978-1-6654-2703-6 (electronic)OAI: oai:DiVA.org:mdh-56422DiVA, id: diva2:1610006
Conference
2021 24th Euromicro Conference on Digital System Design (DSD), 1-3 Sept. 2021
Available from: 2021-11-09 Created: 2021-11-09 Last updated: 2022-03-18Bibliographically approved

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Daneshtalab, Masoud

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