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Investigating execution-characteristics of feature-detection algorithms
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.
Ericsson AB, Stockholm, Sweden.
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0002-1687-930X
Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems.ORCID iD: 0000-0001-7586-0409
2017 (English)In: IEEE Conference on Emerging Technologies and Factory Automation, ISSN 1946-0740, E-ISSN 1946-0759, Vol. Part F134116, p. 1-4Article in journal (Refereed) Published
Abstract [en]

We discuss how to obtain information of execution characteristics, such as parallelizability and memory utilization, with the final aim to improve the performance and predictability of feature and corner detection algorithms for use in e.g. robotics and autonomous machines. Our aim is to obtain a better understanding of how computer vision algorithms use hardware resources and how to improve the time predictability and execution time of such algorithms when executing on multi-core CPUs. We evaluate a fork-join model applicable to feature detection algorithms and present a method for measuring how well the algorithm performance correlates with hardware resource usage. We have applied our method to the Featured from Accelerated Segment Test (FAST) algorithm. Our characterization of FAST reveals that it is an algorithm with excellent parallelism opportunities, resulting in an almost linear speed-up per core. Our measurements also reveal that the performance of FAST correlates very little with the number number of misses in the L1 data cache, L1 instruction cache, data translation lookaside buffer and L2 cache. Thus, the FAST algorithm will not have a negative effect on the execution time when the input data fits in the L2 cache. 

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc. , 2017. Vol. Part F134116, p. 1-4
National Category
Computer Systems
Identifiers
URN: urn:nbn:se:mdh:diva-38918DOI: 10.1109/ETFA.2017.8247758ISI: 000427812000193Scopus ID: 2-s2.0-85044481799OAI: oai:DiVA.org:mdh-38918DiVA, id: diva2:1195539
Conference
22nd IEEE International Conference on Emerging Technologies and Factory Automation (ETFA), Limassol, CYPRUS, SEP 12-15, 2017
Available from: 2018-04-05 Created: 2018-04-05 Last updated: 2019-11-11Bibliographically approved
In thesis
1. Characterization of Shared Resource Contention in Multi-core Systems
Open this publication in new window or tab >>Characterization of Shared Resource Contention in Multi-core Systems
2019 (English)Licentiate thesis, comprehensive summary (Other academic)
Abstract [en]

Multi-core computers are infamous for being hard to use in time-critical systems due to execution-time variations as an effect of shared resource contention. In this thesis we study the problem of shared resource contention which occurs when multiple applications executing on different cores do not have exclusive ownership of a shared resource. We investigate performance variations of parallel tasks in multi-core systems and present a method to pinpoint the source of the resource contention using existing hardware performance counters. Furthermore, we investigate methods to mitigate performance variations using resource isolation techniques. We present a methodology for verifying isolation and tested the achieved isolation using the Jailhouse hypervisor. We further investigate shared cache memory isolation techniques using a page coloring tool called PALLOC. Page-coloring is used for partitioning the cache, assigning specific cache lines to specific processes. Page coloring can however cause system performance degradation since it decreases the total amount of cache memory available for each process. Finally, we propose a dynamic partitioning assignment policy which assigns cache partitions to a process according to an adaptive model based on the process performance. The general conclusion from our investigations is that a large body of applications can suffer from shared resource contention and that techniques for mitigating resource contention are in dire need. Our methods measure and characterise applications, identifies resource contention and finally study isolation techniques.  

Place, publisher, year, edition, pages
Västerås: Mälardalen University, 2019. p. 160
Series
Mälardalen University Press Licentiate Theses, ISSN 1651-9256 ; 287
National Category
Computer Systems
Research subject
Computer Science
Identifiers
urn:nbn:se:mdh:diva-45932 (URN)978-91-7485-449-7 (ISBN)
Presentation
2019-12-17, Paros, Mälardalens högskola, Västerås, 13:15 (English)
Opponent
Supervisors
Available from: 2019-11-11 Created: 2019-11-11 Last updated: 2019-11-18Bibliographically approved

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Danielsson, JakobBehnam, MorisSjödin, Mikael

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