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Monitoring of Clock Synchronization in Cyber-Physical Systems: A Sensitivity Analysis
Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.ORCID-id: 0000-0003-2018-0996
Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.ORCID-id: 0000-0001-6497-4099
Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.ORCID-id: 0000-0002-7159-7508
Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.ORCID-id: 0000-0002-2419-2735
2017 (engelsk)Inngår i: International Conference on Internet of Things, Embedded Systems and Communications 2017 IINTEC 2017, 2017, s. 134-139Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

Clock synchronization is a core asset to protect when securing cyber-physical systems with a time-triggered architecture. One of the most challenging attacks to protect against is a delay attack, where an adversary delays one of the synchronization messages, making node offset calculations incorrect for keeping clocks synchronized. One way to detect a breach of clock synchronization is by monitoring the offsets calculated in a node according to the clock synchronization algorithm. The analysis in this work assumes that the distributed nodes need to share the same notion of time and for this reason, uses the IEEE 1588 standard. Using this approach, a monitor needs to make a decision about if and when a node is under attack, in which case rules and methods for decision making should be put in place. There are many aspects to consider when setting thresholds for the monitored values in order to make such a decision. In this work we conduct an analysis of monitor indicators and an investigation of their applicability. Further, we identify dependencies within the proposed monitoring approach and conduct a sensitivity analysis of the parameters needed to make a decision about a system being under attack. The analysis outcomes allow to identify important parameters to consider while thresholding indicators and enables a greater generality in their applicability.

sted, utgiver, år, opplag, sider
2017. s. 134-139
HSV kategori
Identifikatorer
URN: urn:nbn:se:mdh:diva-37090DOI: 10.1109/IINTEC.2017.8325927Scopus ID: 2-s2.0-85050601209ISBN: 9781538621134 (tryckt)OAI: oai:DiVA.org:mdh-37090DiVA, id: diva2:1152927
Konferanse
International Conference on Internet of Things, Embedded Systems and Communications 2017 IINTEC 2017, 20 Oct 2017, Gafsa, Tunisia
Prosjekter
READY - Research Environment for Advancing Low Latency InternetSafeCOP - Safe Cooperating Cyber-Physical Systems using Wireless Communication
Forskningsfinansiär
EU, Horizon 2020, 692529 VinnovaTilgjengelig fra: 2017-10-26 Laget: 2017-10-26 Sist oppdatert: 2019-04-18bibliografisk kontrollert

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