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Investigation on AUTOSAR-Compliant solutions for many-core architectures
Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.ORCID-id: 0000-0002-1276-3609
Research and Technology Centre, Robert Bosch, India.
CISTER/INESC-TEC, ISEP, Portugal.
Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.ORCID-id: 0000-0002-1687-930X
Vise andre og tillknytning
2015 (engelsk)Inngår i: Proceedings - 18th Euromicro Conference on Digital System Design, DSD 2015, 2015, s. 95-103Konferansepaper, Publicerat paper (Fagfellevurdert)
Resurstyp
Text
Abstract [en]

As of today, AUTOSAR is the de facto standard in the automotive industry, providing a common software architecture and development process for automotive applications. While this standard is originally written for singlecore operated Electronic Control Units (ECU), new guidelines and recommendations have been added recently to provide support for multicore architectures. This update came as a response to the steady increase of the number and complexity of the software functions embedded in modern vehicles, which call for the computing power of multicore execution environments. In this paper, we enumerate and analyze the design options and the challenges of porting AUTOSAR-based automotive applications onto multicore platforms. In particular, we investigate those options when considering the emerging many-core architectures that provide a more 'scalable' environment than the traditional multicore systems. Such platforms are suitable to enable massive parallel execution, and their design is more suitable for partitioning and isolating the software components.

sted, utgiver, år, opplag, sider
2015. s. 95-103
Emneord [en]
Automotive, AUTOSAR, E/E architecture, Many-core, Multicore, Application programs, Automobiles, Automotive industry, Control systems, Design, Software architecture, Systems analysis, Automotive applications, Electronic control units, Execution environments, Many core, Multi core, Multicore architectures, Computer architecture
HSV kategori
Identifikatorer
URN: urn:nbn:se:mdh:diva-31240DOI: 10.1109/DSD.2015.63ISI: 000382382300013Scopus ID: 2-s2.0-84958170096ISBN: 9781467380355 (tryckt)OAI: oai:DiVA.org:mdh-31240DiVA, id: diva2:908765
Konferanse
18th Euromicro Conference on Digital System Design, DSD 2015, 26 August 2015 through 28 August 2015
Tilgjengelig fra: 2016-03-03 Laget: 2016-03-03 Sist oppdatert: 2018-01-30bibliografisk kontrollert
Inngår i avhandling
1. Consolidating Automotive Real-Time Applications on Many-Core Platforms
Åpne denne publikasjonen i ny fane eller vindu >>Consolidating Automotive Real-Time Applications on Many-Core Platforms
2017 (engelsk)Doktoravhandling, med artikler (Annet vitenskapelig)
Abstract [en]

Automotive systems have transitioned from basic transportation utilities to sophisticated systems. The rapid increase in functionality comes along with a steep increase in software complexity. This manifests itself in a surge of the number of functionalities as well as the complexity of existing functions. To cope with this transition, current trends shift away from today’s distributed architectures towards integrated architectures, where previously distributed functionality is consolidated on fewer, more powerful, computers. This can ease the integration process, reduce the hardware complexity, and ultimately save costs.

One promising hardware platform for these powerful embedded computers is the many-core processor. A many-core processor hosts a vast number of compute cores, that are partitioned on tiles which are connected by a Network-on-Chip. These natural partitions can provide exclusive execution spaces for different applications, since most resources are not shared among them. Hence, natural building blocks towards temporally and spatially separated execution spaces exist as a result of the hardware architecture.

Additionally to the traditional task local deadlines, automotive applications are often subject to timing constraints on the data propagation through a chain of semantically related tasks. Such requirements pose challenges to the system designer as they are only able to verify them after the system synthesis (i.e. very late in the design process).

In this thesis, we present methods that transform complex timing constraints on the data propagation delay to precedence constraints between individual jobs. An execution framework for the cluster of the many-core is proposed that allows access to cluster external memory while it avoids contention on shared resources by design. A partitioning and configuration of the Network-on-Chip provides isolation between the different applications and reduces the access time from the clusters to external memory. Moreover, methods that facilitate the verification of data propagation delays in each development step are provided. 

sted, utgiver, år, opplag, sider
Västerås: Malardalen University, 2017
Serie
Mälardalen University Press Dissertations, ISSN 1651-4238 ; 246
Emneord
Many-Core, Automotive, Network-on-Chip, Real-Time, Timing analysis
HSV kategori
Forskningsprogram
datavetenskap
Identifikatorer
urn:nbn:se:mdh:diva-37182 (URN)978-91-7485-359-9 (ISBN)
Disputas
2017-12-19, Kappa, Mälardalens högskola, Västerås, 09:00 (engelsk)
Opponent
Veileder
Tilgjengelig fra: 2017-11-06 Laget: 2017-11-02 Sist oppdatert: 2017-11-27bibliografisk kontrollert

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