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Virtual environment for assembler code analysis
Mälardalens högskola, Akademin för innovation, design och teknik.
2012 (engelsk)Independent thesis Basic level (degree of Bachelor), 10 poäng / 15 hpOppgave
Abstract [en]

The hardware that computers consist of may for dierent reasons be

dicult to monitor, the price may be high or the hardware itself may be

unavailable. The most apparent reason though is the fact that hardware

generally is not transparent, i.e. the hardware does not provide informa-

tion on how a task is conducted, only its result. To provide a virtual en-

vironment that enables simulation according to specic input parameters

eectively solves many of the issues associated with hardware evaluation.

Simulation has applications everywhere, not the least in computer science:

From the low level of micro code all the way up to interpreting a high level

implementation on top of a profound software stack. This thesis entails a

virtual environment running a MIPS pipeline, although the simulator is

implemented in the high level language C, it executes simulation at the

fairly low level of assembler code. When provided with a user specied

conguration le, the environment allows simulation of MIPS assembler

programs, through the CPU, via interconnecting buses, ending at the level

of virtual memory.

sted, utgiver, år, opplag, sider
2012. , s. 38
HSV kategori
Identifikatorer
URN: urn:nbn:se:mdh:diva-18345OAI: oai:DiVA.org:mdh-18345DiVA, id: diva2:609706
Fag / kurs
Computer Science
Presentation
2012-11-16, Kappa, Högskoleplan 1 721 23, Västerås, 16:15 (svensk)
Uppsök
Technology
Veileder
Examiner
Tilgjengelig fra: 2013-03-12 Laget: 2013-03-07 Sist oppdatert: 2018-01-11bibliografisk kontrollert

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