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Publications (10 of 186) Show all publications
Struhar, V., Ashjaei, S. M., Behnam, M., Craciunas, S. & Papadopoulos, A. (2019). DART: Dynamic Bandwidth Distribution Framework for Virtualized Software Defined Networks. In: IEEE 45th Annual Conference of the Industrial Electronics Society IECON'19: . Paper presented at IEEE 45th Annual Conference of the Industrial Electronics Society IECON'19, 14 Oct 2019, Lisbon, Portugal.
Open this publication in new window or tab >>DART: Dynamic Bandwidth Distribution Framework for Virtualized Software Defined Networks
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2019 (English)In: IEEE 45th Annual Conference of the Industrial Electronics Society IECON'19, 2019Conference paper, Published paper (Refereed)
National Category
Engineering and Technology Computer Systems
Identifiers
urn:nbn:se:mdh:diva-45054 (URN)
Conference
IEEE 45th Annual Conference of the Industrial Electronics Society IECON'19, 14 Oct 2019, Lisbon, Portugal
Projects
Future factories in the CloudFORA - Fog Computing for Robotics and Industrial Automation
Available from: 2019-08-22 Created: 2019-08-22 Last updated: 2019-08-22Bibliographically approved
Salman, C. A., Struhar, V., Papadopoulos, A., Behnam, M. & Nolte, T. (2019). Fogification of industrial robotic systems: Research challenges. In: IoT-Fog 2019 - Proceedings of the 2019 Workshop on Fog Computing and the IoT: . Paper presented at 2019 Workshop on Fog Computing and the IoT, IoT-Fog 2019, 15 April 2019 (pp. 41-45). Association for Computing Machinery, Inc
Open this publication in new window or tab >>Fogification of industrial robotic systems: Research challenges
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2019 (English)In: IoT-Fog 2019 - Proceedings of the 2019 Workshop on Fog Computing and the IoT, Association for Computing Machinery, Inc , 2019, p. 41-45Conference paper, Published paper (Refereed)
Abstract [en]

To meet the demands of future automation systems, the architecture of traditional control systems such as the industrial robotic systems needs to evolve and new architectural paradigms need to be investigated. While cloud-based platforms provide services such as computational resources on demand, they do not address the requirements of real-time performance expected by control applications. Fog computing is a promising new architectural paradigm that complements the cloud-based platform by addressing its limitations. In this paper, we analyse the existing robot system architecture and propose a fog-based solution for industrial robotic systems that addresses the needs of future automation systems. We also propose the use of Time-Sensitive Networking (TSN) services for real-time communication and OPC-UA for information modelling within this architecture. Additionally, we discuss the main research challenges associated with the proposed architecture.

Place, publisher, year, edition, pages
Association for Computing Machinery, Inc, 2019
Keywords
Automation, Computer architecture, Fog, Industrial research, Internet of things, Robotics, Cloud based platforms, Computational resources, Control applications, Industrial robotic systems, Information modelling, Proposed architectures, Real time performance, Real-time communication, Fog computing
National Category
Computer and Information Sciences
Identifiers
urn:nbn:se:mdh:diva-43888 (URN)10.1145/3313150.3313225 (DOI)000473542200009 ()2-s2.0-85066045184 (Scopus ID)9781450366984 (ISBN)
Conference
2019 Workshop on Fog Computing and the IoT, IoT-Fog 2019, 15 April 2019
Available from: 2019-06-11 Created: 2019-06-11 Last updated: 2019-10-11Bibliographically approved
Balasubramanian, S. M., Afshar, S., Gai, P., Behnam, M. & J. Bril, R. (2019). Practical challenges for FSLM. In: Proceedings - 2018 IEEE 24th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2018: . Paper presented at 24th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2018 (pp. 238-239). Institute of Electrical and Electronics Engineers Inc., Article ID 8607257.
Open this publication in new window or tab >>Practical challenges for FSLM
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2019 (English)In: Proceedings - 2018 IEEE 24th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2018, Institute of Electrical and Electronics Engineers Inc. , 2019, p. 238-239, article id 8607257Conference paper, Published paper (Refereed)
Abstract [en]

The flexible spin-lock model (FSLM) unifies suspension-based and spin-based resource access protocols for partitioned fixed-priority preemptive scheduling based real-time multi-core platforms. Recent work has been done in defining the protocol for FSLM, providing schedulability analysis, and investigating the practical consequences of the theoretical model. FSLM complies to the AUTOSAR standard for the automotive industry, and prototype implementations of FSLM in the OSEK/VDX-complaint Erika Enterprise Real-Time Operating System have been realized. In this paper, we briefly describe some practical challenges to improve efficiency and generality. 

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2019
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-42811 (URN)10.1109/RTCSA.2018.00039 (DOI)000458980300030 ()2-s2.0-85061834140 (Scopus ID)9781538677599 (ISBN)
Conference
24th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2018
Available from: 2019-02-28 Created: 2019-02-28 Last updated: 2019-03-07Bibliographically approved
Danielsson, J., Marcus, J., Seceleanu, T., Behnam, M. & Sjödin, M. (2019). Run-time Cache-Partition Controller for Multi-core Systems. In: : . Paper presented at In 45th Annual Conference of the IEEE Industrial Electronics Society (IECON), 2019.
Open this publication in new window or tab >>Run-time Cache-Partition Controller for Multi-core Systems
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2019 (English)Conference paper, Published paper (Refereed)
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-45949 (URN)
Conference
In 45th Annual Conference of the IEEE Industrial Electronics Society (IECON), 2019
Available from: 2019-11-11 Created: 2019-11-11 Last updated: 2019-11-11Bibliographically approved
Tsog, N., Becker, M., Bruhn, F., Behnam, M. & Nolin, M. (2019). Static Allocation of Parallel Tasks to Improve Schedulability in CPU-GPU Heterogeneous Real-Time Systems. In: : . Paper presented at IEEE 45th Annual Conference of the Industrial Electronics Society, IECON2019.
Open this publication in new window or tab >>Static Allocation of Parallel Tasks to Improve Schedulability in CPU-GPU Heterogeneous Real-Time Systems
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2019 (English)Conference paper, Published paper (Refereed)
Abstract [en]

Autonomous driving is one of the main challenges of modern cars. Computer visions and intelligent on-board decision making are crucial in autonomous driving and require heterogeneous processors with high computing capability under low power consumption constraints. The progress of parallel computing using heterogeneous processing units is further supported by software frameworks like OpenCL, OpenMP, CUDA, and C++AMP. These frameworks allow the allocation of parallel computation on different compute resources. This, however, creates a difficulty in allocating the right computation segments to the right processing units in such a way that the complete system meets all its timing requirements. In this paper, we consider pre-runtime static allocations of parallel tasks to perform their execution either sequentially on CPU or in parallel using a GPU. This allows for improving any unbalanced use of GPU accelerators in a heterogeneous environment. By performing several heuristic algorithms, we show that the overuse of accelerators results in a bottle-neck of the entire system execution. The experimental results show that our allocation schemes that target a balanced use of GPU improve the system schedulability up to 90%.

Keywords
Parallel task, Parallel segment, Alternative execution, CPU-GPU, Heterogeneous processors, Real-time systems
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-45934 (URN)
Conference
IEEE 45th Annual Conference of the Industrial Electronics Society, IECON2019
Projects
DPAC - Dependable Platforms for Autonomous systems and Control
Available from: 2019-11-11 Created: 2019-11-11 Last updated: 2019-11-11
Danielsson, J., Seceleanu, T., Marcus, J., Behnam, M. & Sjödin, M. (2019). Testing Performance-Isolation in Multi-Core Systems. In: : . Paper presented at 43rd IEEE Annual Computer Software and Applications Conference, COMPSAC 2019; Milwaukee; United States; 15 July 2019 through 19 July 2019 (pp. 604-609). , Article ID 8754208.
Open this publication in new window or tab >>Testing Performance-Isolation in Multi-Core Systems
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2019 (English)Conference paper, Published paper (Refereed)
Abstract [en]

In this paper we present a methodology to be used for quantifying the level of performance isolation for a multi-core system. We have devised a test that can be applied to breaches of isolation in different computing resources that may be shared between different cores. We use this test to determine the level of isolation gained by using the Jailhouse hypervisor compared to a regular Linux system in terms of CPU isolation, cache isolation and memory bus isolation. Our measurements show that the Jailhouse hypervisor provides performance isolation of local computing resources such as CPU. We have also evaluated if any isolation could be gained for shared computing resources such as the system wide cache and the memory bus controller. Our tests show no measurable difference in partitioning between a regular Linux system and a Jailhouse partitioned system for shared resources. Using the Jailhouse hypervisor provides only a small noticeable overhead when executing multiple shared-resource intensive tasks on multiple cores, which implies that running Jailhouse in a memory saturated system will not be harmful. However, contention still exist in the memory bus and in the system-wide cache.

National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-45947 (URN)10.1109/COMPSAC.2019.00092 (DOI)978-1-7281-2607-4 (ISBN)
Conference
43rd IEEE Annual Computer Software and Applications Conference, COMPSAC 2019; Milwaukee; United States; 15 July 2019 through 19 July 2019
Available from: 2019-11-11 Created: 2019-11-11 Last updated: 2019-11-11Bibliographically approved
Marcus, J., Ermedahl, A., Eldh, S., Behnam, M. & Lisper, B. (2018). Enforcing Quality of Service Through Hardware Resource Aware Process Scheduling. In: IEEE International Conference on Emerging Technologies and Factory Automation, ETFA: . Paper presented at 23rd IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2018, 4 September 2018 through 7 September 2018 (pp. 329-336). Institute of Electrical and Electronics Engineers Inc.
Open this publication in new window or tab >>Enforcing Quality of Service Through Hardware Resource Aware Process Scheduling
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2018 (English)In: IEEE International Conference on Emerging Technologies and Factory Automation, ETFA, Institute of Electrical and Electronics Engineers Inc. , 2018, p. 329-336Conference paper, Published paper (Refereed)
Abstract [en]

Hardware manufacturers are forced to improve system performance continuously due to advanced and computationally demanding system functions. Unfortunately-more powerful hardware leads to increased costs. Instead, companies attempt to improve performance by consolidating multiple functions to share the same hardware to exploit existing performance instead. In legacy systems, each function had individual execution environment that guaranteed HW resource isolation and therefore the Quality of Service (QoS). Consolidation of multiple functions increases the risk of shared resource congestion. Current process schedulers focus on time quanta and do not consider shared resources. We present a novel process scheduler that complements current process schedulers by enforcing QoS though Shared Resource Aware (SRA) process scheduling. The SRA scheduler programs the Performance Monitoring Unit (PMU) to generate an overflow interrupt when reaching the assigned process resource quota. The scheduler has the possibility to swap out the process when receiving the interrupt allowing it to enforce the QoS for the scheduled process. We have implemented our scheduling policy as a new scheduling class in Linux. Our experiments show that it efficiently enforces QoS without seriously affect the shared resource usage of other processes executing on the same HW. © 2018 IEEE.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2018
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-41507 (URN)10.1109/ETFA.2018.8502609 (DOI)000449334500040 ()2-s2.0-85057231617 (Scopus ID)9781538671085 (ISBN)
Conference
23rd IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2018, 4 September 2018 through 7 September 2018
Available from: 2018-12-06 Created: 2018-12-06 Last updated: 2018-12-27Bibliographically approved
Jagemar, M., Ermedahl, A., Eldh, S., Behnam, M. & Lisper, B. (2018). Enforcing Quality of Service Through Hardware Resource Aware Process Scheduling. In: 2018 IEEE 23RD INTERNATIONAL CONFERENCE ON EMERGING TECHNOLOGIES AND FACTORY AUTOMATION (ETFA): . Paper presented at 23rd IEEE International Conference on Emerging Technologies and Factory Automation (ETFA), SEP 04-07, 2018, Politecnico Torino, Torino, ITALY (pp. 329-336). IEEE
Open this publication in new window or tab >>Enforcing Quality of Service Through Hardware Resource Aware Process Scheduling
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2018 (English)In: 2018 IEEE 23RD INTERNATIONAL CONFERENCE ON EMERGING TECHNOLOGIES AND FACTORY AUTOMATION (ETFA), IEEE , 2018, p. 329-336Conference paper, Published paper (Refereed)
Abstract [en]

Hardware manufacturers are forced to improve system performance continuously due to advanced and computationally demanding system functions. Unfortunately - more powerful hardware leads to increased costs. Instead, companies attempt to improve performance by consolidating multiple functions to share the same hardware to exploit existing performance instead. In legacy systems, each function had individual execution environment that guaranteed HW resource isolation and therefore the Quality of Service (QoS). Consolidation of multiple functions increases the risk of shared resource congestion. Current process schedulers focus on time quanta and do not consider shared resources. We present a novel process scheduler that complements current process schedulers by enforcing QoS though Shared Resource Aware (SRA) process scheduling. The SRA scheduler programs the Performance Monitoring Unit (PMU) to generate an overflow interrupt when reaching the assigned process resource quota. The scheduler has the possibility to swap out the process when receiving the interrupt allowing it to enforce the QoS for the scheduled process. We have implemented our scheduling policy as a new scheduling class in Linux. Our experiments show that it efficiently enforces QoS without seriously affect the shared resource usage of other processes executing on the same HW.

Place, publisher, year, edition, pages
IEEE, 2018
Series
IEEE International Conference on Emerging Technologies and Factory Automation-ETFA, ISSN 1946-0740
National Category
Computer Engineering Computer Systems
Identifiers
urn:nbn:se:mdh:diva-41379 (URN)000449334500040 ()978-1-5386-7108-5 (ISBN)
Conference
23rd IEEE International Conference on Emerging Technologies and Factory Automation (ETFA), SEP 04-07, 2018, Politecnico Torino, Torino, ITALY
Available from: 2019-10-18 Created: 2019-10-18 Last updated: 2019-10-18
Becker, M., Mubeen, S., Behnam, M. & Nolte, T. (2018). Extending Automotive Legacy Systems with Existing End-to-End Timing Constraints. In: 14th International Conference on Information Technology : New Generations ITNG'17: . Paper presented at 14th International Conference on Information Technology : New Generations ITNG'17, 10-12 Apr 2017, Las Vegas, United States (pp. 597-605). , 558
Open this publication in new window or tab >>Extending Automotive Legacy Systems with Existing End-to-End Timing Constraints
2018 (English)In: 14th International Conference on Information Technology : New Generations ITNG'17, 2018, Vol. 558, p. 597-605Conference paper, Published paper (Refereed)
Abstract [en]

Developing automotive software is becoming in- creasingly challenging due to continuous increase in its size and complexity. The development challenge is amplified when the industrial requirements dictate extensions to the legacy (previously developed) automotive software while requiring to meet the existing timing requirements. To cope with these challenges, sufficient techniques and tooling to support the modeling and timing analysis of such systems at earlier development phases is needed. Within this context, we focus on the extension of software component chains in the software architectures of automotive legacy systems. Selecting the sampling frequency, i.e. period, for newly added software components is crucial to meet the timing requirements of the chains. The challenges in selecting periods are identified. It is further shown how to automatically assign periods to software components, such that the end-to-end timing requirements are met while the runtime overhead is minimized. An industrial case study is presented that demonstrates the applicability of the proposed solution to industrial problems.

Keywords
AutomotiveDesign LevelAbstractionTiming AnalysisEnd-to-EndData AgeRealTime
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-35440 (URN)2-s2.0-85048328854 (Scopus ID)9783319549774 (ISBN)
Conference
14th International Conference on Information Technology : New Generations ITNG'17, 10-12 Apr 2017, Las Vegas, United States
Projects
PREMISE - Predictable Multicore SystemsDPAC - Dependable Platforms for Autonomous systems and ControlPreView: Developing Predictable Vehicle Software on Multi-core
Available from: 2017-06-09 Created: 2017-06-09 Last updated: 2018-06-21Bibliographically approved
Tsog, N., Behnam, M., Nolin, M. & Bruhn, F. (2018). Intelligent Data Processing using In-Orbit Advanced Algorithms on Heterogeneous System Architecture. In: IEEE Aerospace Conference 2018 IEEEAC2018: . Paper presented at IEEE Aerospace Conference 2018 IEEEAC2018, 03 Mar 2018, Big Sky, United States (pp. 1-8).
Open this publication in new window or tab >>Intelligent Data Processing using In-Orbit Advanced Algorithms on Heterogeneous System Architecture
2018 (English)In: IEEE Aerospace Conference 2018 IEEEAC2018, 2018, p. 1-8Conference paper, Published paper (Refereed)
Abstract [en]

In recent years, commercial exploitation of small satellites and CubeSats has rapidly increased. Time to market of processed customer data products is becoming an important differentiator between solution providers and satellite constellation operators. Timely and accurate data dissemination is the key to success in the commercial usage of small satellite constellations which is ultimately dependent on a high degree of autonomous fleet management and automated decision support. The traditional way for disseminating data is limited by on the communication capability of the satellite and the ground terminal availability. Even though cloud computing solutions on the ground offer high analytical performance, getting the data from the space infrastructure to the ground servers poses a bottleneck of data analysis and distribution. On the other hand, adopting advanced and intelligent algorithms onboard offers the ability of autonomy, tasking of operations, and fast customer generation of low latency conclusions, or even real-time communication with assets on the ground or other sensors in a multi-sensor configuration. In this paper, the advantages of intelligent onboard processing using advanced algorithms for Heterogeneous System Architecture (HSA) compliant onboard data processing systems are explored. The onboard data processing architecture is designed to handle a large amount of high-speed streaming data and provides hardware redundancy to be qualified for the space mission application domain. We conduct an experimental study to evaluate the performance analysis by using image recognition algorithms based on an open source intelligent machine library 'MIOpen' and an open standard 'OpenVX'. OpenVX is a cross-platform computer vision library.

Series
IEEE Aerospace Conference Proceedings, ISSN 1095-323X
Keywords
Heterogeneous System Architecture (HSA)Intelligent Data ProcessingMIOpenOpenVXCubeSatCPU-GPUEnergy consumption
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-38628 (URN)10.1109/AERO.2018.8396536 (DOI)2-s2.0-85049840022 (Scopus ID)
Conference
IEEE Aerospace Conference 2018 IEEEAC2018, 03 Mar 2018, Big Sky, United States
Projects
DPAC - Dependable Platforms for Autonomous systems and Control
Available from: 2018-03-06 Created: 2018-03-06 Last updated: 2019-11-11Bibliographically approved
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0002-1687-930X

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