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Salman, C. A., Struhar, V., Papadopoulos, A., Behnam, M. & Nolte, T. (2019). Fogification of industrial robotic systems: Research challenges. In: IoT-Fog 2019 - Proceedings of the 2019 Workshop on Fog Computing and the IoT: . Paper presented at 2019 Workshop on Fog Computing and the IoT, IoT-Fog 2019, 15 April 2019 (pp. 41-45). Association for Computing Machinery, Inc
Open this publication in new window or tab >>Fogification of industrial robotic systems: Research challenges
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2019 (English)In: IoT-Fog 2019 - Proceedings of the 2019 Workshop on Fog Computing and the IoT, Association for Computing Machinery, Inc , 2019, p. 41-45Conference paper, Published paper (Refereed)
Abstract [en]

To meet the demands of future automation systems, the architecture of traditional control systems such as the industrial robotic systems needs to evolve and new architectural paradigms need to be investigated. While cloud-based platforms provide services such as computational resources on demand, they do not address the requirements of real-time performance expected by control applications. Fog computing is a promising new architectural paradigm that complements the cloud-based platform by addressing its limitations. In this paper, we analyse the existing robot system architecture and propose a fog-based solution for industrial robotic systems that addresses the needs of future automation systems. We also propose the use of Time-Sensitive Networking (TSN) services for real-time communication and OPC-UA for information modelling within this architecture. Additionally, we discuss the main research challenges associated with the proposed architecture.

Place, publisher, year, edition, pages
Association for Computing Machinery, Inc, 2019
Keywords
Automation, Computer architecture, Fog, Industrial research, Internet of things, Robotics, Cloud based platforms, Computational resources, Control applications, Industrial robotic systems, Information modelling, Proposed architectures, Real time performance, Real-time communication, Fog computing
National Category
Computer and Information Sciences
Identifiers
urn:nbn:se:mdh:diva-43888 (URN)10.1145/3313150.3313225 (DOI)2-s2.0-85066045184 (Scopus ID)9781450366984 (ISBN)
Conference
2019 Workshop on Fog Computing and the IoT, IoT-Fog 2019, 15 April 2019
Available from: 2019-06-11 Created: 2019-06-11 Last updated: 2019-06-11Bibliographically approved
Balasubramanian, S. M., Afshar, S., Gai, P., Behnam, M. & J. Bril, R. (2019). Practical challenges for FSLM. In: Proceedings - 2018 IEEE 24th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2018: . Paper presented at 24th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2018 (pp. 238-239). Institute of Electrical and Electronics Engineers Inc., Article ID 8607257.
Open this publication in new window or tab >>Practical challenges for FSLM
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2019 (English)In: Proceedings - 2018 IEEE 24th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2018, Institute of Electrical and Electronics Engineers Inc. , 2019, p. 238-239, article id 8607257Conference paper, Published paper (Refereed)
Abstract [en]

The flexible spin-lock model (FSLM) unifies suspension-based and spin-based resource access protocols for partitioned fixed-priority preemptive scheduling based real-time multi-core platforms. Recent work has been done in defining the protocol for FSLM, providing schedulability analysis, and investigating the practical consequences of the theoretical model. FSLM complies to the AUTOSAR standard for the automotive industry, and prototype implementations of FSLM in the OSEK/VDX-complaint Erika Enterprise Real-Time Operating System have been realized. In this paper, we briefly describe some practical challenges to improve efficiency and generality. 

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2019
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-42811 (URN)10.1109/RTCSA.2018.00039 (DOI)000458980300030 ()2-s2.0-85061834140 (Scopus ID)9781538677599 (ISBN)
Conference
24th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2018
Available from: 2019-02-28 Created: 2019-02-28 Last updated: 2019-03-07Bibliographically approved
Marcus, J., Ermedahl, A., Eldh, S., Behnam, M. & Lisper, B. (2018). Enforcing Quality of Service Through Hardware Resource Aware Process Scheduling. In: IEEE International Conference on Emerging Technologies and Factory Automation, ETFA: . Paper presented at 23rd IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2018, 4 September 2018 through 7 September 2018 (pp. 329-336). Institute of Electrical and Electronics Engineers Inc.
Open this publication in new window or tab >>Enforcing Quality of Service Through Hardware Resource Aware Process Scheduling
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2018 (English)In: IEEE International Conference on Emerging Technologies and Factory Automation, ETFA, Institute of Electrical and Electronics Engineers Inc. , 2018, p. 329-336Conference paper, Published paper (Refereed)
Abstract [en]

Hardware manufacturers are forced to improve system performance continuously due to advanced and computationally demanding system functions. Unfortunately-more powerful hardware leads to increased costs. Instead, companies attempt to improve performance by consolidating multiple functions to share the same hardware to exploit existing performance instead. In legacy systems, each function had individual execution environment that guaranteed HW resource isolation and therefore the Quality of Service (QoS). Consolidation of multiple functions increases the risk of shared resource congestion. Current process schedulers focus on time quanta and do not consider shared resources. We present a novel process scheduler that complements current process schedulers by enforcing QoS though Shared Resource Aware (SRA) process scheduling. The SRA scheduler programs the Performance Monitoring Unit (PMU) to generate an overflow interrupt when reaching the assigned process resource quota. The scheduler has the possibility to swap out the process when receiving the interrupt allowing it to enforce the QoS for the scheduled process. We have implemented our scheduling policy as a new scheduling class in Linux. Our experiments show that it efficiently enforces QoS without seriously affect the shared resource usage of other processes executing on the same HW. © 2018 IEEE.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2018
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-41507 (URN)10.1109/ETFA.2018.8502609 (DOI)000449334500040 ()2-s2.0-85057231617 (Scopus ID)9781538671085 (ISBN)
Conference
23rd IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2018, 4 September 2018 through 7 September 2018
Available from: 2018-12-06 Created: 2018-12-06 Last updated: 2018-12-27Bibliographically approved
Becker, M., Mubeen, S., Behnam, M. & Nolte, T. (2018). Extending Automotive Legacy Systems with Existing End-to-End Timing Constraints. In: 14th International Conference on Information Technology : New Generations ITNG'17: . Paper presented at 14th International Conference on Information Technology : New Generations ITNG'17, 10-12 Apr 2017, Las Vegas, United States (pp. 597-605). , 558
Open this publication in new window or tab >>Extending Automotive Legacy Systems with Existing End-to-End Timing Constraints
2018 (English)In: 14th International Conference on Information Technology : New Generations ITNG'17, 2018, Vol. 558, p. 597-605Conference paper, Published paper (Refereed)
Abstract [en]

Developing automotive software is becoming in- creasingly challenging due to continuous increase in its size and complexity. The development challenge is amplified when the industrial requirements dictate extensions to the legacy (previously developed) automotive software while requiring to meet the existing timing requirements. To cope with these challenges, sufficient techniques and tooling to support the modeling and timing analysis of such systems at earlier development phases is needed. Within this context, we focus on the extension of software component chains in the software architectures of automotive legacy systems. Selecting the sampling frequency, i.e. period, for newly added software components is crucial to meet the timing requirements of the chains. The challenges in selecting periods are identified. It is further shown how to automatically assign periods to software components, such that the end-to-end timing requirements are met while the runtime overhead is minimized. An industrial case study is presented that demonstrates the applicability of the proposed solution to industrial problems.

Keywords
AutomotiveDesign LevelAbstractionTiming AnalysisEnd-to-EndData AgeRealTime
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-35440 (URN)2-s2.0-85048328854 (Scopus ID)9783319549774 (ISBN)
Conference
14th International Conference on Information Technology : New Generations ITNG'17, 10-12 Apr 2017, Las Vegas, United States
Projects
PREMISE - Predictable Multicore SystemsDPAC - Dependable Platforms for Autonomous systems and ControlPreView: Developing Predictable Vehicle Software on Multi-core
Available from: 2017-06-09 Created: 2017-06-09 Last updated: 2018-06-21Bibliographically approved
Tsog, N., Behnam, M., Nolin, M. & Bruhn, F. (2018). Intelligent Data Processing using In-Orbit Advanced Algorithms on Heterogeneous System Architecture. In: IEEE Aerospace Conference 2018 IEEEAC2018: . Paper presented at IEEE Aerospace Conference 2018 IEEEAC2018, 03 Mar 2018, Big Sky, United States (pp. 1-8).
Open this publication in new window or tab >>Intelligent Data Processing using In-Orbit Advanced Algorithms on Heterogeneous System Architecture
2018 (English)In: IEEE Aerospace Conference 2018 IEEEAC2018, 2018, p. 1-8Conference paper, Published paper (Refereed)
Abstract [en]

In recent years, commercial exploitation of small satellites and CubeSats has rapidly increased. Time to market of processed customer data products is becoming an important differentiator between solution providers and satellite constellation operators. Timely and accurate data dissemination is the key to success in the commercial usage of small satellite constellations which is ultimately dependent on a high degree of autonomous fleet management and automated decision support. The traditional way for disseminating data is limited by on the communication capability of the satellite and the ground terminal availability. Even though cloud computing solutions on the ground offer high analytical performance, getting the data from the space infrastructure to the ground servers poses a bottleneck of data analysis and distribution. On the other hand, adopting advanced and intelligent algorithms onboard offers the ability of autonomy, tasking of operations, and fast customer generation of low latency conclusions, or even real-time communication with assets on the ground or other sensors in a multi-sensor configuration. In this paper, the advantages of intelligent onboard processing using advanced algorithms for Heterogeneous System Architecture (HSA) compliant onboard data processing systems are explored. The onboard data processing architecture is designed to handle a large amount of high-speed streaming data and provides hardware redundancy to be qualified for the space mission application domain. We conduct an experimental study to evaluate the performance analysis by using image recognition algorithms based on an open source intelligent machine library 'MIOpen' and an open standard 'OpenVX'. OpenVX is a cross-platform computer vision library.

Series
IEEE Aerospace Conference Proceedings, ISSN 1095-323X
Keywords
Heterogeneous System Architecture (HSA)Intelligent Data ProcessingMIOpenOpenVXCubeSatCPU-GPUEnergy consumption
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-38628 (URN)10.1109/AERO.2018.8396536 (DOI)2-s2.0-85049840022 (Scopus ID)
Conference
IEEE Aerospace Conference 2018 IEEEAC2018, 03 Mar 2018, Big Sky, United States
Projects
DPAC - Dependable Platforms for Autonomous systems and Control
Available from: 2018-03-06 Created: 2018-03-06 Last updated: 2018-09-18Bibliographically approved
Danielsson, J., Marcus, J., Behnam, M., Sjödin, M. & Seceleanu, T. (2018). Measurement-based evaluation of data-parallelism for OpenCV feature-detection algorithms. In: Staying Smarter in a Smartening World COMPSAC'18: . Paper presented at 42nd IEEE Computer Software and Applications Conference, COMPSAC 2018; Tokyo; Japan; 23 July 2018 through 27 July 2018 (pp. 701-710).
Open this publication in new window or tab >>Measurement-based evaluation of data-parallelism for OpenCV feature-detection algorithms
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2018 (English)In: Staying Smarter in a Smartening World COMPSAC'18, 2018, p. 701-710Conference paper, Published paper (Refereed)
Abstract [en]

We investigate the effects on the execution time, shared cache usage and speed-up gains when using data-partitioned parallelism for the feature detection algorithms available in the OpenCV library. We use a data set of three different images which are scaled to six different sizes to exercise the different cache memories of our test architectures. Our measurements reveal that the algorithms using the default settings of OpenCV behave very differently when using data-partitioned parallelism. Our investigation shows that the executions of the algorithms SURF, Dense and MSER correlate to L3-cache usage and they are therefore not suitable for data-partitioned parallelism on multi-core CPUs. Other algorithms: BRISK, FAST, ORB, HARRIS, GFTT, SimpleBlob and SIFT, do not correlate to L3-cache in the same extent, and they are therefore more suitable for data-partitioned parallelism. Furthermore, the SIFT algorithm provides the most stable speed-up, resulting in an execution between 3 and 3.5 times faster than the original execution time for all image sizes. We also have evaluated the hardware resource usage by measuring the algorithm execution time simultaneously with the L3-cache usage. We have used our measurements to conclude which algorithms are suitable for parallelization on hardware with shared resources.

Keywords
Multi-core, OpenCV, Cache
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-40855 (URN)10.1109/COMPSAC.2018.00105 (DOI)2-s2.0-85055434865 (Scopus ID)9781538626665 (ISBN)
Conference
42nd IEEE Computer Software and Applications Conference, COMPSAC 2018; Tokyo; Japan; 23 July 2018 through 27 July 2018
Projects
DPAC - Dependable Platforms for Autonomous systems and Control
Available from: 2018-09-20 Created: 2018-09-20 Last updated: 2019-01-04Bibliographically approved
Jan, M. & Behnam, M. (2018). Message from the program chairs. Paper presented at 10 October 2018 through 12 October 2018. 26th International Conference on Real-Time Networks and Systems, RTNS 2018
Open this publication in new window or tab >>Message from the program chairs
2018 (English)In: 26th International Conference on Real-Time Networks and Systems, RTNS 2018Article in journal, Editorial material (Refereed) Published
Place, publisher, year, edition, pages
Association for Computing Machinery, 2018
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:mdh:diva-41444 (URN)2-s2.0-85056724229 (Scopus ID)
Conference
10 October 2018 through 12 October 2018
Available from: 2018-11-29 Created: 2018-11-29 Last updated: 2018-11-29Bibliographically approved
Aglianò, S., Ashjaei, S. M., Behnam, M. & Lo Bello, L. (2018). Resource Management and Control in Virtualized SDN Networks. In: CSI International Symposium on Real-Time and Embedded Systems and Technologies REST'18: . Paper presented at CSI International Symposium on Real-Time and Embedded Systems and Technologies REST'18, 09 May 2018, Tehran, Iran (pp. 47-53).
Open this publication in new window or tab >>Resource Management and Control in Virtualized SDN Networks
2018 (English)In: CSI International Symposium on Real-Time and Embedded Systems and Technologies REST'18, 2018, p. 47-53Conference paper, Published paper (Refereed)
Abstract [en]

Software defined networking and network virtual-ization are widely considered promising techniques for reducing the complexity of network management in many contexts that require high Quality of Service (QoS) and the support for heterogeneous architectures. In this paper we address a network architecture, here called a virtualized SDN network, that combines the benefits of SDN and virtualization. To cope with the demand for efficiently sharing a platform among several services, here a resource management mechanism to reserve and control network resources among various services in the virtualized SDN networks is proposed. The mechanism is implemented on an SDN controller and a set of experiments show the effectiveness of the proposed approach.

National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-38641 (URN)10.1109/RTEST.2018.8397078 (DOI)000467076600007 ()2-s2.0-85050505349 (Scopus ID)9781538614754 (ISBN)
Conference
CSI International Symposium on Real-Time and Embedded Systems and Technologies REST'18, 09 May 2018, Tehran, Iran
Projects
Future factories in the Cloud
Available from: 2018-03-02 Created: 2018-03-02 Last updated: 2019-05-24Bibliographically approved
Becker, M., Mubeen, S., Dasari, D., Behnam, M. & Nolte, T. (2018). Scheduling Multi-Rate Real-Time Applications on Clustered Many-Core Architectures with Memory Constraints. In: 2018 23RD ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC): . Paper presented at 23rd Asia and South Pacific Design Automation Conference ASP-DAC'18, 22 Jan 2018, Jeju Island, South Korea (pp. 560-567).
Open this publication in new window or tab >>Scheduling Multi-Rate Real-Time Applications on Clustered Many-Core Architectures with Memory Constraints
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2018 (English)In: 2018 23RD ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2018, p. 560-567Conference paper, Published paper (Refereed)
Abstract [en]

Access to shared memory is one of the main chal- lenges for many-core processors. One group of scheduling strategies for such platforms focuses on the division of tasks’ access to shared memory and code execution. This allows to orchestrate the access to shared local and off-chip memory in a way such that access contention between different compute cores is avoided by design. In this work, an execution framework is introduced that leverages local memory by statically allocating a subset of tasks to cores. This reduces the access times to shared memory, as off-chip memory access is avoided, and in turn improves the schedulability of such systems. A Constrained Programming (CP) formulation is presented to selects the statically allocated tasks and generates the complete system schedule. Evaluations show that the pro- posed approach yields an up to 21% higher schedulability ratio than related work, and a case study demonstrates its applicability to industrial problems.

Keywords
Many-CoreContention-Free ExecutionReal-TimeMemory Constraints
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-37064 (URN)000426987100108 ()2-s2.0-85045349833 (Scopus ID)978-1-5090-0602-1 (ISBN)
Conference
23rd Asia and South Pacific Design Automation Conference ASP-DAC'18, 22 Jan 2018, Jeju Island, South Korea
Projects
PREMISE - Predictable Multicore SystemsDPAC - Dependable Platforms for Autonomous systems and ControlPreView: Developing Predictable Vehicle Software on Multi-core
Available from: 2017-11-02 Created: 2017-11-02 Last updated: 2018-04-26Bibliographically approved
Struhar, V., Papadopoulos, A. & Behnam, M. (2018). Work-in-Progress: Fog Computing for Adaptive Human-Robot Collaboration. In: International Conference on Embedded Software 2018 EMSOFT2018: . Paper presented at International Conference on Embedded Software 2018 EMSOFT2018, 30 Sep 2018, Turin, Italy. , Article ID 8537213.
Open this publication in new window or tab >>Work-in-Progress: Fog Computing for Adaptive Human-Robot Collaboration
2018 (English)In: International Conference on Embedded Software 2018 EMSOFT2018, 2018, article id 8537213Conference paper, Published paper (Refereed)
Abstract [en]

Fog computing is an emerging technology that enables the design of novel time sensitive industrial applications. This new computing paradigm also opens several new research challenges in different scientific domains, ranging from computer architectures to networks, from robotics to real-time systems. In this paper, we present a use case in the human-robot collaboration domain, and we identify some of the most relevant research challenges.

National Category
Engineering and Technology Computer Systems
Identifiers
urn:nbn:se:mdh:diva-41712 (URN)10.1109/EMSOFT.2018.8537213 (DOI)2-s2.0-85059383615 (Scopus ID)978-1-5386-5564-1 (ISBN)
Conference
International Conference on Embedded Software 2018 EMSOFT2018, 30 Sep 2018, Turin, Italy
Projects
FORA - Fog Computing for Robotics and Industrial Automation
Available from: 2018-12-20 Created: 2018-12-20 Last updated: 2019-01-17Bibliographically approved
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0002-1687-930X

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