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Shah, M. B., Husain, A. R., Aysan, H., Punnekkat, S., Dobrin, R. & Bender, F. A. (2016). Error Handling Algorithm and Probabilistic Analysis Under Fault for CAN-Based Steer-by-Wire System. IEEE Transactions on Industrial Informatics, 12(3), 1017-1034, Article ID 7435293.
Open this publication in new window or tab >>Error Handling Algorithm and Probabilistic Analysis Under Fault for CAN-Based Steer-by-Wire System
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2016 (English)In: IEEE Transactions on Industrial Informatics, ISSN 1551-3203, E-ISSN 1941-0050, Vol. 12, no 3, p. 1017-1034, article id 7435293Article in journal (Refereed) Published
Abstract [en]

This paper proposes an efficient way to handle fault in controller area network (CAN)-based networked control system (NCS). A fault in a bus line of CAN will induce a data error which will result in data dropout or time delay, and subsequently may lead to performance degradation or system instability. A strategy to handle fault occurrence in CAN bus is proposed to properly analyze the effect of the fault to CAN-based NCS performance. The fault occurrences are modeled based on fault interarrival time, fault bursts' duration, and Poisson law. Using fault and messages' attributes, response time analysis (RTA) is performed and the probability of control message missing its deadline is calculated. Utilizing the new error handling algorithm to replace the native error handling of CAN, the probability of a control message missing its deadline can be translated into the probability of data dropout for control message. This methodology is evaluated using steer-by-wire system of vehicle to analyze the effect of fault occurrences in CAN. It is found that the proposed error handling mechanism has resulted in better NCS performance and the range of data dropout probability for control message also could be obtained, which serves as crucial input for NCS controller design.

Keywords
Controller area network (CAN), data error handling, fault model, networked control system (NCS), probabilistic schedulability analysis, steer-by-wire (SbW) system, Algorithms, Control system analysis, Control system synthesis, Control systems, Data handling, Delay control systems, Errors, Networked control systems, Probability, Process control, System stability, Time delay, Wire, Controller area network, Data errors, Schedulability analysis, Steer-by-wire, Controllers
National Category
Computer Engineering
Identifiers
urn:nbn:se:mdh:diva-32382 (URN)10.1109/TII.2016.2543232 (DOI)000378530300013 ()2-s2.0-84976295515 (Scopus ID)
Available from: 2016-07-14 Created: 2016-07-14 Last updated: 2018-01-10Bibliographically approved
Aysan, H., Bate, I., Graydon, P. & Punnekkat, S. (2013). Improving Reliability of Real-Time Systems through Value and Time Voting. In: : . Paper presented at 19th IEEE Pacific Rim International Symposium on Dependable Computing, Vancouver, British Columbia, Canada December 2-4, 2013 (pp. 21-30).
Open this publication in new window or tab >>Improving Reliability of Real-Time Systems through Value and Time Voting
2013 (English)Conference paper, Published paper (Refereed)
Abstract [en]

Critical systems often use N-modular redundancy to tolerate faults in subsystems. Traditional approaches to N-modular redundancy in distributed, loosely-synchronised, real-time systems handle time and value errors separately: a voter detects value errors, while watchdog-based health monitoring detects timing errors. In prior work, we proposed the integrated Voting on Time and Value (VTV) strategy, which allows both timing and value errors to be detected simultaneously. In this paper, we show how VTV can be harnessed as part of an overall fault tolerance strategy and evaluate its performance using a well-known control application, the Inverted Pendulum. Through extensive simulations, we compare the performance of Inverted Pendulum systems which employs VTV and alternative voting strategies to demonstrate that VTV better tolerates well-recognised faults in this realistically complex control problem.

National Category
Engineering and Technology
Identifiers
urn:nbn:se:mdh:diva-23854 (URN)10.1109/PRDC.2013.11 (DOI)000355537700003 ()2-s2.0-84906751830 (Scopus ID)978-0-7695-5130-2 (ISBN)
Conference
19th IEEE Pacific Rim International Symposium on Dependable Computing, Vancouver, British Columbia, Canada December 2-4, 2013
Available from: 2013-12-27 Created: 2013-12-19 Last updated: 2015-11-16Bibliographically approved
Aysan, H., Dobrin, R. & Punnekkat, S. (2013). Probabilistic schedulability analysis for fault tolerant tasks under stochastic error occurrences. In: 19th International Conference on Control Systems and Computer Science, CSCS 2013: Proceedings. Paper presented at 19th International Conference on Control Systems and Computer Science, CSCS 2013, 29 May 2013 through 31 May 2013, Bucharest (pp. 113-120).
Open this publication in new window or tab >>Probabilistic schedulability analysis for fault tolerant tasks under stochastic error occurrences
2013 (English)In: 19th International Conference on Control Systems and Computer Science, CSCS 2013: Proceedings, 2013, p. 113-120Conference paper, Published paper (Refereed)
Abstract [en]

In dependable real-time systems, provision of schedulability guarantees for task sets under realistic fault and error assumptions is an essential requirement, though complex and tricky to achieve. An important factor to be considered in this context is the random nature of occurrences of faults and errors, which, if addressed in the traditional schedulability analysis by assuming a rigid worst case occurrence scenario, may lead to inaccurate results. In this paper we first propose a stochastic fault and error model which has the capability of modeling error bursts in lieu of the commonly used simplistic error assumptions in processor scheduling. We then present a novel schedulability analysis that accounts for a range of worst case scenarios generated by stochastic error burst occurrences on the response times of tasks scheduled under the fixed priority scheduling (FPS) policy. Finally, we describe a methodology for the calculation of probabilistic schedulability guarantees as a weighted sum of the conditional probabilities of schedulability under specified error burst characteristics.

Series
Proceedings - 19th International Conference on Control Systems and Computer Science, CSCS 2013
Keywords
Dependability, Fault tolerance, Probabilistic schedulability anaysis, Real-time systems, Time redundancy
National Category
Engineering and Technology
Identifiers
urn:nbn:se:mdh:diva-21440 (URN)10.1109/CSCS.2013.49 (DOI)000328493800017 ()2-s2.0-84883391670 (Scopus ID)
Conference
19th International Conference on Control Systems and Computer Science, CSCS 2013, 29 May 2013 through 31 May 2013, Bucharest
Available from: 2013-09-13 Created: 2013-09-13 Last updated: 2015-11-16Bibliographically approved
Aysan, H., Dobrin, R. & Punnekkat, S. (2013). Schedulability guarantees for dependable distributed real-time systems under error bursts. In: Advances in Intelligent Systems and Computing: (pp. 393-406). Springer Verlag, 187
Open this publication in new window or tab >>Schedulability guarantees for dependable distributed real-time systems under error bursts
2013 (English)In: Advances in Intelligent Systems and Computing, Springer Verlag , 2013, Vol. 187, p. 393-406Conference paper, Published paper (Refereed)
Abstract [en]

In dependable embedded real-time systems, typically built of computing nodes exchanging messages over reliability-constrained networks, the provision of schedulability guarantees for task and message sets under realistic fault and error assumptions is an essential requirement, though complex and tricky to achieve. An important factor to be considered in this context is the random nature of occurrences of faults and errors, which, if addressed in the traditional schedulability analysis by assuming a rigid worst-case occurrence scenario, may lead to inaccurate results. In this work we propose a framework for end-to-end probabilistic schedulability analysis for real-time tasks exchanging messages over Controller Area Network under stochastic errors.

Place, publisher, year, edition, pages
Springer Verlag, 2013
Keywords
CAN, dependability, fault tolerance, real-time systems, reliability, schedulability analysis, task scheduling, Control system synthesis, Random errors, Computing nodes, Controller area network, Distributed real time system, Embedded real time systems, Message set, Real-time tasks, Schedulability, Stochastic errors, Task-scheduling, Real time systems
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:mdh:diva-31648 (URN)10.1007/978-3-642-32548-9_28 (DOI)2-s2.0-84867921162 (Scopus ID)9783642325472 (ISBN)
Available from: 2016-05-30 Created: 2016-05-24 Last updated: 2018-01-26Bibliographically approved
Aysan, H. (2012). Fault-Tolerance Strategies and Probabilistic Guarantees for Real-Time Systems. (Doctoral dissertation). Västerås: Mälardalen University
Open this publication in new window or tab >>Fault-Tolerance Strategies and Probabilistic Guarantees for Real-Time Systems
2012 (English)Doctoral thesis, monograph (Other academic)
Abstract [en]

Ubiquitous deployment of embedded systems is having a substantial impact on our society, since they interact with our lives in many critical real-time applications. Typically, embedded systems used in safety or mission critical applications (e.g., aerospace, avionics, automotive or nuclear domains) work in harsh environments where they are exposed to frequent transient faults such as power supply jitter, network noise and radiation. They are also susceptible to errors originating from design and production faults. Hence, they have the design objective to maintain the properties of timeliness and functional correctness even under error occurrences.

Fault-tolerance plays a crucial role towards achieving dependability, and the fundamental requirement for the design of effective and efficient fault-tolerance mechanisms is a realistic and applicable model of potential faults and their manifestations. An important factor to be considered in this context is the random nature of faults and errors, which, if addressed in the timing analysis by assuming a rigid worst-case occurrence scenario, may lead to inaccurate results. It is also important that the power, weight, space and cost constraints of embedded systems are addressed by efficiently using the available resources for fault-tolerance.

This thesis presents a framework for designing predictably dependable embedded real-time systems by jointly addressing the timeliness and the reliability properties. It proposes a spectrum of fault-tolerance strategies particularly targeting embedded real-time systems. Efficient resource usage is attained by considering the diverse criticality levels of the systems' building blocks. The fault-tolerance strategies are complemented with the proposed probabilistic schedulability analysis techniques, which are based on a comprehensive stochastic fault and error model.

Place, publisher, year, edition, pages
Västerås: Mälardalen University, 2012
Series
Mälardalen University Press Dissertations, ISSN 1651-4238 ; 123
Keywords
embedded systems, real-time systems, fault tolerant design, real-time analysis, dependability analysis
National Category
Computer Systems
Research subject
Computer Science
Identifiers
urn:nbn:se:mdh:diva-14653 (URN)978-91-7485-076-5 (ISBN)
Public defence
2012-06-19, Gamma, Mälardalens högskola, Västerås, 13:15 (English)
Opponent
Supervisors
Available from: 2012-05-29 Created: 2012-05-28 Last updated: 2013-12-03Bibliographically approved
Aysan, H., Dobrin, R., Punnekkat, S. & Bate, I. (2012). On Voting Strategies for Loosely Synchronized Dependable Real-Time Systems. In: 7th IEEE International Symposium on Industrial Embedded Systems: . Paper presented at 7th IEEE International Symposium on Industrial Embedded Systems (SIES), 20-22 June 2012, Karlsruhe (pp. 120-129).
Open this publication in new window or tab >>On Voting Strategies for Loosely Synchronized Dependable Real-Time Systems
2012 (English)In: 7th IEEE International Symposium on Industrial Embedded Systems, 2012, p. 120-129Conference paper, Published paper (Refereed)
Abstract [en]

Hard real-time applications typically have to satisfy high dependability requirements in terms of fault tolerance in both the value and the time domains. Loosely synchronized real-time systems, which represent many of the systems that are developed, make any form of voting difficult as each replica may provide different outputs independent of whether there has been an error or not. This can also lead to false positives and false negatives which makes achieving fault tolerance, and hence dependability, difficult. We have earlier proposed a majority voting technique, ”Voting on Time and Value” (VTV) that explicitly considers combinations of value and timing errors, targeting loosely synchronised systems. In this paper, we extend VTV to enable voter parameter tuning to obtain the desired user specified trade-offs between the false positive and false negative rates in the voter outputs. We evaluate the performance of VTV against Compare Majority Voting (CMV), which is a known voting approach applicable in similar contexts, through extensive simulation studies. The results clearly demonstrate that VTV outperforms CMV in all scenarios with lower false negative rates.

National Category
Engineering and Technology
Identifiers
urn:nbn:se:mdh:diva-17310 (URN)10.1109/SIES.2012.6356577 (DOI)2-s2.0-84871535144 (Scopus ID)978-1-4673-2683-4 (ISBN)
Conference
7th IEEE International Symposium on Industrial Embedded Systems (SIES), 20-22 June 2012, Karlsruhe
Available from: 2012-12-20 Created: 2012-12-20 Last updated: 2013-12-19Bibliographically approved
Aysan, H., Dobrin, R., Punnekkat, S. & Proenza, J. (2012). Probabilistic Scheduling Guarantees in Distributed Real-Time Systems under Error Bursts. In: IEEE Symposium on Emerging Technologies and Factory Automation, ETFA 2012: . Paper presented at 2012 IEEE 17th International Conference on Emerging Technologies and Factory Automation, ETFA 2012; Krakow; Poland; 17 September 2012 through 21 September 2012 (pp. Article number: 6489644).
Open this publication in new window or tab >>Probabilistic Scheduling Guarantees in Distributed Real-Time Systems under Error Bursts
2012 (English)In: IEEE Symposium on Emerging Technologies and Factory Automation, ETFA 2012, 2012, p. Article number: 6489644-Conference paper, Published paper (Other academic)
Abstract [en]

Networked embedded systems used in many real-time (RT) applications rely on dependable communication. Controller Area Network (CAN) has gained wider acceptance as a standard in a large number of applications, mostly due to its cost effectiveness, predictable performance, and its fault-tolerance capability. Research so far has focused on rather simplistic error models which assume only singleton errors separated by a minimum inter-arrival time. However, these systems are often subject to faults that manifest as error bursts of various lengths which have an adverse effect on the message response times that needs to be accounted for. Furthermore, an important factor to be considered in this context is the random nature of occurrences of faults and errors, which, if addressed in the traditional schedulability analysis by assuming a rigid worst case occurrence scenario, may lead to inaccurate results. In this paper we first present a stochastic fault and error model which has the capability of modeling error bursts in lieu of the commonly used simplistic error assumptions. We then present a methodology which enables the provision of appropriate probabilistic RT guarantees in distributed RT systems for the particular case of message scheduling on CAN under the assumed error assumptions

National Category
Engineering and Technology
Identifiers
urn:nbn:se:mdh:diva-13668 (URN)10.1109/ETFA.2012.6489644 (DOI)000320333400113 ()2-s2.0-84876396240 (Scopus ID)9781467347372 (ISBN)
Conference
2012 IEEE 17th International Conference on Emerging Technologies and Factory Automation, ETFA 2012; Krakow; Poland; 17 September 2012 through 21 September 2012
Available from: 2011-12-15 Created: 2011-12-15 Last updated: 2018-08-08Bibliographically approved
Thekkilakattil, A., Dobrin, R., Punnekkat, S. & Aysan, H. (2012). Resource Augmentation for Fault-Tolerance Feasibility of Real-time Tasks under Error Bursts. In: Proceedings of the 20th International Conference on Real-Time and Network Systems (RTNS 12). Paper presented at The 20th International Conference on Real-Time and Network Systems, ACM, Pont à Mousson, France (pp. 41-50). Association for Computing Machinery (ACM)
Open this publication in new window or tab >>Resource Augmentation for Fault-Tolerance Feasibility of Real-time Tasks under Error Bursts
2012 (English)In: Proceedings of the 20th International Conference on Real-Time and Network Systems (RTNS 12), Association for Computing Machinery (ACM), 2012, p. 41-50Conference paper, Published paper (Refereed)
Abstract [en]

Dependability is a vital system requirement, particularly in safety critical and mission critical real-time systems, due to the potentially catastrophic consequences of failures. In most critical applications different fault tolerance mechanisms using redundancy are employed to prevent possible failures. In the case of real-time systems the system designer must ensure that the task set is feasible even under faults, which we refer to as 'fault tolerance feasibility'. Due to cost considerations, often temporal redundancy has been prevalently used to meet this objective.

In this paper we focus on guaranteeing fault-tolerance feasibility under error bursts on uni-processor systems by the usage of resource augmentation, specifically through processor speed-up. Firstly, we derive a processor demand bound based sufficient condition for a set of real-time tasks to be fault tolerance feasible under an assumption that no more than one error burst occurs during the hyper-period of the task set. Subsequently, we derive the necessary resource augmentation bounds (i.e., the processor speed-up), that guarantees the fault tolerance feasibility, if the sufficient test fails. Finally, we prove that, if the error burst length is no more than half the shortest relative deadline of the task set, the minimum processor speed-up required to guarantee fault tolerance feasibility is upper-bounded by 6.

Place, publisher, year, edition, pages
Association for Computing Machinery (ACM), 2012
National Category
Engineering and Technology
Identifiers
urn:nbn:se:mdh:diva-16074 (URN)10.1145/2392987.2392992 (DOI)
Conference
The 20th International Conference on Real-Time and Network Systems, ACM, Pont à Mousson, France
Available from: 2012-10-31 Created: 2012-10-31 Last updated: 2013-12-03Bibliographically approved
Schmidt, H., Peak, I., Aysan, H., Punnekkat, S. & Dobrin, R. (2012). Towards Probabilistic Mode Automata for Adaptable Resource-Aware Component-Based Systems Design. In: Engineering for Success: The Future is Now!: Proceedings of the Improving Systems and Software Engineering Conference incorporating SEPGSMAsia-Pacific Conference 2012. Paper presented at Improving Systems and Software Engineering Conference incorporating SEPGSM Asia-Pacific Conference 2012, Melbourne, 15-16 August 2012.
Open this publication in new window or tab >>Towards Probabilistic Mode Automata for Adaptable Resource-Aware Component-Based Systems Design
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2012 (English)In: Engineering for Success: The Future is Now!: Proceedings of the Improving Systems and Software Engineering Conference incorporating SEPGSMAsia-Pacific Conference 2012, 2012Conference paper, Published paper (Refereed)
Abstract [en]

Embedded systems design, configuration, deployment and runtime management are extremely challenging. The pervasiveness of embedded systems, and their increasing parallelism and scale in number of networked and interacting hardwaresoftware components, has been coupled with increases in the number of functions and the variation in behaviour and characteristics of these functions. Adoption of new international safety standards and higher best practice levels in large manufacturer subcontracting policies however mandates strict quality and at times even stricter dependability and sustainability (in particular energy efficiency) requirements. In recent work we have extended our rich architecture definition language (RADL) and underlying theory to meet such industrial requirements. In this paper we describe a new approach and design model targeting hybrid designer- and operator-defined performance budgets for timing and energy consumption. We give a running example designing a sample embedded multi-media system, a modern digital camera. The model caters for true parallelism, probabilistic performance characterisation, parameterised architectural variation, compositionality, and runtime reconfiguration. The theory is based on hybrid, hierarchical, performance-annotated parallel automata and Petri nets. We also briefly summarise our tool set used to derive the example.

National Category
Engineering and Technology
Identifiers
urn:nbn:se:mdh:diva-21344 (URN)978-0-9807680-5-3 (ISBN)
Conference
Improving Systems and Software Engineering Conference incorporating SEPGSM Asia-Pacific Conference 2012, Melbourne, 15-16 August 2012
Projects
PG-DEP-REMAP - Reliability Modeling and Analysis for Predictability Assurance
Available from: 2013-09-18 Created: 2013-09-11 Last updated: 2014-01-09Bibliographically approved
Aysan, H. & Punnekkat, S. (2011). A Generalised Error Model and Schedulability Guarantees for Dependable Real-Time Systems. In: Proceedings of the 1st International Workshop on Dependable and Secure Industrial and Embedded Systems (WORDS): . Paper presented at First International Workshop on Dependable and Secure Industrial and Embedded Systems (WORDS 2011), June 14, 2011, Västerås, Sweden.
Open this publication in new window or tab >>A Generalised Error Model and Schedulability Guarantees for Dependable Real-Time Systems
2011 (English)In: Proceedings of the 1st International Workshop on Dependable and Secure Industrial and Embedded Systems (WORDS), 2011Conference paper, Published paper (Refereed)
Abstract [en]

The fundamental requirement for the design of effective and efficient fault-tolerance mechanisms in dependable real-time systems is a realistic and applicable model of potential faults, their manifestations and consequences. Fault and error models also need to be evolved based on the changes in the environments of usage or even based on technological advances. In this paper we propose a novel probabilistic burst error model in lieu of the commonly used simplistic fault assumptions. We introduce an approach to reason about real-time systems schedulability under the proposed error model in a probabilistic manner. We first present a sufficient analysis that accounts for the worst case interference caused by error bursts on the response times of tasks scheduled under the fixed priority scheduling (FPS) policy. Further, we identify potential sources of pessimism in the calculations and propose an algorithm that refines the results.

National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-13669 (URN)
Conference
First International Workshop on Dependable and Secure Industrial and Embedded Systems (WORDS 2011), June 14, 2011, Västerås, Sweden
Available from: 2011-12-15 Created: 2011-12-15 Last updated: 2015-07-31Bibliographically approved
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0001-5053-6725

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