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Publications (10 of 226) Show all publications
Marksteiner, S., Sirjani, M. & Sjödin, M. (2024). Using Automata Learning for Compliance Evaluation of Communication Protocols on an NFC Handshake Example. In: Lecture Notes in Computer Science: . Paper presented at 8th International Conference on Engineering of Computer-Based Systems, ECBS 2023, Västerås, 16 October 2023 through 18 October 2023 (pp. 170-190). Springer Science and Business Media Deutschland GmbH
Open this publication in new window or tab >>Using Automata Learning for Compliance Evaluation of Communication Protocols on an NFC Handshake Example
2024 (English)In: Lecture Notes in Computer Science, Springer Science and Business Media Deutschland GmbH , 2024, p. 170-190Conference paper, Published paper (Refereed)
Abstract [en]

Near-Field Communication (NFC) is a widely adopted standard for embedded low-power devices in very close proximity. In order to ensure a correct system, it has to comply to the ISO/IEC 14443 standard. This paper concentrates on the low-level part of the protocol (ISO/IEC 14443-3) and presents a method and a practical implementation that complements traditional conformance testing. We infer a Mealy state machine of the system-under-test using active automata learning. This automaton is checked for bisimulation with a specification automaton modelled after the standard, which provides a strong verdict of conformance or non-conformance. As a by-product, we share some observations of the performance of different learning algorithms and calibrations in the specific setting of ISO/IEC 14443-3, which is the difficulty to learn models of system that a) consist of two very similar structures and b) very frequently give no answer (i.e. a timeout as an output).

Place, publisher, year, edition, pages
Springer Science and Business Media Deutschland GmbH, 2024
Series
Lecture Notes in Computer Science, ISSN 0302-9743 ; 14390 LNCS
Keywords
Automata Learning, Bisimulation, Formal Methods, NFC, Protocol Compliance, Automata theory, ISO Standards, Learning algorithms, Learning systems, Near field communication, Automaton learning, Bisimulations, Close proximity, Communications protocols, Compliance evaluations, Conformance testing, ISO/IEC-14443, Low-power devices, Near-field communication
National Category
Computer Sciences
Identifiers
urn:nbn:se:mdh:diva-65246 (URN)10.1007/978-3-031-49252-5_13 (DOI)2-s2.0-85180149916 (Scopus ID)9783031492518 (ISBN)
Conference
8th International Conference on Engineering of Computer-Based Systems, ECBS 2023, Västerås, 16 October 2023 through 18 October 2023
Available from: 2024-01-03 Created: 2024-01-03 Last updated: 2024-01-03Bibliographically approved
Satka, Z., Ashjaei, S. M., Fotouhi, H., Daneshtalab, M., Sjödin, M. & Mubeen, S. (2023). A comprehensive systematic review of integration of time sensitive networking and 5G communication. Journal of systems architecture, 138, Article ID 102852.
Open this publication in new window or tab >>A comprehensive systematic review of integration of time sensitive networking and 5G communication
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2023 (English)In: Journal of systems architecture, ISSN 1383-7621, E-ISSN 1873-6165, Vol. 138, article id 102852Article in journal (Refereed) Published
Abstract [en]

Many industrial real-time applications in various domains, e.g., automotive, industrial automation, industrial IoT, and industry 4.0, require ultra-low end-to-end network latency, often in the order of 10 milliseconds or less. The IEEE 802.1 time-sensitive networking (TSN) is a set of standards that supports the required low-latency wired communication with ultra-low jitter. The flexibility of such a wired connection can be increased if it is integrated with a mobile wireless network. The fifth generation of cellular networks (5G) is capable of supporting the required levels of network latency with the Ultra-Reliable Low Latency Communication (URLLC) service. To fully utilize the potential of these two technologies (TSN and 5G) in industrial applications, seamless integration of the TSN wired-based network with the 5G wireless-based network is needed. In this article, we provide a comprehensive and well-structured snapshot of the existing research on TSN-5G integration. In this regard, we present the planning, execution, and analysis results of the systematic review. We also identify the trends, technical characteristics, and potential gaps in the state of the art, thus highlighting future research directions in the integration of TSN and 5G communication technologies. We notice that 73% of the primary studies address the time synchronization in the integration of TSN and 5G technologies, introducing approaches with an accuracy starting from the levels of hundred nanoseconds to one microsecond. Majority of primary studies aim at optimizing communication latency in their approach, which is a key quality attribute in automotive and industrial automation applications today.

Place, publisher, year, edition, pages
Elsevier, 2023
Keywords
Time-Sensitive Networking, TSN, 5G, TSN-5G, URLLC, Industry 4.0
National Category
Communication Systems Embedded Systems
Research subject
Computer Science
Identifiers
urn:nbn:se:mdh:diva-62062 (URN)10.1016/j.sysarc.2023.102852 (DOI)000956098500001 ()2-s2.0-85149863981 (Scopus ID)
Projects
PROVIDENT
Funder
Vinnova, 16533
Available from: 2023-03-13 Created: 2023-03-13 Last updated: 2023-05-17Bibliographically approved
Asadi, M., Poursalim, F., Loni, M., Daneshtalab, M., Sjödin, M. & Gharehbaghi, A. (2023). Accurate detection of paroxysmal atrial fibrillation with certified-GAN and neural architecture search. Scientific Reports, 13(1)
Open this publication in new window or tab >>Accurate detection of paroxysmal atrial fibrillation with certified-GAN and neural architecture search
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2023 (English)In: Scientific Reports, E-ISSN 2045-2322, Vol. 13, no 1Article in journal (Refereed) Published
Abstract [en]

This paper presents a novel machine learning framework for detecting PxAF, a pathological characteristic of electrocardiogram (ECG) that can lead to fatal conditions such as heart attack. To enhance the learning process, the framework involves a generative adversarial network (GAN) along with a neural architecture search (NAS) in the data preparation and classifier optimization phases. The GAN is innovatively invoked to overcome the class imbalance of the training data by producing the synthetic ECG for PxAF class in a certified manner. The effect of the certified GAN is statistically validated. Instead of using a general-purpose classifier, the NAS automatically designs a highly accurate convolutional neural network architecture customized for the PxAF classification task. Experimental results show that the accuracy of the proposed framework exhibits a high value of 99.0% which not only enhances state-of-the-art by up to 5.1%, but also improves the classification performance of the two widely-accepted baseline methods, ResNet-18, and Auto-Sklearn, by [Formula: see text] and [Formula: see text].

Place, publisher, year, edition, pages
NLM (Medline), 2023
Keywords
Atrial Fibrillation, Electrocardiography, Humans, Machine Learning, Neural Networks, Computer, artificial neural network, human
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-63915 (URN)10.1038/s41598-023-38541-8 (DOI)001030642400009 ()37452165 (PubMedID)2-s2.0-85164756079 (Scopus ID)
Available from: 2023-07-26 Created: 2023-07-26 Last updated: 2023-09-13Bibliographically approved
Berisa, A., Panjevic, A., Kovac, I., Lyngbäck, H., Ashjaei, S. M., Daneshtalab, M., . . . Mubeen, S. (2023). Comparative Evaluation of Various Generations of Controller Area Network Based on Timing Analysis. In: IEEE Int. Conf. Emerging Technol. Factory Autom., ETFA: . Paper presented at IEEE International Conference on Emerging Technologies and Factory Automation, ETFA. Institute of Electrical and Electronics Engineers Inc.
Open this publication in new window or tab >>Comparative Evaluation of Various Generations of Controller Area Network Based on Timing Analysis
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2023 (English)In: IEEE Int. Conf. Emerging Technol. Factory Autom., ETFA, Institute of Electrical and Electronics Engineers Inc. , 2023Conference paper, Published paper (Refereed)
Abstract [en]

This paper performs a comparative evaluation of various generations of Controller Area Network (CAN), including the classical CAN, CAN Flexible Data-Rate (FD), and CAN Extra Long (XL). We utilize response-time analysis for the evaluation. In this regard, we identify that the state of the art lacks the response-time analysis for CAN XL. Hence, we discuss the worst-case transmission times calculations for CAN XL frames and incorporate them to the existing analysis for CAN to support response-time analysis of CAN XL frames. Using the extended analysis, we perform a comparative evaluation of the three generations of CAN by analyzing an automotive industrial use case. In crux, we show that using CAN FD is more advantageous than the classical CAN and CAN XL when using frames with payloads of up to 8 bytes, despite the fact that CAN XL supports higher bit rates. For frames with 12-64 bytes payloads, CAN FD performs better than CAN XL when running at the same bit rate, but CAN XL performs better when running at a higher bit rate. Additionally, we discovered that CAN XL performs better than the classical CAN and CAN FD when the frame payload is over 64 bytes, even if it runs at the same or higher bit rates than CAN FD.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2023
Keywords
automotive, CAN FD, CAN XL, Controller Area Network, Control system synthesis, Controllers, Finite difference method, Process control, Automotives, Classical controllers, Comparative evaluations, Controller area network flexible data-rate, Controller area network XL, Controller-area network, Data-rate, Response-time analysis, Timing circuits
National Category
Computer and Information Sciences
Identifiers
urn:nbn:se:mdh:diva-64693 (URN)10.1109/ETFA54631.2023.10275549 (DOI)2-s2.0-85175488822 (Scopus ID)9798350339918 (ISBN)
Conference
IEEE International Conference on Emerging Technologies and Factory Automation, ETFA
Available from: 2023-11-09 Created: 2023-11-09 Last updated: 2024-01-18Bibliographically approved
Houtan, B., Aybek, M. O., Ashjaei, S. M., Daneshtalab, M., Sjödin, M., Lundbäck, J. & Mubeen, S. (2023). End-to-end Timing Modeling and Analysis of TSN in Component-Based Vehicular Software. In: Proc. - IEEE Int. Symp. Real-Time Distrib. Comput., ISORC: . Paper presented at Proceedings - 2023 IEEE 26th International Symposium on Real-Time Distributed Computing, ISORC 2023 (pp. 126-135). Institute of Electrical and Electronics Engineers Inc.
Open this publication in new window or tab >>End-to-end Timing Modeling and Analysis of TSN in Component-Based Vehicular Software
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2023 (English)In: Proc. - IEEE Int. Symp. Real-Time Distrib. Comput., ISORC, Institute of Electrical and Electronics Engineers Inc. , 2023, p. 126-135Conference paper, Published paper (Refereed)
Abstract [en]

In this paper, we present an end-to-end timing model to capture timing information from software architectures of distributed embedded systems that use network communication based on the Time-Sensitive Networking (TSN) standards. Such a model is required as an input to perform end-to-end timing analysis of these systems. Furthermore, we present a methodology that aims at automated extraction of instances of the end-to-end timing model from component-based software architectures of the systems and the TSN network configurations. As a proof of concept, we implement the proposed end-to-end timing model and the extraction methodology in the Rubus Component Model (RCM) and its tool chain Rubus-ICE that are used in the vehicle industry. We demonstrate the usability of the proposed model and methodology by modeling a vehicular industrial use case and performing its timing analysis.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2023
Keywords
Embedded systems, Network architecture, Software architecture, Timing circuits, Automated extraction, Component based, Component-based software architecture, Distributed embedded system, End to end, Modelling and analysis, Network communications, Timing Analysis, Timing information, Timing modeling, Extraction
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-64173 (URN)10.1109/ISORC58943.2023.00025 (DOI)001044268900013 ()2-s2.0-85168757094 (Scopus ID)9798350339024 (ISBN)
Conference
Proceedings - 2023 IEEE 26th International Symposium on Real-Time Distributed Computing, ISORC 2023
Available from: 2023-09-06 Created: 2023-09-06 Last updated: 2024-02-07Bibliographically approved
Bucaioni, A., Ciccozzi, F., Di Salle, A. & Sjödin, M. (2023). From low-level programming to full-fledged industrial model-based development: the story of the Rubus Component Model. Software and Systems Modeling
Open this publication in new window or tab >>From low-level programming to full-fledged industrial model-based development: the story of the Rubus Component Model
2023 (English)In: Software and Systems Modeling, ISSN 1619-1366, E-ISSN 1619-1374Article in journal (Refereed) Published
Abstract [en]

Developing distributed real-time systems is a complex task that has historically entailed specialized handcraft. In this paper, we propose a retrospective on the (r)evolutionary changes that led to the transition from low-level programming to industrial full-fledged model-based development embodied by the Rubus Component Model and its tool-ecosystem. We focus on the needs, challenges, and solutions of a 15-year-long evolution journey of a software development approach that has gone from low-level and manual programming to a highly automated environment offering modeling, analysis, and development of vehicular software systems with multi-criticality for deployment on single- and multi-core platforms. 

Place, publisher, year, edition, pages
Springer Science and Business Media Deutschland GmbH, 2023
Keywords
Component model, Model-based development, Vehicular embedded systems real–time systems
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-62703 (URN)10.1007/s10270-023-01107-3 (DOI)000990922800001 ()2-s2.0-85159661430 (Scopus ID)
Available from: 2023-05-31 Created: 2023-05-31 Last updated: 2024-01-17Bibliographically approved
Marksteiner, S., Schmittner, C., Christl, K., Nickovic, D., Sjödin, M. & Sirjani, M. (2023). From TARA to Test: Automated Automotive Cybersecurity Test Generation Out of Threat Modeling. In: Proceedings: CSCS 2023 - 7th ACM Computer Science in Cars Symposium: . Paper presented at 7th ACM Computer Science in Cars Symposium, CSCS 2023, Darmstadt, 5 December 2023. Association for Computing Machinery, Inc
Open this publication in new window or tab >>From TARA to Test: Automated Automotive Cybersecurity Test Generation Out of Threat Modeling
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2023 (English)In: Proceedings: CSCS 2023 - 7th ACM Computer Science in Cars Symposium, Association for Computing Machinery, Inc , 2023Conference paper, Published paper (Refereed)
Abstract [en]

The United Nations Economic Commission for Europe (UNECE) demands the management of cyber security risks in vehicle design and that the effectiveness of these measures is verified by testing. Generally, with rising complexity and openness of systems via software-defined vehicles, verification through testing becomes a very important for security assurance. This mandates the introduction of industrial-grade cybersecurity testing in automotive development processes. Currently, the automotive cybersecurity testing procedures are not specified or automated enough to be able to deliver tests in the amount and thoroughness needed to keep up with that regulation, let alone doing so in a cost-efficient manner. This paper presents a methodology to automatically generate technology-agnostic test scenarios from the results of threat analysis and risk assessment (TARA) process. Our approach is to transfer the resulting threat models into attack trees and label their edges using actions from a domain-specific language (DSL) for attack descriptions. This results in a labelled transitions system (LTS), in which every labelled path intrinsically forms a test scenario. In addition, we include the concept of Cybersecurity Assurance Levels (CALs) and Targeted Attack Feasibility (TAF) into testing by assigning them as costs to the attack path. This abstract test scenario can be compiled into a concrete test case by augmenting it with implementation details. Therefore, the efficacy of the measures taken because of the TARA can be verified and documented. As TARA is a de-facto mandatory step in the UNECE regulation and the relevant ISO standard, automatic test generation (also mandatory) out of it could mean a significant improvement in efficiency, as two steps could be done at once.

Place, publisher, year, edition, pages
Association for Computing Machinery, Inc, 2023
Keywords
Automotive, CAL, Cybersecurity, Life Cycle, TAF, Testing
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-65679 (URN)10.1145/3631204.3631864 (DOI)001150368200005 ()2-s2.0-85182016784 (Scopus ID)9798400704543 (ISBN)
Conference
7th ACM Computer Science in Cars Symposium, CSCS 2023, Darmstadt, 5 December 2023
Available from: 2024-01-24 Created: 2024-01-24 Last updated: 2024-02-20Bibliographically approved
Berisa, A., Ashjaei, S. M., Daneshtalab, M., Sjödin, M. & Mubeen, S. (2023). Investigating and Analyzing CAN-to-TSN Gateway Forwarding Techniques. In: Proc. - IEEE Int. Symp. Real-Time Distrib. Comput., ISORC: . Paper presented at Proceedings - 2023 IEEE 26th International Symposium on Real-Time Distributed Computing, ISORC 2023 (pp. 136-145). Institute of Electrical and Electronics Engineers Inc.
Open this publication in new window or tab >>Investigating and Analyzing CAN-to-TSN Gateway Forwarding Techniques
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2023 (English)In: Proc. - IEEE Int. Symp. Real-Time Distrib. Comput., ISORC, Institute of Electrical and Electronics Engineers Inc. , 2023, p. 136-145Conference paper, Published paper (Refereed)
Abstract [en]

Controller Area Network (CAN) and Ethernet network are expected to co-exist in automotive industry as Ethernet provides a high-bandwidth communication, while CAN is a legacy cost-effective solution. Due to the shortcomings of conventional switched Etherent, such as determinism, IEEE Time Sensitive Networking (TSN) task group developed a set of standards to enhance the switched Ethernet technology providing low-jitter and deterministic communication. Considering these two network domains, we investigate various design approaches for a gateway that connects a CAN domain to a TSN domain. We present three gateway forwarding techniques and we develop end-to-end delay analysis methods for them. Via the analysis methods and applying them to synthetic use cases we show that the intuitive existing approach of encapsulating multiple CAN frames into a single Ethernet frame is not necessarily an efficient solution. In fact, we demonstrate several cases where it is preferable to encapsulate only one CAN frame into a TSN frame, in particular when we use a high speed TSN network. The results have a significant impact on developing such gateways as the implementation of the one-to-one frame encapsulation is considerably simpler than other complex gateway-forwarding techniques.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2023
Keywords
Automotive industry, Control system synthesis, Cost effectiveness, Gateways (computer networks), IEEE Standards, Analysis method, Controller-area network, Cost-effective solutions, Ethernet networks, Ethernet technology, High bandwidth communication, Legacy costs, Network domains, Switched ethernet, Task groups, Ethernet
National Category
Computer and Information Sciences
Identifiers
urn:nbn:se:mdh:diva-64177 (URN)10.1109/ISORC58943.2023.00026 (DOI)001044268900014 ()2-s2.0-85168775302 (Scopus ID)9798350339024 (ISBN)
Conference
Proceedings - 2023 IEEE 26th International Symposium on Real-Time Distributed Computing, ISORC 2023
Available from: 2023-09-06 Created: 2023-09-06 Last updated: 2023-12-04Bibliographically approved
Houtan, B., Ashjaei, S. M., Daneshtalab, M., Sjödin, M. & Mubeen, S. (2023). Supporting end-to-end data propagation delay analysis for TSN-based distributed vehicular embedded systems. Journal of systems architecture, 141, Article ID 102911.
Open this publication in new window or tab >>Supporting end-to-end data propagation delay analysis for TSN-based distributed vehicular embedded systems
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2023 (English)In: Journal of systems architecture, ISSN 1383-7621, E-ISSN 1873-6165, Vol. 141, article id 102911Article in journal (Refereed) Published
Abstract [en]

In this paper, we identify that the existing end-to-end data propagation delay analysis for distributed embedded systems can calculate pessimistic (over-estimated) analysis results when the nodes are synchronized. This is particularly the case of the Scheduled Traffic (ST) class in Time-sensitive Networking (TSN), which is scheduled offline according to the IEEE 802.1Qbv standard and the nodes are synchronized according to the IEEE 802.1AS standard. We present a comprehensive system model for distributed embedded systems that incorporates all of the above mentioned aspect as well as all traffic classes in TSN. We extend the analysis to support both synchronization and non-synchronization among the ECUs as well as offline schedules on the networks. The extended analysis can now be used to analyze all traffic classes in TSN when the nodes are synchronized without introducing any pessimism in the analysis results. We evaluate the proposed model and the extended analysis on a vehicular industrial use case.

Place, publisher, year, edition, pages
Elsevier B.V., 2023
Keywords
Distributed embedded systems, Real-time systems, Time-sensitive networking, Data communication systems, Data flow analysis, Data transfer, Embedded systems, IEEE Standards, Interactive computer systems, Real time systems, Data propagation, Delay analysis, Distributed embedded system, End to end, Extended analysis, Offline, Propagation delays, Real - Time system, Traffic class, Synchronization
National Category
Embedded Systems
Identifiers
urn:nbn:se:mdh:diva-63666 (URN)10.1016/j.sysarc.2023.102911 (DOI)001024619100001 ()2-s2.0-85162169933 (Scopus ID)
Available from: 2023-06-28 Created: 2023-06-28 Last updated: 2024-02-07Bibliographically approved
Riazati, M., Daneshtalab, M., Sjödin, M. & Lisper, B. (2022). AutoDeepHLS: Deep Neural Network High-level Synthesis using fixed-point precision. In: 2022 IEEE INTERNATIONAL CONFERENCE ON ARTIFICIAL INTELLIGENCE CIRCUITS AND SYSTEMS (AICAS 2022): INTELLIGENT TECHNOLOGY IN THE POST-PANDEMIC ERA. Paper presented at IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS) - Intelligent Technology in the Post-Pandemic Era, JUN 13-15, 2022, Incheon, SOUTH KOREA (pp. 122-125). IEEE
Open this publication in new window or tab >>AutoDeepHLS: Deep Neural Network High-level Synthesis using fixed-point precision
2022 (English)In: 2022 IEEE INTERNATIONAL CONFERENCE ON ARTIFICIAL INTELLIGENCE CIRCUITS AND SYSTEMS (AICAS 2022): INTELLIGENT TECHNOLOGY IN THE POST-PANDEMIC ERA, IEEE , 2022, p. 122-125Conference paper, Published paper (Refereed)
Abstract [en]

Deep Neural Networks (DNN) have received much attention in various applications such as visual recognition, self-driving cars, health care, etc. Hardware implementation, specifically using FPGA and ASIC due to their high performance and low power consumption, is considered an efficient method. However, implementation on these platforms is difficult for neural network designers since they usually have limited knowledge of hardware. High-Level Synthesis (HLS) tools can act as a bridge between high-level DNN designs and hardware implementation. Nevertheless, these tools usually need implementation at the C level, whereas the design of neural networks is usually performed at a higher level (such as Keras or TensorFlow). In this paper, we propose a fully automated flow for creating a C-level implementation that is synthesizable with HLS Tools. Various aspects such as performance, minimal access to memory elements, data type knobs, and design verification are considered. Our results show that the generated C implementation is much more HLS friendly than previous works. Furthermore, a complete flow is proposed to determine different fixed-point precisions for network elements. We show that our method results in 25% and 34% reduction in bit-width for LeNet and VGG, respectively, without any accuracy loss.

Place, publisher, year, edition, pages
IEEE, 2022
Keywords
Deep Neural Network, Accelerator, High-Level Synthesis, Fixed-Point, Quantization
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-60590 (URN)10.1109/AICAS54282.2022.9869907 (DOI)000859273200032 ()2-s2.0-85139073458 (Scopus ID)978-1-6654-0996-4 (ISBN)
Conference
IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS) - Intelligent Technology in the Post-Pandemic Era, JUN 13-15, 2022, Incheon, SOUTH KOREA
Available from: 2022-11-09 Created: 2022-11-09 Last updated: 2023-10-09Bibliographically approved
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0001-7586-0409

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