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Lisova, E., Causevic, A., Hänninen, K., Thane, H. & Hansson, H. (2018). A Systematic Way to Incorporate Security in Safety Analysis. In: Proceedings - 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, DSN-W 2018: . Paper presented at 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, DSN-W 2018; Parc Alvisse, Hotel Luxembourg City; Luxembourg; 25 June 2018 through 28 June 2018 (pp. 166-171). Luxembourg, Luxemburg
Open this publication in new window or tab >>A Systematic Way to Incorporate Security in Safety Analysis
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2018 (English)In: Proceedings - 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, DSN-W 2018, Luxembourg, Luxemburg, 2018, p. 166-171Conference paper, Published paper (Refereed)
Abstract [en]

Today's systems are being built to connect to public or semi-public networks, are able to communicate with other systems, e.g., in the context of Internet-of-Things (IoT), involve multiple stakeholders, have dynamic system reconfigurations, and operate in increasingly unpredictable environments. In such complex systems, assuring safety and security in a continuous and joint effort is a major challenge, not the least due to the increasing number of attack surfaces arising from the increased connectivity. In this paper we present an approach that aims to bridge the gap between safety and security engineering. The potential of the approach is illustrated on the example of E-gas system, discussing the cases when unintentional faults as well as malicious attacks are taken into consideration when assuring safety of the described system. 

Place, publisher, year, edition, pages
Luxembourg, Luxemburg: , 2018
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-39268 (URN)10.1109/DSN-W.2018.00058 (DOI)9781538655955 (ISBN)
Conference
48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, DSN-W 2018; Parc Alvisse, Hotel Luxembourg City; Luxembourg; 25 June 2018 through 28 June 2018
Projects
Closing the safety-security gap in software intensive systemsSAFSEC-CPS -- Securing the safety of autonomous cyber-physical systemsSerendipity - Secure and dependable platforms for autonomy
Available from: 2018-05-22 Created: 2018-05-22 Last updated: 2018-08-16Bibliographically approved
Hansson, H. (2018). Message from the ICST 2018 General Chair. Paper presented at 11th IEEE International Conference on Software Testing, Verification and Validation, ICST 2018; Vasteras; Sweden; 9 April 2018 through 13 April 2018. 11th IEEE International Conference on Software Testing, Verification and Validation, ICST 2018, xii-xiii
Open this publication in new window or tab >>Message from the ICST 2018 General Chair
2018 (English)In: 11th IEEE International Conference on Software Testing, Verification and Validation, ICST 2018, p. xii-xiiiArticle in journal (Refereed) Published
Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2018
National Category
Computer and Information Sciences
Identifiers
urn:nbn:se:mdh:diva-39980 (URN)10.1109/ICST.2018.00005 (DOI)2-s2.0-85048414125 (Scopus ID)
Conference
11th IEEE International Conference on Software Testing, Verification and Validation, ICST 2018; Vasteras; Sweden; 9 April 2018 through 13 April 2018
Available from: 2018-06-21 Created: 2018-06-21 Last updated: 2018-06-28Bibliographically approved
Sljivo, I., Gallina, B., Carlson, J., Hansson, H. & Puri, S. (2018). Tool-supported safety-relevant component reuse: From specification to argumentation. In: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Volume 10873: . Paper presented at 23rd International Conference on Reliable Software Technologies, Ada-Europe 2018; Lisbon; Portugal; 18 June 2018 through 22 June 2018 (pp. 19-33). Springer Verlag
Open this publication in new window or tab >>Tool-supported safety-relevant component reuse: From specification to argumentation
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2018 (English)In: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Volume 10873, Springer Verlag , 2018, p. 19-33Conference paper, Published paper (Refereed)
Abstract [en]

Contracts are envisaged to support compositional verification of a system as well as reuse and independent development of their implementations. But reuse of safety-relevant components in safety-critical systems needs to cover more than just the implementations. As many safety-relevant artefacts related to the component as possible should be reused together with the implementation to assist the integrator in assuring that the system they are developing is acceptably safe. Furthermore, the reused assurance information related to the contracts should be structured clearly to communicate the confidence in the component. In this work we present a tool-supported methodology for contract-driven assurance and reuse. We define the variability on the contract level in the scope of a trace-based approach to contract-based design. With awareness of the hierarchical nature of systems subject to compositional verification, we propose assurance patterns for arguing confidence in satisfaction of requirements and contracts. We present an implementation extending the AMASS platform to support automated instantiation of the proposed patterns, and evaluate its adequacy for assurance and reuse in a real-world case study. 

Place, publisher, year, edition, pages
Springer Verlag, 2018
Series
Lecture Notes in Computer Science, ISSN 0302-9743 ; 10873
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-40197 (URN)10.1007/978-3-319-92432-8_2 (DOI)2-s2.0-85049018625 (Scopus ID)9783319924311 (ISBN)
Conference
23rd International Conference on Reliable Software Technologies, Ada-Europe 2018; Lisbon; Portugal; 18 June 2018 through 22 June 2018
Available from: 2018-07-05 Created: 2018-07-05 Last updated: 2018-07-05Bibliographically approved
Abbaspour Asadollah, S., Sundmark, D., Eldh, S., Hansson, H. & Afza, W. (2017). 10 Years of research on debugging concurrent and multicore software: a systematic mapping study. Software quality journal, 25(1), 49-82
Open this publication in new window or tab >>10 Years of research on debugging concurrent and multicore software: a systematic mapping study
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2017 (English)In: Software quality journal, ISSN 0963-9314, E-ISSN 1573-1367, Vol. 25, no 1, p. 49-82Article in journal (Refereed) Published
Abstract [en]

Debugging – the process of identifying, localizing and fixing bugs – is a key activity in software development. Due to issues such as non-determinism and difficulties of reproducing failures, debugging concurrent software is significantly more challenging than debugging sequential software. A number of methods, models and tools for debugging concurrent and multicore software have been proposed, but the body of work partially lacks a common terminology and a more recent view of the problems to solve. This suggests the need for a classification, and an up-to-date comprehensive overview of the area. 

This paper presents the results of a systematic mapping study in the field of debugging of concurrent and multicore software in the last decade (2005– 2014). The study is guided by two objectives: (1) to summarize the recent publication trends and (2) to clarify current research gaps in the field.

Through a multi-stage selection process, we identified 145 relevant papers. Based on these, we summarize the publication trend in the field by showing distribution of publications with respect to year , publication venues , representation of academia and industry , and active research institutes . We also identify research gaps in the field based on attributes such as types of concurrency bugs, types of debugging processes , types of research  and research contributions.

The main observations from the study are that during the years 2005–2014: (1) there is no focal conference or venue to publish papers in this area, hence a large variety of conferences and journal venues (90) are used to publish relevant papers in this area; (2) in terms of publication contribution, academia was more active in this area than industry; (3) most publications in the field address the data race bug; (4) bug identification is the most common stage of debugging addressed by articles in the period; (5) there are six types of research approaches found, with solution proposals being the most common one; and (6) the published papers essentially focus on four different types of contributions, with ”methods” being the type most common one.

We can further conclude that there is still quite a number of aspects that are not sufficiently covered in the field, most notably including (1) exploring correction  and fixing bugs  in terms of debugging process; (2) order violation, suspension  and starvation  in terms of concurrency bugs; (3) validation and evaluation research  in the matter of research type; (4) metric  in terms of research contribution. It is clear that the concurrent, parallel and multicore software community needs broader studies in debugging.This systematic mapping study can help direct such efforts.

National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-31419 (URN)10.1007/s11219-015-9301-7 (DOI)000394524400003 ()2-s2.0-84955305408 (Scopus ID)
Projects
SYNOPSIS project
Available from: 2016-04-12 Created: 2016-04-12 Last updated: 2017-12-28Bibliographically approved
Abbaspour Asadollah, S., Daniel, S., Eldh, S. & Hansson, H. (2017). Concurrency bugs in open source software: a case study. Journal of Internet Services and Applications, 8(1), Article ID 4.
Open this publication in new window or tab >>Concurrency bugs in open source software: a case study
2017 (English)In: Journal of Internet Services and Applications, ISSN 1867-4828, Vol. 8, no 1, article id 4Article in journal (Refereed) Published
Abstract [en]

Concurrent programming puts demands on software debugging and testing, as concurrent software may exhibit problems not present in sequential software, e.g., deadlocks and race conditions. In aiming to increase efficiency and effectiveness of debugging and bug-fixing for concurrent software, a deep understanding of concurrency bugs, their frequency and fixing-times would be helpful. Similarly, to design effective tools and techniques for testing and debugging concurrent software, understanding the differences between non-concurrency and concurrency bugs in real-word software would be useful. This paper presents an empirical study focusing on understanding the differences and similarities between concurrency bugs and other bugs, as well as the differences among various concurrency bug types in terms of their severity and their fixing time, and reproducibility. Our basis is a comprehensive analysis of bug reports covering several generations of five open source software projects. The analysis involves a total of 11860 bug reports from the last decade, including 351 reports related to concurrency bugs. We found that concurrency bugs are different from other bugs in terms of their fixing time and severity while they are similar in terms of reproducibility. Our findings shed light on concurrency bugs and could thereby influence future design and development of concurrent software, their debugging and testing, as well as related tools.

Place, publisher, year, edition, pages
Springer London, 2017
Keywords
Apache Accumulo, Apache Hadoop, Apache Oozie, Apache spark, Apache ZooKeeper, Bug severity, Case study, Concurrency bugs, Fixing time, Open source software, Computer programming, Computer software, Concurrency control, Open systems, Software engineering, Software testing, Program debugging
National Category
Computer and Information Sciences
Identifiers
urn:nbn:se:mdh:diva-35210 (URN)10.1186/s13174-017-0055-2 (DOI)000398668000001 ()2-s2.0-85016955041 (Scopus ID)
Available from: 2017-04-20 Created: 2017-04-20 Last updated: 2018-01-13Bibliographically approved
Abbaspour Asadollah, S., Daniel, S. & Hansson, H. (2017). Runtime Verification for Detecting Suspension Bugs in Multicore and Parallel Software. In: Proceedings - 10th IEEE International Conference on Software Testing, Verification and Validation Workshops, ICSTW 2017: . Paper presented at 10th IEEE International Conference on Software Testing, Verification and Validation Workshops, ICSTW 2017, 13 March 2017 through 17 March 2017 (pp. 77-80).
Open this publication in new window or tab >>Runtime Verification for Detecting Suspension Bugs in Multicore and Parallel Software
2017 (English)In: Proceedings - 10th IEEE International Conference on Software Testing, Verification and Validation Workshops, ICSTW 2017, 2017, p. 77-80Conference paper, Published paper (Refereed)
Abstract [en]

Multicore hardware development increases the popularity of parallel and multicore software, while testing and debugging the software become more difficult, frustrating and costly. Among all types of software bugs, concurrency bugs are both important and troublesome. This type of bugs is increasingly becoming an issue, particularly due to the growing prevalence of multicore hardware. Suspension-based-locking bug is one type of concurrency bugs. This position paper proposes a model based on runtime verification and reflection technique in the context of multicore and parallel software to monitor and detect suspension-based-locking bugs. The model is not only able to detect faults, but also diagnose and even repair them. The model is composed of four layers: Logging, Monitoring, Suspension Bug Diagnosis and Mitigation. The logging layer will observe the events and save them into a file system. The monitoring layer will detect the presents of bugs in the software. The suspension bug diagnosis will identify Suspension bugs by comparing the captured data with the suspension bug properties. Finally, the mitigation layer will reconfigure the software to mitigate the suspension bugs. A functional architecture of a runtime verification tool is also proposed in this paper. This architecture is based on the proposed model and is comprised of different modules. 

Series
IEEE International Conference on Software Testing Verification and Validation Workshops, ISSN 2159-4848
Keywords
Concurrency bugs, Debugging, Monitoring, Multicore software, Parallel application, Runtime Verification, Suspension-based-locking bug, Application programs, Computer debugging, Hardware, Locks (fasteners), Program diagnostics, Software testing, Verification, Functional architecture, Hardware development, Multi core, Parallel software, Run-time verification, Testing and debugging, Program debugging
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-35336 (URN)10.1109/ICSTW.2017.20 (DOI)000403392800014 ()2-s2.0-85018376665 (Scopus ID)9781509066766 (ISBN)
Conference
10th IEEE International Conference on Software Testing, Verification and Validation Workshops, ICSTW 2017, 13 March 2017 through 17 March 2017
Available from: 2017-05-19 Created: 2017-05-19 Last updated: 2018-01-26Bibliographically approved
Pop, P., Scholle, D., Šljivo, I., Hansson, H., Widforss, G. & Rosqvist, M. (2017). Safe cooperating cyber-physical systems using wireless communication: The SafeCOP approach. Microprocessors and microsystems, 53, 42-50
Open this publication in new window or tab >>Safe cooperating cyber-physical systems using wireless communication: The SafeCOP approach
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2017 (English)In: Microprocessors and microsystems, ISSN 0141-9331, E-ISSN 1872-9436, Vol. 53, p. 42-50Article in journal (Refereed) Published
Abstract [en]

This paper presents an overview of the ECSEL project entitled “Safe Cooperating Cyber-Physical Systems using Wireless Communication” (SafeCOP), which runs during the period 2016–2019. SafeCOP targets safety-related Cooperating Cyber-Physical Systems (CO-CPS) characterised by use of wireless communication, multiple stakeholders, dynamic system definitions (openness), and unpredictable operating environments. SafeCOP will provide an approach to the safety assurance of CO-CPS, enabling thus their certification and development. The project will define a runtime manager architecture for runtime detection of abnormal behaviour, triggering if needed a safe degraded mode. SafeCOP will also develop methods and tools, which will be used to produce safety assurance evidence needed to certify cooperative functions. SafeCOP will extend current wireless technologies to ensure safe and secure cooperation, and also contribute to new standards and regulations, by providing certification authorities and standardization committees with the scientifically validated solutions needed to craft effective standards extended to also address cooperation and system-of-systems issues. The project has 28 partners from 6 European countries, and a budget of about 11 million Euros corresponding to about 1,300 person-months. 

Place, publisher, year, edition, pages
Elsevier B.V., 2017
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-36139 (URN)10.1016/j.micpro.2017.07.003 (DOI)000411544600004 ()2-s2.0-85023607120 (Scopus ID)
Available from: 2017-07-27 Created: 2017-07-27 Last updated: 2018-03-05Bibliographically approved
Pozo, F., Rodriguez-Navas, G., Hansson, H. A. & Steiner, W. (2017). Schedule Synthesis for Next Generation Time-Triggered Networks. Sweden: Mälardalen Real-Time Research Centre, Mälardalen University
Open this publication in new window or tab >>Schedule Synthesis for Next Generation Time-Triggered Networks
2017 (English)Report (Other academic)
Abstract [en]

For handling frame transmissions in highly deterministic real-time networks, i.e. networks requiring low communication latency and minimal jitter, an offline time-triggered schedule indicating the dispatch times of all frames can be used. Generation of such an offline schedule is known to be a NPcomplete problem, with complexity driven by the size of the network, the number and complexity of the traffic temporal constraints, and link diversity (for instance, coexistence of wired and wireless links). As embedded applications become more complex and extend over larger geographical areas, there is a need to deploy larger real-time networks, but existing schedule synthesis mechanisms do not scale satisfactorily to the sizes of these networks, constituting a potential bottleneck for system designers. In this paper, we present an offline synthesis tool that overcomes this limitation and is capable of generating time-triggered schedules for networks with hundreds of nodes and thousands of temporal constraints, also for systems where wired and wireless links are combined. This tool models the problem with linear arithmetic constraints and solves them using a Satisfiability Modulo Theory (SMT) solver, a powerful general purpose tool successfully used in the past for synthesizing time-triggered schedules. To cope with complexity, our algorithm implements a segmented approach that divides the total problem into easily solvable smaller-size scheduling problems, whose solutions can be combined for achieving the final schedule. The paper also discusses a number of optimizations that increase the size and compactness of the solvable schedules. We evaluate our approach on a set of realistic large-size multi-hop networks, significantly bigger than those in the existing literature. The results show that our segmentation reduces the synthesis time dramatically, allowing generation of extremely large compact schedules.

Place, publisher, year, edition, pages
Sweden: Mälardalen Real-Time Research Centre, Mälardalen University, 2017
Series
MRTC Reports, ISSN 1404-3041
Keywords
Real-Time Networks, Scheduling, SMT Solver, Time-Triggered Networks
National Category
Engineering and Technology Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:mdh:diva-34973 (URN)MDH-MRTC-314/2017-1-SE (ISRN)
Projects
RetNet - The European Industrial Doctorate Programme on Future Real-Time Networks
Available from: 2017-02-28 Created: 2017-02-28 Last updated: 2017-10-16Bibliographically approved
Abbaspour Asadollah, S., Saadatmand, M., Eldh, S., Sundmark, D. & Hansson, H. (2016). A Model for Systematic Monitoring and Debugging of Starvation Bugs in Multicore Software. In: 2016 ASE Workshop on Specification, Comprehension, Testing and Debugging of Concurrent Programs SCTDCP2016: . Paper presented at 2016 ASE Workshop on Specification, Comprehension, Testing and Debugging of Concurrent Programs SCTDCP2016, 3-7 Sep 2016, Singapore, Singapore.
Open this publication in new window or tab >>A Model for Systematic Monitoring and Debugging of Starvation Bugs in Multicore Software
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2016 (English)In: 2016 ASE Workshop on Specification, Comprehension, Testing and Debugging of Concurrent Programs SCTDCP2016, 2016Conference paper, Published paper (Refereed)
Abstract [en]

With the development of multicore hardware, concurrent, parallel and multicore software are becoming increasingly popular. Software companies are spending a huge amount of time and resources to nd and debug the bugs. Among all types of software bugs, concurrency bugs are also important and troublesome. This type of bugs is increasingly becoming an issue particularly due to the growing prevalence of multicore hardware. In this position paper, we propose a model for monitoring and debugging Starvation bugs as a type of concurrency bugs in multicore software. The model is composed into three phases: monitoring, detecting and debugging. The monitoring phase can support detecting phase by storing collected data from the system execution. The detecting phase can support debugging phase by comparing the stored data with starvation bug's properties, and the debugging phase can help in reproducing and removing the Starvation bug from multicore software. Our intention is that our model is the basis for developing tool(s) to enable solving Starvation bugs in software for multicore platforms.

National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-32885 (URN)
External cooperation:
Conference
2016 ASE Workshop on Specification, Comprehension, Testing and Debugging of Concurrent Programs SCTDCP2016, 3-7 Sep 2016, Singapore, Singapore
Projects
SYNOPSIS - Safety Analysis for Predictable Software Intensive Systems
Available from: 2016-08-26 Created: 2016-08-24 Last updated: 2016-08-26Bibliographically approved
Abbaspour Asadollah, S., Sundmark, D., Eldh, S., Hansson, H. & Paul Enoiu, E. (2016). A Study on Concurrency Bugs in an Open Source Software. In: IFIP Advances in Information and Communication Technology, vol. 472: . Paper presented at 12th IFIP WG 2.13 International Conference on Open Source Systems: Integrating Communities, OSS 2016; Gothenburg; Sweden; 30 May 2016 through 2 June 2016 (pp. 16-31). , 472
Open this publication in new window or tab >>A Study on Concurrency Bugs in an Open Source Software
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2016 (English)In: IFIP Advances in Information and Communication Technology, vol. 472, 2016, Vol. 472, p. 16-31Conference paper, Published paper (Refereed)
Abstract [en]

Concurrent programming puts demands on software debugging and testing, as concurrent software may exhibit problems not present in sequential software, e.g., deadlocks and race conditions. In aiming to increase efficiency and effectiveness of debugging and bug-fixing for concurrent software, a deep understanding of concurrency bugs, their frequency and fixingtimes would be helpful. Similarly, to design effective tools and techniques for testing and debugging concurrent software understanding the differences between non-concurrency and concurrency bugs in real-word software would be useful.

National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-31417 (URN)10.1007/978-3-319-39225-7_2 (DOI)000383203700002 ()2-s2.0-84971537277 (Scopus ID)978-3-319-39224-0 (ISBN)
Conference
12th IFIP WG 2.13 International Conference on Open Source Systems: Integrating Communities, OSS 2016; Gothenburg; Sweden; 30 May 2016 through 2 June 2016
Available from: 2016-04-12 Created: 2016-04-12 Last updated: 2016-10-06Bibliographically approved
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0002-7235-6888

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