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Srinivasan, S., Nelissen, G., J. Bril, R. & Meratnia, N. (2024). Analysis of TSN Time-Aware Shapers Using Schedule Abstraction Graphs. In: Leibniz Int. Proc. Informatics, LIPIcs: . Paper presented at 36th Euromicro Conference on Real-Time Systems, ECRTS 2024. Lille 9 July 2024 through 12 July 2024. Code 200744. Schloss Dagstuhl- Leibniz-Zentrum fur Informatik GmbH, Dagstuhl Publishing, 298, Article ID 16.
Åpne denne publikasjonen i ny fane eller vindu >>Analysis of TSN Time-Aware Shapers Using Schedule Abstraction Graphs
2024 (engelsk)Inngår i: Leibniz Int. Proc. Informatics, LIPIcs, Schloss Dagstuhl- Leibniz-Zentrum fur Informatik GmbH, Dagstuhl Publishing , 2024, Vol. 298, artikkel-id 16Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

IEEE Time-Sensitive Networking (TSN) is one of the main solutions considered by the industry to support time-sensitive communication in data-intensive safety-critical and mission-critical applications such as autonomous driving and smart manufacturing. IEEE TSN standardizes several mechanisms to support real-time traffic on Ethernet networks. Time-Aware Shapers (TAS) (IEEE 802.1Qbv) is the standardized mechanisms of TSN that is usually considered to provide the most deterministic behavior for packet forwarding. TAS regulates when traffic classes may forward incoming packets to the egress of a TSN switch using gates that are opened and closed according to a time-triggered schedule. State-of-the-art solutions to configure or analyze TAS do not allow for multiple traffic classes to have their TAS gates opened at the same time according to any arbitrary schedule. In this paper, we present the first response-time analysis for traffic shaped with TAS where no restriction is enforced on the gate schedule. The proposed analysis is exact. It is a non-trivial variant of the schedule abstraction graph analysis framework [18]. Experiments confirm the usefulness of the proposed analysis and show that it is promising for doing design-space exploration where non-conventional TAS gates configurations are investigated to, for instance, improve average-case performance without degrading the worst-case.

sted, utgiver, år, opplag, sider
Schloss Dagstuhl- Leibniz-Zentrum fur Informatik GmbH, Dagstuhl Publishing, 2024
Emneord
latency, SAG, Schedule Abstraction, TAS, Time-Aware Shapers, TSN, Abstracting, IEEE Standards, Autonomous driving, Data intensive, Mission critical applications, Support time, Time-aware shaper, Time-sensitive networking, Accident prevention
HSV kategori
Identifikatorer
urn:nbn:se:mdh:diva-68110 (URN)10.4230/LIPIcs.ECRTS.2024.16 (DOI)2-s2.0-85198633047 (Scopus ID)9783959773249 (ISBN)
Konferanse
36th Euromicro Conference on Real-Time Systems, ECRTS 2024. Lille 9 July 2024 through 12 July 2024. Code 200744
Tilgjengelig fra: 2024-07-24 Laget: 2024-07-24 Sist oppdatert: 2024-07-24bibliografisk kontrollert
J. Bril, R., Hassani, H., Cuijpers, P. J. L. & Nelissen, G. (2023). Cost of Robustness of independent WCRT analysis for CBS of Ethernet AVB using eligible intervals. In: Golatowski, F Ragavan, SKV Facchinetti, T Wisniewski, L Porta, M Scanzio, S (Ed.), 2023 IEEE 19TH INTERNATIONAL CONFERENCE ON FACTORY COMMUNICATION SYSTEMS, WFCS: . Paper presented at IEEE 19th International Workshop on Factory Communication Systems (WFCS), APR 26-28, 2023, Pavia, ITALY (pp. 229-232). IEEE
Åpne denne publikasjonen i ny fane eller vindu >>Cost of Robustness of independent WCRT analysis for CBS of Ethernet AVB using eligible intervals
2023 (engelsk)Inngår i: 2023 IEEE 19TH INTERNATIONAL CONFERENCE ON FACTORY COMMUNICATION SYSTEMS, WFCS / [ed] Golatowski, F Ragavan, SKV Facchinetti, T Wisniewski, L Porta, M Scanzio, S, IEEE, 2023, s. 229-232Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

The existing worst-case response time (WCRT) analysis for individual priority classes under credit-based shaping (CBS) in Ethernet AVB based on so-called eligible intervals is both independent and tight. This WCRT analysis does not rely on any assumptions on interfering inter-priority streams other than those enforced by the Ethernet standard. A major advantage of this independent analysis is that CBS may be viewed as resource reservation, where allocated bandwidth is both guaranteed and enforced. Although independent analysis provides inter-priority class robustness, it comes at a cost of over-provisioning bandwidth. We illustrate this cost of inter-priority class robustness by means of an example that requires 7.8 times the amount of bandwidth reservation for a given set of streams compared to a different analysis that takes knowledge of interpriority streams into account.

sted, utgiver, år, opplag, sider
IEEE, 2023
Serie
IEEE International Workshop on Factory Communication Systems, ISSN 2835-8511
Emneord
real-time systems, IEEE Ethernet, AVB, TSN
HSV kategori
Identifikatorer
urn:nbn:se:mdh:diva-65164 (URN)10.1109/WFCS57264.2023.10144249 (DOI)001012871100032 ()2-s2.0-85162694861 (Scopus ID)978-1-6654-6432-1 (ISBN)
Konferanse
IEEE 19th International Workshop on Factory Communication Systems (WFCS), APR 26-28, 2023, Pavia, ITALY
Tilgjengelig fra: 2023-12-21 Laget: 2023-12-21 Sist oppdatert: 2023-12-21bibliografisk kontrollert
Cao, J., Ashjaei, S. M., Cuijpers, P. J. .., J. Bril, R. & Lukkien, J. (2018). An Independent yet Efficient Analysis of Bandwidth Reservation for Credit-based Shaping in Ethernet TSN. In: International Workshop on Factory Communication Systems WFCS'18: . Paper presented at International Workshop on Factory Communication Systems WFCS'18, 13 Jun 2018, Imperia, Italy (pp. 1-10). Imperia, Italy
Åpne denne publikasjonen i ny fane eller vindu >>An Independent yet Efficient Analysis of Bandwidth Reservation for Credit-based Shaping in Ethernet TSN
Vise andre…
2018 (engelsk)Inngår i: International Workshop on Factory Communication Systems WFCS'18, Imperia, Italy, 2018, s. 1-10Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

Ethernet TSN is an upcoming communication standard for industrial distributed embedded systems with high demands on bandwidth and traffic delay. In this paper, we present and prove an improved analysis to determine bandwidth reservations for credit based shapers in a single Ethernet TSN switch. We compare this new analysis, which is based on eligible intervals, to the state-of-the-art bandwidth reservation analysis based on busy periods through experiments. Despite its low complexity and the independence of the knowledge of the interfering traffic, the results show an improvement of efficiency, i.e., a decrease of the required bandwidth, for the new analysis.

sted, utgiver, år, opplag, sider
Imperia, Italy: , 2018
HSV kategori
Identifikatorer
urn:nbn:se:mdh:diva-38966 (URN)10.1109/WFCS.2018.8402345 (DOI)000490863500009 ()2-s2.0-85050016783 (Scopus ID)978-1-5386-1066-4 (ISBN)
Konferanse
International Workshop on Factory Communication Systems WFCS'18, 13 Jun 2018, Imperia, Italy
Prosjekter
Future factories in the Cloud
Tilgjengelig fra: 2018-04-10 Laget: 2018-04-10 Sist oppdatert: 2019-10-31bibliografisk kontrollert
Hatvani, L., Afshar, S. Z. & J. Bril, R. (2018). Optimal Priority and Threshold Assignment for Fixed-priority Preemption Threshold Scheduling. Paper presented at 7th Embedded Operating Systems Workshop EWiLi'17, 06 Oct 2017, Seoul, South Korea. ACM SIGBED Review (1), 43-49
Åpne denne publikasjonen i ny fane eller vindu >>Optimal Priority and Threshold Assignment for Fixed-priority Preemption Threshold Scheduling
2018 (engelsk)Inngår i: ACM SIGBED Review, E-ISSN 1551-3688, nr 1, s. 43-49Artikkel i tidsskrift (Fagfellevurdert) Published
Abstract [en]

Fixed-priority preemption-threshold scheduling (FPTS) is a generalization of fixed-priority preemptive scheduling (FPPS) and fixed-priority non-preemptive scheduling (FPNS). Since FPPS and FPNS are incomparable in terms of potential schedulability, FPTS has the advantage that it can schedule any task set schedulable by FPPS or FPNS and some that are not schedulable by either. FPTS is based on the idea that each task is assigned a priority and a preemption threshold. While tasks are admitted into the system according to their priorities, they can only be preempted by tasks that have priority higher than the preemption threshold.

This paper presents a new optimal priority and preemption threshold assignment (OPTA) algorithm for FPTS which in general outperforms the existing algorithms in terms of the size of the explored state-space and the total number of worst case response time calculations performed. The algorithm is based on back-tracking, i.e. it traverses the space of potential priorities and preemption thresholds, while pruning infeasible paths, and returns the first assignment deemed schedulable.

We present the evaluation results where we compare the complexity of the new algorithm with the existing one. We show that the new algorithm significantly reduces the time needed to find a solution. Through a comparative evaluation, we show the improvements that can be achieved in terms of schedulability ratio by our OPTA compared to a deadline monotonic priority assignment.

HSV kategori
Identifikatorer
urn:nbn:se:mdh:diva-37058 (URN)2-s2.0-84992364765 (Scopus ID)
Konferanse
7th Embedded Operating Systems Workshop EWiLi'17, 06 Oct 2017, Seoul, South Korea
Prosjekter
PRESS - Predictable Embedded Software Systems
Tilgjengelig fra: 2017-11-07 Laget: 2017-11-07 Sist oppdatert: 2019-01-28bibliografisk kontrollert
Balasubramanian, S. M., Afshar, S., Gai, P., Behnam, M. & J. Bril, R. (2018). Practical challenges for FSLM. In: Proceedings - 2018 IEEE 24th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2018: . Paper presented at 24th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2018 (pp. 238-239). Institute of Electrical and Electronics Engineers Inc., Article ID 8607257.
Åpne denne publikasjonen i ny fane eller vindu >>Practical challenges for FSLM
Vise andre…
2018 (engelsk)Inngår i: Proceedings - 2018 IEEE 24th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2018, Institute of Electrical and Electronics Engineers Inc. , 2018, s. 238-239, artikkel-id 8607257Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

The flexible spin-lock model (FSLM) unifies suspension-based and spin-based resource access protocols for partitioned fixed-priority preemptive scheduling based real-time multi-core platforms. Recent work has been done in defining the protocol for FSLM, providing schedulability analysis, and investigating the practical consequences of the theoretical model. FSLM complies to the AUTOSAR standard for the automotive industry, and prototype implementations of FSLM in the OSEK/VDX-complaint Erika Enterprise Real-Time Operating System have been realized. In this paper, we briefly describe some practical challenges to improve efficiency and generality. 

sted, utgiver, år, opplag, sider
Institute of Electrical and Electronics Engineers Inc., 2018
HSV kategori
Identifikatorer
urn:nbn:se:mdh:diva-42811 (URN)10.1109/RTCSA.2018.00039 (DOI)000458980300030 ()2-s2.0-85061834140 (Scopus ID)9781538677599 (ISBN)
Konferanse
24th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2018
Tilgjengelig fra: 2019-02-28 Laget: 2019-02-28 Sist oppdatert: 2020-12-22bibliografisk kontrollert
Afshar, S. Z., Behnam, M., J. Bril, R. & Nolte, T. (2017). An optimal spin-lock priority assignment algorithm for real-time multi-core systems. In: The 23th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications RTCSA'17: . Paper presented at The 23th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications RTCSA'17, 16 Aug 2017, Hsinchu, Taiwan. , Article ID 8046310.
Åpne denne publikasjonen i ny fane eller vindu >>An optimal spin-lock priority assignment algorithm for real-time multi-core systems
2017 (engelsk)Inngår i: The 23th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications RTCSA'17, 2017, artikkel-id 8046310Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

Support for exclusive access to shared (global) resources is instrumental in the context of embedded real-time multi-core systems, and mechanisms for achieving such access must be deterministic and efficient. There exist two traditional approaches for multiprocessors when a task requests a global resource that is locked by a task on a remote core: a spin-based approach, i.e. non-preemptive busy waiting for the resource to become available, and a suspension-based approach, i.e. the task relinquishes the processor. A suspension-based approach can be viewed as a spin-based approach where the lowest priority on a core is used during spinning, similar to a non-preemptive spin-based approach where the highest priority on a core is used. By taking such a view, we previously provided a general model for spinning, where any arbitrary priority can be used for spinning, i.e. from the lowest to the highest priority on a core. Targeting partitioned fixed-priority preemptive scheduled multiprocessors and spin-based approaches that use a fixed priority for spinning per core for all tasks, we aim at increasing the schedulability of multiprocessor systems by using the spin-lock priority per core as parameter. In this paper, we present (i) a generalization of the traditional worst-case response-time analysis for non-preemptive spin-based approaches addressing an arbitrary but fixed spin-lock priority per core, (ii) an optimal spin-lock priority assignment (OSPA) algorithm per core, i.e. an algorithm that will find a fixed spin-lock priority per core that will make the system schedulable, whenever such an assignment exists and, (iii) comparative evaluations of the OSPA algorithm with the spin-based and suspension-based approaches where OSPA showed up to 38% improvement compared to both approaches.

HSV kategori
Identifikatorer
urn:nbn:se:mdh:diva-37055 (URN)10.1109/RTCSA.2017.8046310 (DOI)000425851000008 ()2-s2.0-85032735746 (Scopus ID)
Konferanse
The 23th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications RTCSA'17, 16 Aug 2017, Hsinchu, Taiwan
Prosjekter
PRESS - Predictable Embedded Software SystemsDPAC - Dependable Platforms for Autonomous systems and Control
Tilgjengelig fra: 2017-11-02 Laget: 2017-11-02 Sist oppdatert: 2018-03-15bibliografisk kontrollert
J. Bril, R., Altmeyer, S., van den Heuvel, M. M. H., Davis, R. I. & Behnam, M. (2017). Fixed priority scheduling with pre-emption thresholds and cache-related pre-emption delays: integrated analysis and evaluation. Real-time systems, 53(4), 403-466
Åpne denne publikasjonen i ny fane eller vindu >>Fixed priority scheduling with pre-emption thresholds and cache-related pre-emption delays: integrated analysis and evaluation
Vise andre…
2017 (engelsk)Inngår i: Real-time systems, ISSN 0922-6443, E-ISSN 1573-1383, Vol. 53, nr 4, s. 403-466Artikkel i tidsskrift (Fagfellevurdert) Published
Abstract [en]

Commercial off-the-shelf programmable platforms for real-time systems typically contain a cache to bridge the gap between the processor speed and main memory speed. Because cache-related pre-emption delays (CRPD) can have a significant influence on the computation times of tasks, CRPD have been integrated in the response time analysis for fixed-priority pre-emptive scheduling (FPPS). This paper presents CRPD aware response-time analysis of sporadic tasks with arbitrary deadlines for fixed-priority pre-emption threshold scheduling (FPTS), generalizing earlier work. The analysis is complemented by an optimal (pre-emption) threshold assignment algorithm, assuming the priorities of tasks are given. We further improve upon these results by presenting an algorithm that searches for a layout of tasks in memory that makes a task set schedulable. The paper includes an extensive comparative evaluation of the schedulability ratios of FPPS and FPTS, taking CRPD into account. The practical relevance of our work stems from FPTS support in AUTOSAR, a standardized development model for the automotive industry. [(This paper forms an extended version of Bril et al. (in Proceedings of 35th IEEE real-time systems symposium (RTSS), 2014). The main extensions are described in Sect. 1.2.].

HSV kategori
Identifikatorer
urn:nbn:se:mdh:diva-36009 (URN)10.1007/s11241-016-9266-z (DOI)000403073600001 ()2-s2.0-85011290627 (Scopus ID)
Tilgjengelig fra: 2017-06-29 Laget: 2017-06-29 Sist oppdatert: 2018-01-24bibliografisk kontrollert
Balasubramanian, S., Afshar, S. Z., Gai, P., Behnam, M. & J. Bril, R. (2017). Incorporating implementation overheads in the analysis for the flexible spin-lock model. In: IECON 2017 - 43RD ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY: . Paper presented at 43rd Annual Conference of the IEEE Industrial Electronics Society IECON 2017, 30 Oct 2017, Beijing, China (pp. 411-8418).
Åpne denne publikasjonen i ny fane eller vindu >>Incorporating implementation overheads in the analysis for the flexible spin-lock model
Vise andre…
2017 (engelsk)Inngår i: IECON 2017 - 43RD ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY, 2017, s. 411-8418Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

The flexible spin-lock model (FSLM) unifies suspension-based and spin-based resource sharing protocols for partitioned fixed-priority preemptive scheduling based real-time multiprocessor platforms. Recent work has been done in defining the protocol for FSLM and providing a schedulability analysis without accounting for the implementation overheads. In this paper, we extend the analysis for FSLM with implementation overheads. Utilizing an initial implementation of FSLM in the OSEK/VDX-compliant Erika Enterprise RTOS on an Altera Nios II platform using 4 soft-core processors, we present an improved implementation. Given the design of the implementation, the overheads are characterized and incorporated in specific terms of the existing analysis. The paper also supplements the analysis with measurement results, enabling an analytical comparison of FSLM with the natively provided multiprocessor stack resource policy (MSRP), which may serve as a guideline for the choice of FSLM or MSRP for a specific application.

Serie
IEEE Industrial Electronics Society
HSV kategori
Identifikatorer
urn:nbn:se:mdh:diva-37057 (URN)10.1109/IECON.2017.8217477 (DOI)000427164808044 ()2-s2.0-85046623624 (Scopus ID)978-1-5386-1127-2 (ISBN)
Konferanse
43rd Annual Conference of the IEEE Industrial Electronics Society IECON 2017, 30 Oct 2017, Beijing, China
Prosjekter
PRESS - Predictable Embedded Software SystemsDPAC - Dependable Platforms for Autonomous systems and Control
Tilgjengelig fra: 2017-11-07 Laget: 2017-11-07 Sist oppdatert: 2018-05-24bibliografisk kontrollert
Afshar, S., Behnam, M., J. Bril, R. & Nolte, T. (2017). Per Processor Spin-Lock Priority for Partitioned Multiprocessor Real-Time Systems. Leibniz Transactions on Embedded Systems (2)
Åpne denne publikasjonen i ny fane eller vindu >>Per Processor Spin-Lock Priority for Partitioned Multiprocessor Real-Time Systems
2017 (engelsk)Inngår i: Leibniz Transactions on Embedded Systems, ISSN 2199-2002, nr 2Artikkel i tidsskrift (Annet vitenskapelig) Published
Abstract [en]

Two traditional approaches exist for a task that is blocked on a global resource; a task either performs a non-preemptive busy wait, i.e., spins, or suspends and releases the processor. Previously, we have shown that both approaches can be viewed as spinning either at the highest priority HP or at the lowest priority on the processor LP, respectively. Based on this view, previously we have generalized a task's blocking behavioral model, as spinning at any arbitrary priority level. In this paper, we focus on a particular class of spin-lock protocols from the introduced flexible spin-lock model where spinning is performed at a priority equal to or higher than the highest local ceiling of the global resources accessed on a processor referred to as CP spin-lock approach. In this paper, we assume that all tasks of a specific processor are spinning on the same priority level. Given this class and assumption, we show that there exists a spin-lock protocol in this range that dominates the classic spin-lock protocol which tasks spin on highest priority level (HP). However we show that this new approach is incomparable with the CP spin-lock approach. Moreover, we show that there may exist an intermediate spin-lock approach between the priority used by CP spin-lock approach and the new introduced spin-lock approach that can make a task set schedulable when those two cannot. We provide an extensive evaluation results comparing the HP, CP and the new proposed approach.

HSV kategori
Identifikatorer
urn:nbn:se:mdh:diva-37183 (URN)10.4230/LITES-v004-i002-a003 (DOI)
Tilgjengelig fra: 2017-11-02 Laget: 2017-11-02 Sist oppdatert: 2018-12-14bibliografisk kontrollert
Hatvani, L., J. Bril, R. & Altmeyer, S. (2017). Schedulability using native non-preemptive groups on an AUTOSAR/OSEK platform with caches. In: Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017: . Paper presented at 20th Design, Automation and Test in Europe, DATE 2017; SwissTech Convention CenterSwisstech, Lausanne; Switzerland; 27 March - 31 March 2017. (pp. 244-249). Institute of Electrical and Electronics Engineers (IEEE)
Åpne denne publikasjonen i ny fane eller vindu >>Schedulability using native non-preemptive groups on an AUTOSAR/OSEK platform with caches
2017 (engelsk)Inngår i: Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017, Institute of Electrical and Electronics Engineers (IEEE), 2017, s. 244-249Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

Fixed-priority preemption threshold scheduling (FPTS) is a limited preemptive scheduling scheme that generalizes both fixed-priority preemptive scheduling (FPPS) and fixed-priority non-preemptive scheduling (FPNS). By increasing the priority of tasks as they start executing it reduces the set of tasks that can preempt any given task. A subset of FPTS task configurations can be implemented natively on any AUTOSAR/OSEK compatible platform by utilizing the platform's native implementation of non-preemptive task groups via so called internal resources. The limiting factor for this implementation is the number of internal resources that can be associated with any individual task. OSEK and consequently AUTOSAR limit this number to one internal resource per task. In this work, we investigate the impact of this limitation on the schedulability of task sets when cache related preemption delays are taken into account. We also consider the impact of this restriction on the stack size when the tasks are executed on a shared-stack system.

sted, utgiver, år, opplag, sider
Institute of Electrical and Electronics Engineers (IEEE), 2017
Emneord
Fixed priorities, Fixed priority preemptive, Fixed-priority non-preemptive, Internal resources, Non-preemptive tasks, Pre-emptive scheduling, Preemption thresholds, Schedulability, Scheduling
HSV kategori
Identifikatorer
urn:nbn:se:mdh:diva-35896 (URN)10.23919/DATE.2017.7926990 (DOI)000404171500042 ()2-s2.0-85020171887 (Scopus ID)9783981537093 (ISBN)
Konferanse
20th Design, Automation and Test in Europe, DATE 2017; SwissTech Convention CenterSwisstech, Lausanne; Switzerland; 27 March - 31 March 2017.
Tilgjengelig fra: 2017-06-22 Laget: 2017-06-22 Sist oppdatert: 2020-10-22bibliografisk kontrollert
Organisasjoner
Identifikatorer
ORCID-id: ORCID iD iconorcid.org/0000-0001-6234-5117