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Large complex industrial Distributed Control Systems (DCS), e.g., power distribution systems, are expected to function for long time, up to 40 years. Therefore, besides having a long system verification phase for all subsystems, the design phase should consider various aspects when it comes to selection of which technologies to utilize when implementing such systems. In this paper, we study and investigate key challenges of using the Time Sensitive Networking (TSN) technology when it comes to design, maintenance and evolution of long life-span complex DCS. We also identify issues and challenges, and propose mitigation strategies for using the TSN technology in long-life system design. Our investigation and analysis shows that many of the TSN standards are in their evolution phase and may as a consequence be subject to different interpretations and implementations. Therefore, achieving a full capacity of using the TSN technology may not be possible, in particular when it comes to design of systems having an expected long life.

Moving towards new technologies, such as Time Sensitive Networking (TSN), in industries should be gradual with a proper integration process instead of replacing the existing ones to make it beneficial in terms of cost and performance. Within this context, this paper identifies the challenges of integrating a legacy EtherCAT network, as a commonly used technology in the automation domain, into a TSN network. We show that clock synchronization plays an essential role when it comes to EtherCAT-TSN network integration with important requirements. We propose a clock synchronization mechanism based on the TSN standards to obtain a precise synchronization among EtherCAT nodes, resulting to an efficient data transmission. Based on a formal verification framework using UPPAAL tool we show that the integrated EtherCAT-TSN network with the proposed clock synchronization mechanism achieves at least 3 times higher synchronization precision compared to not using any synchronization.

Industrial control systems often exhibit a need for short latencies and/or consistent data gathering. In a system with limited resources it is a challenge to achieve the combination of short latencies and consistent data. In this paper we propose three different architectural solutions to this challenge, each having different trade-offs: one that gives a consistent set of data and also a short latency but with a higher resource usage, a second alternative that reduces resource needs but at the cost of an increased latency, and a third and final solution that reduces resource needs to a minimum but in doing so also increasing the latency. The results presented in this paper suggest that it is possible to get low latency and robustness at the cost of performance. 

A significant part of industrial systems have requirements on long life times. Such requirements on the complete system impose requirements on its corresponding embedded systems to be operational for an equally long time. As a consequence it is of paramount importance to be able to replace obsolete components of the embedded systems during the life time of the system, and to be able to update part of the design due to new requirements. In this paper we present a method to manage component replacement in such systems, and we present an industrial case study highlighting the work needed to replace an FPGA chip with another, including all corresponding legacy FPGA design challenges that comes with such a replacement. We have found one larger problem inherent in the ability to use the included components in a way that is not possible with the new circuits replacing the old ones. This problem significantly increased the work needed when performing the conversion and migration from the old design to the new, since parts of the design had to be redesigned from a functional perspective.

Large infrastructure systems with a life time of more than 30 years, such as telecommunication or power transmission systems, are difficult to maintain since they suffer from the end-of-life plague of software, hardware and knowledge. Large companies have traditionally tackled this problem successfully, but maybe not with complete efficiency in all cases. We find system evolution to be an increasingly interesting problem as infrastructure becomes more complicated. Our increasingly complex and advanced society demands more of the infrastructure making system evolution an interesting alternative to system replacement. From the point of view of the ISO/IEC 15288 development process we have identified life cycle issues connected to long life time scenarios and the different life cycle stages. In this paper we contribute with a modification of the utilisation and support stage in ISO/IEC 15288 into an evolution stage where a system is not only retired and replaced but rather evolved into the next generation. Using this approach changes the view of system development for this specific type of systems towards a way of incremental development, where new functions can be added at the same time as old legacy parts are replaced with functionally equivalent modules based on new hardware. We have based our solution on the experience from investigations of life cycle issues for two large infrastructure systems.

Handling of obsolete software and/or hardware components together with management of function updates in a complex embedded system with an expected life time of more than 30 years can be a very difficult to almost impossible task. This types of challenges can be found in a large number of companies in, for example, the power transmission industry, power plants, aviation etc. In this paper we present the basic steps in a proposed method for handling evolvability in such embedded systems with long expected life cycles. The key elements of the proposed method are the definition of function dependencies, release planning, and test requirements.

In this work in progress paper we present parts of our ongoing work on using the Graphical Processing Unit (GPU) in the context of Embedded Systems. As a first step we are investigating the possibility to move functions from a Digital Signal Processor (DSP) to a GPU. If it is possible to make such a migration then it would simplify the hardware designs for some embedded systems by removing external hardware and also remove a potential life cycle issue with obsolete components. We are currently designing a test system to be able to compare performance between a legacy control system used today in industry, based on a CPU/DSP combination, to a new design with a CPU/GPU combination. In this setting the pre-filtering of sampled data, previously done in the DSP, is moved to the GPU.

Management of obsolete software- and hardware-components along with the addition of new components and functionalities in existing embedded systems can be a very difficult or almost impossible task. If there at the same time is a requirement put on the system that it should be in operation for more than 30 years, then the evolution of the embedded system architecture over such a long duration of time will be an even more challenging problem to solve. A large number of different industries, for example the process and power transmission industries, are faced with this type of challenges on a daily basis. The contribution of our research presented in this paper is a set of questions and answers on how it is possible to replace and update an old control system, with examples inherent in process and power transmission applications. We also look at different methods that can be used during the development of new systems such that they will provide a natural support for evolvability, targeting future control system applications.

The Graphics Processing Unit (GPU) is becoming a very powerful platform to accelerate graphics and dataparallel compute-intensive applications. It gives a high performance and at the same time it has a low power consumption. This combination is of high performance and low power consumption is useful when it comes to building an embedded system. In this paper we are looking at the possibility to use a combination of CPU and GPU to provide performance metrics that are required in an embedded system. In particular we look at requirements inherent in the process and power industries where we believe that the GPU has the potential to be a useful and natural element in future embedded system architectures.